src/share/vm/adlc/formssel.cpp

*** 2256,2265 ****
--- 2256,2266 ----
    }
  
    uint size = 0;
    if (strcmp(name, "RegFlags") == 0) size = 1;
    if (strcmp(name, "RegI") == 0) size = 1;
+   if (strcmp(name, "RegK") == 0) size = 1;
    if (strcmp(name, "RegF") == 0) size = 1;
    if (strcmp(name, "RegD") == 0) size = 2;
    if (strcmp(name, "RegL") == 0) size = 2;
    if (strcmp(name, "RegN") == 0) size = 1;
    if (strcmp(name, "RegP") == 0) size = globalAD->get_preproc_def("_LP64") ? 2 : 1;
*** 3912,3926 ****
--- 3913,3929 ----
          (strcmp(opType,"RegI")==0 ||
           strcmp(opType,"RegP")==0 ||
           strcmp(opType,"RegN")==0 ||
           strcmp(opType,"RegL")==0 ||
           strcmp(opType,"RegF")==0 ||
+          strcmp(opType,"RegK")==0 ||
           strcmp(opType,"RegD")==0 ||
           strcmp(opType,"VecS")==0 ||
           strcmp(opType,"VecD")==0 ||
           strcmp(opType,"VecX")==0 ||
           strcmp(opType,"VecY")==0 ||
+          strcmp(opType,"VecZ")==0 ||
           strcmp(opType,"Reg" )==0) ) {
        return 1;
      }
    }
    return 0;
*** 4137,4152 ****
  
  bool MatchRule::is_vector() const {
    static const char *vector_list[] = {
      "AddVB","AddVS","AddVI","AddVL","AddVF","AddVD",
      "SubVB","SubVS","SubVI","SubVL","SubVF","SubVD",
!     "MulVS","MulVI","MulVF","MulVD",
      "DivVF","DivVD",
      "AndV" ,"XorV" ,"OrV",
      "AddReductionVI", "AddReductionVL",
      "AddReductionVF", "AddReductionVD",
!     "MulReductionVI",
      "MulReductionVF", "MulReductionVD",
      "LShiftCntV","RShiftCntV",
      "LShiftVB","LShiftVS","LShiftVI","LShiftVL",
      "RShiftVB","RShiftVS","RShiftVI","RShiftVL",
      "URShiftVB","URShiftVS","URShiftVI","URShiftVL",
--- 4140,4155 ----
  
  bool MatchRule::is_vector() const {
    static const char *vector_list[] = {
      "AddVB","AddVS","AddVI","AddVL","AddVF","AddVD",
      "SubVB","SubVS","SubVI","SubVL","SubVF","SubVD",
!     "MulVS","MulVI","MulVL","MulVF","MulVD",
      "DivVF","DivVD",
      "AndV" ,"XorV" ,"OrV",
      "AddReductionVI", "AddReductionVL",
      "AddReductionVF", "AddReductionVD",
!     "MulReductionVI", "MulReductionVL",
      "MulReductionVF", "MulReductionVD",
      "LShiftCntV","RShiftCntV",
      "LShiftVB","LShiftVS","LShiftVI","LShiftVL",
      "RShiftVB","RShiftVS","RShiftVI","RShiftVL",
      "URShiftVB","URShiftVS","URShiftVI","URShiftVL",