--- old/src/share/vm/adlc/formssel.cpp	2015-04-06 14:41:25.976297600 -0700
+++ new/src/share/vm/adlc/formssel.cpp	2015-04-06 14:41:25.785278500 -0700
@@ -2258,6 +2258,7 @@
   uint size = 0;
   if (strcmp(name, "RegFlags") == 0) size = 1;
   if (strcmp(name, "RegI") == 0) size = 1;
+  if (strcmp(name, "RegK") == 0) size = 1;
   if (strcmp(name, "RegF") == 0) size = 1;
   if (strcmp(name, "RegD") == 0) size = 2;
   if (strcmp(name, "RegL") == 0) size = 2;
@@ -3914,11 +3915,13 @@
          strcmp(opType,"RegN")==0 ||
          strcmp(opType,"RegL")==0 ||
          strcmp(opType,"RegF")==0 ||
+         strcmp(opType,"RegK")==0 ||
          strcmp(opType,"RegD")==0 ||
          strcmp(opType,"VecS")==0 ||
          strcmp(opType,"VecD")==0 ||
          strcmp(opType,"VecX")==0 ||
          strcmp(opType,"VecY")==0 ||
+         strcmp(opType,"VecZ")==0 ||
          strcmp(opType,"Reg" )==0) ) {
       return 1;
     }
@@ -4139,12 +4142,12 @@
   static const char *vector_list[] = {
     "AddVB","AddVS","AddVI","AddVL","AddVF","AddVD",
     "SubVB","SubVS","SubVI","SubVL","SubVF","SubVD",
-    "MulVS","MulVI","MulVF","MulVD",
+    "MulVS","MulVI","MulVL","MulVF","MulVD",
     "DivVF","DivVD",
     "AndV" ,"XorV" ,"OrV",
     "AddReductionVI", "AddReductionVL",
     "AddReductionVF", "AddReductionVD",
-    "MulReductionVI",
+    "MulReductionVI", "MulReductionVL",
     "MulReductionVF", "MulReductionVD",
     "LShiftCntV","RShiftCntV",
     "LShiftVB","LShiftVS","LShiftVI","LShiftVL",