18 * 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 20 * or visit www.oracle.com if you need additional information or have any 21 * questions. 22 * 23 */ 24 25 #ifndef SHARE_VM_OPTO_OPCODES_HPP 26 #define SHARE_VM_OPTO_OPCODES_HPP 27 28 // Build a big enum of class names to give them dense integer indices 29 #define macro(x) Op_##x, 30 enum Opcodes { 31 Op_Node = 0, 32 macro(Set) // Instruction selection match rule 33 macro(RegN) // Machine narrow oop register 34 macro(RegI) // Machine integer register 35 macro(RegP) // Machine pointer register 36 macro(RegF) // Machine float register 37 macro(RegD) // Machine double register 38 macro(RegL) // Machine long register 39 macro(VecS) // Machine vectors register 40 macro(VecD) // Machine vectord register 41 macro(VecX) // Machine vectorx register 42 macro(VecY) // Machine vectory register 43 macro(RegFlags) // Machine flags register 44 _last_machine_leaf, // Split between regular opcodes and machine 45 #include "classes.hpp" 46 _last_opcode 47 }; 48 #undef macro 49 50 // Table of names, indexed by Opcode 51 extern const char *NodeClassNames[]; 52 53 #endif // SHARE_VM_OPTO_OPCODES_HPP | 18 * 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 20 * or visit www.oracle.com if you need additional information or have any 21 * questions. 22 * 23 */ 24 25 #ifndef SHARE_VM_OPTO_OPCODES_HPP 26 #define SHARE_VM_OPTO_OPCODES_HPP 27 28 // Build a big enum of class names to give them dense integer indices 29 #define macro(x) Op_##x, 30 enum Opcodes { 31 Op_Node = 0, 32 macro(Set) // Instruction selection match rule 33 macro(RegN) // Machine narrow oop register 34 macro(RegI) // Machine integer register 35 macro(RegP) // Machine pointer register 36 macro(RegF) // Machine float register 37 macro(RegD) // Machine double register 38 macro(RegK) // Machine mask register 39 macro(RegL) // Machine long register 40 macro(VecS) // Machine vectors register 41 macro(VecD) // Machine vectord register 42 macro(VecX) // Machine vectorx register 43 macro(VecY) // Machine vectory register 44 macro(VecZ) // Machine vectorz register 45 macro(RegFlags) // Machine flags register 46 _last_machine_leaf, // Split between regular opcodes and machine 47 #include "classes.hpp" 48 _last_opcode 49 }; 50 #undef macro 51 52 // Table of names, indexed by Opcode 53 extern const char *NodeClassNames[]; 54 55 #endif // SHARE_VM_OPTO_OPCODES_HPP |