1 /*
2 * Copyright (c) 2003, 2015, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "asm/macroAssembler.hpp"
27 #include "asm/macroAssembler.inline.hpp"
28 #include "interpreter/interpreter.hpp"
29 #include "nativeInst_x86.hpp"
30 #include "oops/instanceOop.hpp"
31 #include "oops/method.hpp"
32 #include "oops/objArrayKlass.hpp"
33 #include "oops/oop.inline.hpp"
34 #include "prims/methodHandles.hpp"
35 #include "runtime/frame.inline.hpp"
36 #include "runtime/handles.inline.hpp"
37 #include "runtime/sharedRuntime.hpp"
38 #include "runtime/stubCodeGenerator.hpp"
39 #include "runtime/stubRoutines.hpp"
40 #include "runtime/thread.inline.hpp"
41 #include "utilities/top.hpp"
42 #ifdef COMPILER2
43 #include "opto/runtime.hpp"
44 #endif
45
46 // Declaration and definition of StubGenerator (no .hpp file).
47 // For a more detailed description of the stub routine structure
48 // see the comment in stubRoutines.hpp
49
50 #define __ _masm->
51 #define TIMES_OOP (UseCompressedOops ? Address::times_4 : Address::times_8)
52 #define a__ ((Assembler*)_masm)->
53
54 #ifdef PRODUCT
55 #define BLOCK_COMMENT(str) /* nothing */
56 #else
57 #define BLOCK_COMMENT(str) __ block_comment(str)
58 #endif
59
60 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
61 const int MXCSR_MASK = 0xFFC0; // Mask out any pending exceptions
62
63 // Stub Code definitions
64
65 static address handle_unsafe_access() {
66 JavaThread* thread = JavaThread::current();
67 address pc = thread->saved_exception_pc();
68 // pc is the instruction which we must emulate
69 // doing a no-op is fine: return garbage from the load
70 // therefore, compute npc
71 address npc = Assembler::locate_next_instruction(pc);
72
73 // request an async exception
74 thread->set_pending_unsafe_access_error();
75
76 // return address of next instruction to execute
77 return npc;
78 }
79
80 class StubGenerator: public StubCodeGenerator {
81 private:
82
83 #ifdef PRODUCT
84 #define inc_counter_np(counter) ((void)0)
85 #else
86 void inc_counter_np_(int& counter) {
87 // This can destroy rscratch1 if counter is far from the code cache
88 __ incrementl(ExternalAddress((address)&counter));
89 }
90 #define inc_counter_np(counter) \
91 BLOCK_COMMENT("inc_counter " #counter); \
92 inc_counter_np_(counter);
93 #endif
94
95 // Call stubs are used to call Java from C
96 //
97 // Linux Arguments:
98 // c_rarg0: call wrapper address address
99 // c_rarg1: result address
100 // c_rarg2: result type BasicType
101 // c_rarg3: method Method*
102 // c_rarg4: (interpreter) entry point address
103 // c_rarg5: parameters intptr_t*
104 // 16(rbp): parameter size (in words) int
105 // 24(rbp): thread Thread*
106 //
107 // [ return_from_Java ] <--- rsp
108 // [ argument word n ]
109 // ...
110 // -12 [ argument word 1 ]
111 // -11 [ saved r15 ] <--- rsp_after_call
112 // -10 [ saved r14 ]
113 // -9 [ saved r13 ]
114 // -8 [ saved r12 ]
115 // -7 [ saved rbx ]
116 // -6 [ call wrapper ]
117 // -5 [ result ]
118 // -4 [ result type ]
119 // -3 [ method ]
120 // -2 [ entry point ]
121 // -1 [ parameters ]
122 // 0 [ saved rbp ] <--- rbp
123 // 1 [ return address ]
124 // 2 [ parameter size ]
125 // 3 [ thread ]
126 //
127 // Windows Arguments:
128 // c_rarg0: call wrapper address address
129 // c_rarg1: result address
130 // c_rarg2: result type BasicType
131 // c_rarg3: method Method*
132 // 48(rbp): (interpreter) entry point address
133 // 56(rbp): parameters intptr_t*
134 // 64(rbp): parameter size (in words) int
135 // 72(rbp): thread Thread*
136 //
137 // [ return_from_Java ] <--- rsp
138 // [ argument word n ]
139 // ...
140 // -28 [ argument word 1 ]
141 // -27 [ saved xmm15 ] <--- rsp_after_call
142 // [ saved xmm7-xmm14 ]
143 // -9 [ saved xmm6 ] (each xmm register takes 2 slots)
144 // -7 [ saved r15 ]
145 // -6 [ saved r14 ]
146 // -5 [ saved r13 ]
147 // -4 [ saved r12 ]
148 // -3 [ saved rdi ]
149 // -2 [ saved rsi ]
150 // -1 [ saved rbx ]
151 // 0 [ saved rbp ] <--- rbp
152 // 1 [ return address ]
153 // 2 [ call wrapper ]
154 // 3 [ result ]
155 // 4 [ result type ]
156 // 5 [ method ]
157 // 6 [ entry point ]
158 // 7 [ parameters ]
159 // 8 [ parameter size ]
160 // 9 [ thread ]
161 //
162 // Windows reserves the callers stack space for arguments 1-4.
163 // We spill c_rarg0-c_rarg3 to this space.
164
165 // Call stub stack layout word offsets from rbp
166 enum call_stub_layout {
167 #ifdef _WIN64
168 xmm_save_first = 6, // save from xmm6
169 xmm_save_last = 15, // to xmm15
170 xmm_save_base = -9,
171 rsp_after_call_off = xmm_save_base - 2 * (xmm_save_last - xmm_save_first), // -27
172 r15_off = -7,
173 r14_off = -6,
174 r13_off = -5,
175 r12_off = -4,
176 rdi_off = -3,
177 rsi_off = -2,
178 rbx_off = -1,
179 rbp_off = 0,
180 retaddr_off = 1,
181 call_wrapper_off = 2,
182 result_off = 3,
183 result_type_off = 4,
184 method_off = 5,
185 entry_point_off = 6,
186 parameters_off = 7,
187 parameter_size_off = 8,
188 thread_off = 9
189 #else
190 rsp_after_call_off = -12,
191 mxcsr_off = rsp_after_call_off,
192 r15_off = -11,
193 r14_off = -10,
194 r13_off = -9,
195 r12_off = -8,
196 rbx_off = -7,
197 call_wrapper_off = -6,
198 result_off = -5,
199 result_type_off = -4,
200 method_off = -3,
201 entry_point_off = -2,
202 parameters_off = -1,
203 rbp_off = 0,
204 retaddr_off = 1,
205 parameter_size_off = 2,
206 thread_off = 3
207 #endif
208 };
209
210 #ifdef _WIN64
211 Address xmm_save(int reg) {
212 assert(reg >= xmm_save_first && reg <= xmm_save_last, "XMM register number out of range");
213 return Address(rbp, (xmm_save_base - (reg - xmm_save_first) * 2) * wordSize);
214 }
215 #endif
216
217 address generate_call_stub(address& return_address) {
218 assert((int)frame::entry_frame_after_call_words == -(int)rsp_after_call_off + 1 &&
219 (int)frame::entry_frame_call_wrapper_offset == (int)call_wrapper_off,
220 "adjust this code");
221 StubCodeMark mark(this, "StubRoutines", "call_stub");
222 address start = __ pc();
223
224 // same as in generate_catch_exception()!
225 const Address rsp_after_call(rbp, rsp_after_call_off * wordSize);
226
227 const Address call_wrapper (rbp, call_wrapper_off * wordSize);
228 const Address result (rbp, result_off * wordSize);
229 const Address result_type (rbp, result_type_off * wordSize);
230 const Address method (rbp, method_off * wordSize);
231 const Address entry_point (rbp, entry_point_off * wordSize);
232 const Address parameters (rbp, parameters_off * wordSize);
233 const Address parameter_size(rbp, parameter_size_off * wordSize);
234
235 // same as in generate_catch_exception()!
236 const Address thread (rbp, thread_off * wordSize);
237
238 const Address r15_save(rbp, r15_off * wordSize);
239 const Address r14_save(rbp, r14_off * wordSize);
240 const Address r13_save(rbp, r13_off * wordSize);
241 const Address r12_save(rbp, r12_off * wordSize);
242 const Address rbx_save(rbp, rbx_off * wordSize);
243
244 // stub code
245 __ enter();
246 __ subptr(rsp, -rsp_after_call_off * wordSize);
247
248 // save register parameters
249 #ifndef _WIN64
250 __ movptr(parameters, c_rarg5); // parameters
251 __ movptr(entry_point, c_rarg4); // entry_point
252 #endif
253
254 __ movptr(method, c_rarg3); // method
255 __ movl(result_type, c_rarg2); // result type
256 __ movptr(result, c_rarg1); // result
257 __ movptr(call_wrapper, c_rarg0); // call wrapper
258
259 // save regs belonging to calling function
260 __ movptr(rbx_save, rbx);
261 __ movptr(r12_save, r12);
262 __ movptr(r13_save, r13);
263 __ movptr(r14_save, r14);
264 __ movptr(r15_save, r15);
265 #ifdef _WIN64
266 for (int i = 6; i <= 15; i++) {
267 __ movdqu(xmm_save(i), as_XMMRegister(i));
268 }
269
270 const Address rdi_save(rbp, rdi_off * wordSize);
271 const Address rsi_save(rbp, rsi_off * wordSize);
272
273 __ movptr(rsi_save, rsi);
274 __ movptr(rdi_save, rdi);
275 #else
276 const Address mxcsr_save(rbp, mxcsr_off * wordSize);
277 {
278 Label skip_ldmx;
279 __ stmxcsr(mxcsr_save);
280 __ movl(rax, mxcsr_save);
281 __ andl(rax, MXCSR_MASK); // Only check control and mask bits
282 ExternalAddress mxcsr_std(StubRoutines::addr_mxcsr_std());
283 __ cmp32(rax, mxcsr_std);
284 __ jcc(Assembler::equal, skip_ldmx);
285 __ ldmxcsr(mxcsr_std);
286 __ bind(skip_ldmx);
287 }
288 #endif
289
290 // Load up thread register
291 __ movptr(r15_thread, thread);
292 __ reinit_heapbase();
293
294 #ifdef ASSERT
295 // make sure we have no pending exceptions
296 {
297 Label L;
298 __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
299 __ jcc(Assembler::equal, L);
300 __ stop("StubRoutines::call_stub: entered with pending exception");
301 __ bind(L);
302 }
303 #endif
304
305 // pass parameters if any
306 BLOCK_COMMENT("pass parameters if any");
307 Label parameters_done;
308 __ movl(c_rarg3, parameter_size);
309 __ testl(c_rarg3, c_rarg3);
310 __ jcc(Assembler::zero, parameters_done);
311
312 Label loop;
313 __ movptr(c_rarg2, parameters); // parameter pointer
314 __ movl(c_rarg1, c_rarg3); // parameter counter is in c_rarg1
315 __ BIND(loop);
316 __ movptr(rax, Address(c_rarg2, 0));// get parameter
317 __ addptr(c_rarg2, wordSize); // advance to next parameter
318 __ decrementl(c_rarg1); // decrement counter
319 __ push(rax); // pass parameter
320 __ jcc(Assembler::notZero, loop);
321
322 // call Java function
323 __ BIND(parameters_done);
324 __ movptr(rbx, method); // get Method*
325 __ movptr(c_rarg1, entry_point); // get entry_point
326 __ mov(r13, rsp); // set sender sp
327 BLOCK_COMMENT("call Java function");
328 __ call(c_rarg1);
329
330 BLOCK_COMMENT("call_stub_return_address:");
331 return_address = __ pc();
332
333 // store result depending on type (everything that is not
334 // T_OBJECT, T_LONG, T_FLOAT or T_DOUBLE is treated as T_INT)
335 __ movptr(c_rarg0, result);
336 Label is_long, is_float, is_double, exit;
337 __ movl(c_rarg1, result_type);
338 __ cmpl(c_rarg1, T_OBJECT);
339 __ jcc(Assembler::equal, is_long);
340 __ cmpl(c_rarg1, T_LONG);
341 __ jcc(Assembler::equal, is_long);
342 __ cmpl(c_rarg1, T_FLOAT);
343 __ jcc(Assembler::equal, is_float);
344 __ cmpl(c_rarg1, T_DOUBLE);
345 __ jcc(Assembler::equal, is_double);
346
347 // handle T_INT case
348 __ movl(Address(c_rarg0, 0), rax);
349
350 __ BIND(exit);
351
352 // pop parameters
353 __ lea(rsp, rsp_after_call);
354
355 #ifdef ASSERT
356 // verify that threads correspond
357 {
358 Label L, S;
359 __ cmpptr(r15_thread, thread);
360 __ jcc(Assembler::notEqual, S);
361 __ get_thread(rbx);
362 __ cmpptr(r15_thread, rbx);
363 __ jcc(Assembler::equal, L);
364 __ bind(S);
365 __ jcc(Assembler::equal, L);
366 __ stop("StubRoutines::call_stub: threads must correspond");
367 __ bind(L);
368 }
369 #endif
370
371 // restore regs belonging to calling function
372 #ifdef _WIN64
373 for (int i = 15; i >= 6; i--) {
374 __ movdqu(as_XMMRegister(i), xmm_save(i));
375 }
376 #endif
377 __ movptr(r15, r15_save);
378 __ movptr(r14, r14_save);
379 __ movptr(r13, r13_save);
380 __ movptr(r12, r12_save);
381 __ movptr(rbx, rbx_save);
382
383 #ifdef _WIN64
384 __ movptr(rdi, rdi_save);
385 __ movptr(rsi, rsi_save);
386 #else
387 __ ldmxcsr(mxcsr_save);
388 #endif
389
390 // restore rsp
391 __ addptr(rsp, -rsp_after_call_off * wordSize);
392
393 // return
394 __ pop(rbp);
395 __ ret(0);
396
397 // handle return types different from T_INT
398 __ BIND(is_long);
399 __ movq(Address(c_rarg0, 0), rax);
400 __ jmp(exit);
401
402 __ BIND(is_float);
403 __ movflt(Address(c_rarg0, 0), xmm0);
404 __ jmp(exit);
405
406 __ BIND(is_double);
407 __ movdbl(Address(c_rarg0, 0), xmm0);
408 __ jmp(exit);
409
410 return start;
411 }
412
413 // Return point for a Java call if there's an exception thrown in
414 // Java code. The exception is caught and transformed into a
415 // pending exception stored in JavaThread that can be tested from
416 // within the VM.
417 //
418 // Note: Usually the parameters are removed by the callee. In case
419 // of an exception crossing an activation frame boundary, that is
420 // not the case if the callee is compiled code => need to setup the
421 // rsp.
422 //
423 // rax: exception oop
424
425 address generate_catch_exception() {
426 StubCodeMark mark(this, "StubRoutines", "catch_exception");
427 address start = __ pc();
428
429 // same as in generate_call_stub():
430 const Address rsp_after_call(rbp, rsp_after_call_off * wordSize);
431 const Address thread (rbp, thread_off * wordSize);
432
433 #ifdef ASSERT
434 // verify that threads correspond
435 {
436 Label L, S;
437 __ cmpptr(r15_thread, thread);
438 __ jcc(Assembler::notEqual, S);
439 __ get_thread(rbx);
440 __ cmpptr(r15_thread, rbx);
441 __ jcc(Assembler::equal, L);
442 __ bind(S);
443 __ stop("StubRoutines::catch_exception: threads must correspond");
444 __ bind(L);
445 }
446 #endif
447
448 // set pending exception
449 __ verify_oop(rax);
450
451 __ movptr(Address(r15_thread, Thread::pending_exception_offset()), rax);
452 __ lea(rscratch1, ExternalAddress((address)__FILE__));
453 __ movptr(Address(r15_thread, Thread::exception_file_offset()), rscratch1);
454 __ movl(Address(r15_thread, Thread::exception_line_offset()), (int) __LINE__);
455
456 // complete return to VM
457 assert(StubRoutines::_call_stub_return_address != NULL,
458 "_call_stub_return_address must have been generated before");
459 __ jump(RuntimeAddress(StubRoutines::_call_stub_return_address));
460
461 return start;
462 }
463
464 // Continuation point for runtime calls returning with a pending
465 // exception. The pending exception check happened in the runtime
466 // or native call stub. The pending exception in Thread is
467 // converted into a Java-level exception.
468 //
469 // Contract with Java-level exception handlers:
470 // rax: exception
471 // rdx: throwing pc
472 //
473 // NOTE: At entry of this stub, exception-pc must be on stack !!
474
475 address generate_forward_exception() {
476 StubCodeMark mark(this, "StubRoutines", "forward exception");
477 address start = __ pc();
478
479 // Upon entry, the sp points to the return address returning into
480 // Java (interpreted or compiled) code; i.e., the return address
481 // becomes the throwing pc.
482 //
483 // Arguments pushed before the runtime call are still on the stack
484 // but the exception handler will reset the stack pointer ->
485 // ignore them. A potential result in registers can be ignored as
486 // well.
487
488 #ifdef ASSERT
489 // make sure this code is only executed if there is a pending exception
490 {
491 Label L;
492 __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t) NULL);
493 __ jcc(Assembler::notEqual, L);
494 __ stop("StubRoutines::forward exception: no pending exception (1)");
495 __ bind(L);
496 }
497 #endif
498
499 // compute exception handler into rbx
500 __ movptr(c_rarg0, Address(rsp, 0));
501 BLOCK_COMMENT("call exception_handler_for_return_address");
502 __ call_VM_leaf(CAST_FROM_FN_PTR(address,
503 SharedRuntime::exception_handler_for_return_address),
504 r15_thread, c_rarg0);
505 __ mov(rbx, rax);
506
507 // setup rax & rdx, remove return address & clear pending exception
508 __ pop(rdx);
509 __ movptr(rax, Address(r15_thread, Thread::pending_exception_offset()));
510 __ movptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
511
512 #ifdef ASSERT
513 // make sure exception is set
514 {
515 Label L;
516 __ testptr(rax, rax);
517 __ jcc(Assembler::notEqual, L);
518 __ stop("StubRoutines::forward exception: no pending exception (2)");
519 __ bind(L);
520 }
521 #endif
522
523 // continue at exception handler (return address removed)
524 // rax: exception
525 // rbx: exception handler
526 // rdx: throwing pc
527 __ verify_oop(rax);
528 __ jmp(rbx);
529
530 return start;
531 }
532
533 // Support for jint atomic::xchg(jint exchange_value, volatile jint* dest)
534 //
535 // Arguments :
536 // c_rarg0: exchange_value
537 // c_rarg0: dest
538 //
539 // Result:
540 // *dest <- ex, return (orig *dest)
541 address generate_atomic_xchg() {
542 StubCodeMark mark(this, "StubRoutines", "atomic_xchg");
543 address start = __ pc();
544
545 __ movl(rax, c_rarg0); // Copy to eax we need a return value anyhow
546 __ xchgl(rax, Address(c_rarg1, 0)); // automatic LOCK
547 __ ret(0);
548
549 return start;
550 }
551
552 // Support for intptr_t atomic::xchg_ptr(intptr_t exchange_value, volatile intptr_t* dest)
553 //
554 // Arguments :
555 // c_rarg0: exchange_value
556 // c_rarg1: dest
557 //
558 // Result:
559 // *dest <- ex, return (orig *dest)
560 address generate_atomic_xchg_ptr() {
561 StubCodeMark mark(this, "StubRoutines", "atomic_xchg_ptr");
562 address start = __ pc();
563
564 __ movptr(rax, c_rarg0); // Copy to eax we need a return value anyhow
565 __ xchgptr(rax, Address(c_rarg1, 0)); // automatic LOCK
566 __ ret(0);
567
568 return start;
569 }
570
571 // Support for jint atomic::atomic_cmpxchg(jint exchange_value, volatile jint* dest,
572 // jint compare_value)
573 //
574 // Arguments :
575 // c_rarg0: exchange_value
576 // c_rarg1: dest
577 // c_rarg2: compare_value
578 //
579 // Result:
580 // if ( compare_value == *dest ) {
581 // *dest = exchange_value
582 // return compare_value;
583 // else
584 // return *dest;
585 address generate_atomic_cmpxchg() {
586 StubCodeMark mark(this, "StubRoutines", "atomic_cmpxchg");
587 address start = __ pc();
588
589 __ movl(rax, c_rarg2);
590 if ( os::is_MP() ) __ lock();
591 __ cmpxchgl(c_rarg0, Address(c_rarg1, 0));
592 __ ret(0);
593
594 return start;
595 }
596
597 // Support for jbyte atomic::atomic_cmpxchg(jbyte exchange_value, volatile jbyte* dest,
598 // jbyte compare_value)
599 //
600 // Arguments :
601 // c_rarg0: exchange_value
602 // c_rarg1: dest
603 // c_rarg2: compare_value
604 //
605 // Result:
606 // if ( compare_value == *dest ) {
607 // *dest = exchange_value
608 // return compare_value;
609 // else
610 // return *dest;
611 address generate_atomic_cmpxchg_byte() {
612 StubCodeMark mark(this, "StubRoutines", "atomic_cmpxchg_byte");
613 address start = __ pc();
614
615 __ movsbq(rax, c_rarg2);
616 if ( os::is_MP() ) __ lock();
617 __ cmpxchgb(c_rarg0, Address(c_rarg1, 0));
618 __ ret(0);
619
620 return start;
621 }
622
623 // Support for jlong atomic::atomic_cmpxchg(jlong exchange_value,
624 // volatile jlong* dest,
625 // jlong compare_value)
626 // Arguments :
627 // c_rarg0: exchange_value
628 // c_rarg1: dest
629 // c_rarg2: compare_value
630 //
631 // Result:
632 // if ( compare_value == *dest ) {
633 // *dest = exchange_value
634 // return compare_value;
635 // else
636 // return *dest;
637 address generate_atomic_cmpxchg_long() {
638 StubCodeMark mark(this, "StubRoutines", "atomic_cmpxchg_long");
639 address start = __ pc();
640
641 __ movq(rax, c_rarg2);
642 if ( os::is_MP() ) __ lock();
643 __ cmpxchgq(c_rarg0, Address(c_rarg1, 0));
644 __ ret(0);
645
646 return start;
647 }
648
649 // Support for jint atomic::add(jint add_value, volatile jint* dest)
650 //
651 // Arguments :
652 // c_rarg0: add_value
653 // c_rarg1: dest
654 //
655 // Result:
656 // *dest += add_value
657 // return *dest;
658 address generate_atomic_add() {
659 StubCodeMark mark(this, "StubRoutines", "atomic_add");
660 address start = __ pc();
661
662 __ movl(rax, c_rarg0);
663 if ( os::is_MP() ) __ lock();
664 __ xaddl(Address(c_rarg1, 0), c_rarg0);
665 __ addl(rax, c_rarg0);
666 __ ret(0);
667
668 return start;
669 }
670
671 // Support for intptr_t atomic::add_ptr(intptr_t add_value, volatile intptr_t* dest)
672 //
673 // Arguments :
674 // c_rarg0: add_value
675 // c_rarg1: dest
676 //
677 // Result:
678 // *dest += add_value
679 // return *dest;
680 address generate_atomic_add_ptr() {
681 StubCodeMark mark(this, "StubRoutines", "atomic_add_ptr");
682 address start = __ pc();
683
684 __ movptr(rax, c_rarg0); // Copy to eax we need a return value anyhow
685 if ( os::is_MP() ) __ lock();
686 __ xaddptr(Address(c_rarg1, 0), c_rarg0);
687 __ addptr(rax, c_rarg0);
688 __ ret(0);
689
690 return start;
691 }
692
693 // Support for intptr_t OrderAccess::fence()
694 //
695 // Arguments :
696 //
697 // Result:
698 address generate_orderaccess_fence() {
699 StubCodeMark mark(this, "StubRoutines", "orderaccess_fence");
700 address start = __ pc();
701 __ membar(Assembler::StoreLoad);
702 __ ret(0);
703
704 return start;
705 }
706
707 // Support for intptr_t get_previous_fp()
708 //
709 // This routine is used to find the previous frame pointer for the
710 // caller (current_frame_guess). This is used as part of debugging
711 // ps() is seemingly lost trying to find frames.
712 // This code assumes that caller current_frame_guess) has a frame.
713 address generate_get_previous_fp() {
714 StubCodeMark mark(this, "StubRoutines", "get_previous_fp");
715 const Address old_fp(rbp, 0);
716 const Address older_fp(rax, 0);
717 address start = __ pc();
718
719 __ enter();
720 __ movptr(rax, old_fp); // callers fp
721 __ movptr(rax, older_fp); // the frame for ps()
722 __ pop(rbp);
723 __ ret(0);
724
725 return start;
726 }
727
728 // Support for intptr_t get_previous_sp()
729 //
730 // This routine is used to find the previous stack pointer for the
731 // caller.
732 address generate_get_previous_sp() {
733 StubCodeMark mark(this, "StubRoutines", "get_previous_sp");
734 address start = __ pc();
735
736 __ movptr(rax, rsp);
737 __ addptr(rax, 8); // return address is at the top of the stack.
738 __ ret(0);
739
740 return start;
741 }
742
743 //----------------------------------------------------------------------------------------------------
744 // Support for void verify_mxcsr()
745 //
746 // This routine is used with -Xcheck:jni to verify that native
747 // JNI code does not return to Java code without restoring the
748 // MXCSR register to our expected state.
749
750 address generate_verify_mxcsr() {
751 StubCodeMark mark(this, "StubRoutines", "verify_mxcsr");
752 address start = __ pc();
753
754 const Address mxcsr_save(rsp, 0);
755
756 if (CheckJNICalls) {
757 Label ok_ret;
758 ExternalAddress mxcsr_std(StubRoutines::addr_mxcsr_std());
759 __ push(rax);
760 __ subptr(rsp, wordSize); // allocate a temp location
761 __ stmxcsr(mxcsr_save);
762 __ movl(rax, mxcsr_save);
763 __ andl(rax, MXCSR_MASK); // Only check control and mask bits
764 __ cmp32(rax, mxcsr_std);
765 __ jcc(Assembler::equal, ok_ret);
766
767 __ warn("MXCSR changed by native JNI code, use -XX:+RestoreMXCSROnJNICall");
768
769 __ ldmxcsr(mxcsr_std);
770
771 __ bind(ok_ret);
772 __ addptr(rsp, wordSize);
773 __ pop(rax);
774 }
775
776 __ ret(0);
777
778 return start;
779 }
780
781 address generate_f2i_fixup() {
782 StubCodeMark mark(this, "StubRoutines", "f2i_fixup");
783 Address inout(rsp, 5 * wordSize); // return address + 4 saves
784
785 address start = __ pc();
786
787 Label L;
788
789 __ push(rax);
790 __ push(c_rarg3);
791 __ push(c_rarg2);
792 __ push(c_rarg1);
793
794 __ movl(rax, 0x7f800000);
795 __ xorl(c_rarg3, c_rarg3);
796 __ movl(c_rarg2, inout);
797 __ movl(c_rarg1, c_rarg2);
798 __ andl(c_rarg1, 0x7fffffff);
799 __ cmpl(rax, c_rarg1); // NaN? -> 0
800 __ jcc(Assembler::negative, L);
801 __ testl(c_rarg2, c_rarg2); // signed ? min_jint : max_jint
802 __ movl(c_rarg3, 0x80000000);
803 __ movl(rax, 0x7fffffff);
804 __ cmovl(Assembler::positive, c_rarg3, rax);
805
806 __ bind(L);
807 __ movptr(inout, c_rarg3);
808
809 __ pop(c_rarg1);
810 __ pop(c_rarg2);
811 __ pop(c_rarg3);
812 __ pop(rax);
813
814 __ ret(0);
815
816 return start;
817 }
818
819 address generate_f2l_fixup() {
820 StubCodeMark mark(this, "StubRoutines", "f2l_fixup");
821 Address inout(rsp, 5 * wordSize); // return address + 4 saves
822 address start = __ pc();
823
824 Label L;
825
826 __ push(rax);
827 __ push(c_rarg3);
828 __ push(c_rarg2);
829 __ push(c_rarg1);
830
831 __ movl(rax, 0x7f800000);
832 __ xorl(c_rarg3, c_rarg3);
833 __ movl(c_rarg2, inout);
834 __ movl(c_rarg1, c_rarg2);
835 __ andl(c_rarg1, 0x7fffffff);
836 __ cmpl(rax, c_rarg1); // NaN? -> 0
837 __ jcc(Assembler::negative, L);
838 __ testl(c_rarg2, c_rarg2); // signed ? min_jlong : max_jlong
839 __ mov64(c_rarg3, 0x8000000000000000);
840 __ mov64(rax, 0x7fffffffffffffff);
841 __ cmov(Assembler::positive, c_rarg3, rax);
842
843 __ bind(L);
844 __ movptr(inout, c_rarg3);
845
846 __ pop(c_rarg1);
847 __ pop(c_rarg2);
848 __ pop(c_rarg3);
849 __ pop(rax);
850
851 __ ret(0);
852
853 return start;
854 }
855
856 address generate_d2i_fixup() {
857 StubCodeMark mark(this, "StubRoutines", "d2i_fixup");
858 Address inout(rsp, 6 * wordSize); // return address + 5 saves
859
860 address start = __ pc();
861
862 Label L;
863
864 __ push(rax);
865 __ push(c_rarg3);
866 __ push(c_rarg2);
867 __ push(c_rarg1);
868 __ push(c_rarg0);
869
870 __ movl(rax, 0x7ff00000);
871 __ movq(c_rarg2, inout);
872 __ movl(c_rarg3, c_rarg2);
873 __ mov(c_rarg1, c_rarg2);
874 __ mov(c_rarg0, c_rarg2);
875 __ negl(c_rarg3);
876 __ shrptr(c_rarg1, 0x20);
877 __ orl(c_rarg3, c_rarg2);
878 __ andl(c_rarg1, 0x7fffffff);
879 __ xorl(c_rarg2, c_rarg2);
880 __ shrl(c_rarg3, 0x1f);
881 __ orl(c_rarg1, c_rarg3);
882 __ cmpl(rax, c_rarg1);
883 __ jcc(Assembler::negative, L); // NaN -> 0
884 __ testptr(c_rarg0, c_rarg0); // signed ? min_jint : max_jint
885 __ movl(c_rarg2, 0x80000000);
886 __ movl(rax, 0x7fffffff);
887 __ cmov(Assembler::positive, c_rarg2, rax);
888
889 __ bind(L);
890 __ movptr(inout, c_rarg2);
891
892 __ pop(c_rarg0);
893 __ pop(c_rarg1);
894 __ pop(c_rarg2);
895 __ pop(c_rarg3);
896 __ pop(rax);
897
898 __ ret(0);
899
900 return start;
901 }
902
903 address generate_d2l_fixup() {
904 StubCodeMark mark(this, "StubRoutines", "d2l_fixup");
905 Address inout(rsp, 6 * wordSize); // return address + 5 saves
906
907 address start = __ pc();
908
909 Label L;
910
911 __ push(rax);
912 __ push(c_rarg3);
913 __ push(c_rarg2);
914 __ push(c_rarg1);
915 __ push(c_rarg0);
916
917 __ movl(rax, 0x7ff00000);
918 __ movq(c_rarg2, inout);
919 __ movl(c_rarg3, c_rarg2);
920 __ mov(c_rarg1, c_rarg2);
921 __ mov(c_rarg0, c_rarg2);
922 __ negl(c_rarg3);
923 __ shrptr(c_rarg1, 0x20);
924 __ orl(c_rarg3, c_rarg2);
925 __ andl(c_rarg1, 0x7fffffff);
926 __ xorl(c_rarg2, c_rarg2);
927 __ shrl(c_rarg3, 0x1f);
928 __ orl(c_rarg1, c_rarg3);
929 __ cmpl(rax, c_rarg1);
930 __ jcc(Assembler::negative, L); // NaN -> 0
931 __ testq(c_rarg0, c_rarg0); // signed ? min_jlong : max_jlong
932 __ mov64(c_rarg2, 0x8000000000000000);
933 __ mov64(rax, 0x7fffffffffffffff);
934 __ cmovq(Assembler::positive, c_rarg2, rax);
935
936 __ bind(L);
937 __ movq(inout, c_rarg2);
938
939 __ pop(c_rarg0);
940 __ pop(c_rarg1);
941 __ pop(c_rarg2);
942 __ pop(c_rarg3);
943 __ pop(rax);
944
945 __ ret(0);
946
947 return start;
948 }
949
950 address generate_fp_mask(const char *stub_name, int64_t mask) {
951 __ align(CodeEntryAlignment);
952 StubCodeMark mark(this, "StubRoutines", stub_name);
953 address start = __ pc();
954
955 __ emit_data64( mask, relocInfo::none );
956 __ emit_data64( mask, relocInfo::none );
957
958 return start;
959 }
960
961 // The following routine generates a subroutine to throw an
962 // asynchronous UnknownError when an unsafe access gets a fault that
963 // could not be reasonably prevented by the programmer. (Example:
964 // SIGBUS/OBJERR.)
965 address generate_handler_for_unsafe_access() {
966 StubCodeMark mark(this, "StubRoutines", "handler_for_unsafe_access");
967 address start = __ pc();
968
969 __ push(0); // hole for return address-to-be
970 __ pusha(); // push registers
971 Address next_pc(rsp, RegisterImpl::number_of_registers * BytesPerWord);
972
973 // FIXME: this probably needs alignment logic
974
975 __ subptr(rsp, frame::arg_reg_save_area_bytes);
976 BLOCK_COMMENT("call handle_unsafe_access");
977 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, handle_unsafe_access)));
978 __ addptr(rsp, frame::arg_reg_save_area_bytes);
979
980 __ movptr(next_pc, rax); // stuff next address
981 __ popa();
982 __ ret(0); // jump to next address
983
984 return start;
985 }
986
987 // Non-destructive plausibility checks for oops
988 //
989 // Arguments:
990 // all args on stack!
991 //
992 // Stack after saving c_rarg3:
993 // [tos + 0]: saved c_rarg3
994 // [tos + 1]: saved c_rarg2
995 // [tos + 2]: saved r12 (several TemplateTable methods use it)
996 // [tos + 3]: saved flags
997 // [tos + 4]: return address
998 // * [tos + 5]: error message (char*)
999 // * [tos + 6]: object to verify (oop)
1000 // * [tos + 7]: saved rax - saved by caller and bashed
1001 // * [tos + 8]: saved r10 (rscratch1) - saved by caller
1002 // * = popped on exit
1003 address generate_verify_oop() {
1004 StubCodeMark mark(this, "StubRoutines", "verify_oop");
1005 address start = __ pc();
1006
1007 Label exit, error;
1008
1009 __ pushf();
1010 __ incrementl(ExternalAddress((address) StubRoutines::verify_oop_count_addr()));
1011
1012 __ push(r12);
1013
1014 // save c_rarg2 and c_rarg3
1015 __ push(c_rarg2);
1016 __ push(c_rarg3);
1017
1018 enum {
1019 // After previous pushes.
1020 oop_to_verify = 6 * wordSize,
1021 saved_rax = 7 * wordSize,
1022 saved_r10 = 8 * wordSize,
1023
1024 // Before the call to MacroAssembler::debug(), see below.
1025 return_addr = 16 * wordSize,
1026 error_msg = 17 * wordSize
1027 };
1028
1029 // get object
1030 __ movptr(rax, Address(rsp, oop_to_verify));
1031
1032 // make sure object is 'reasonable'
1033 __ testptr(rax, rax);
1034 __ jcc(Assembler::zero, exit); // if obj is NULL it is OK
1035 // Check if the oop is in the right area of memory
1036 __ movptr(c_rarg2, rax);
1037 __ movptr(c_rarg3, (intptr_t) Universe::verify_oop_mask());
1038 __ andptr(c_rarg2, c_rarg3);
1039 __ movptr(c_rarg3, (intptr_t) Universe::verify_oop_bits());
1040 __ cmpptr(c_rarg2, c_rarg3);
1041 __ jcc(Assembler::notZero, error);
1042
1043 // set r12 to heapbase for load_klass()
1044 __ reinit_heapbase();
1045
1046 // make sure klass is 'reasonable', which is not zero.
1047 __ load_klass(rax, rax); // get klass
1048 __ testptr(rax, rax);
1049 __ jcc(Assembler::zero, error); // if klass is NULL it is broken
1050
1051 // return if everything seems ok
1052 __ bind(exit);
1053 __ movptr(rax, Address(rsp, saved_rax)); // get saved rax back
1054 __ movptr(rscratch1, Address(rsp, saved_r10)); // get saved r10 back
1055 __ pop(c_rarg3); // restore c_rarg3
1056 __ pop(c_rarg2); // restore c_rarg2
1057 __ pop(r12); // restore r12
1058 __ popf(); // restore flags
1059 __ ret(4 * wordSize); // pop caller saved stuff
1060
1061 // handle errors
1062 __ bind(error);
1063 __ movptr(rax, Address(rsp, saved_rax)); // get saved rax back
1064 __ movptr(rscratch1, Address(rsp, saved_r10)); // get saved r10 back
1065 __ pop(c_rarg3); // get saved c_rarg3 back
1066 __ pop(c_rarg2); // get saved c_rarg2 back
1067 __ pop(r12); // get saved r12 back
1068 __ popf(); // get saved flags off stack --
1069 // will be ignored
1070
1071 __ pusha(); // push registers
1072 // (rip is already
1073 // already pushed)
1074 // debug(char* msg, int64_t pc, int64_t regs[])
1075 // We've popped the registers we'd saved (c_rarg3, c_rarg2 and flags), and
1076 // pushed all the registers, so now the stack looks like:
1077 // [tos + 0] 16 saved registers
1078 // [tos + 16] return address
1079 // * [tos + 17] error message (char*)
1080 // * [tos + 18] object to verify (oop)
1081 // * [tos + 19] saved rax - saved by caller and bashed
1082 // * [tos + 20] saved r10 (rscratch1) - saved by caller
1083 // * = popped on exit
1084
1085 __ movptr(c_rarg0, Address(rsp, error_msg)); // pass address of error message
1086 __ movptr(c_rarg1, Address(rsp, return_addr)); // pass return address
1087 __ movq(c_rarg2, rsp); // pass address of regs on stack
1088 __ mov(r12, rsp); // remember rsp
1089 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows
1090 __ andptr(rsp, -16); // align stack as required by ABI
1091 BLOCK_COMMENT("call MacroAssembler::debug");
1092 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, MacroAssembler::debug64)));
1093 __ mov(rsp, r12); // restore rsp
1094 __ popa(); // pop registers (includes r12)
1095 __ ret(4 * wordSize); // pop caller saved stuff
1096
1097 return start;
1098 }
1099
1100 //
1101 // Verify that a register contains clean 32-bits positive value
1102 // (high 32-bits are 0) so it could be used in 64-bits shifts.
1103 //
1104 // Input:
1105 // Rint - 32-bits value
1106 // Rtmp - scratch
1107 //
1108 void assert_clean_int(Register Rint, Register Rtmp) {
1109 #ifdef ASSERT
1110 Label L;
1111 assert_different_registers(Rtmp, Rint);
1112 __ movslq(Rtmp, Rint);
1113 __ cmpq(Rtmp, Rint);
1114 __ jcc(Assembler::equal, L);
1115 __ stop("high 32-bits of int value are not 0");
1116 __ bind(L);
1117 #endif
1118 }
1119
1120 // Generate overlap test for array copy stubs
1121 //
1122 // Input:
1123 // c_rarg0 - from
1124 // c_rarg1 - to
1125 // c_rarg2 - element count
1126 //
1127 // Output:
1128 // rax - &from[element count - 1]
1129 //
1130 void array_overlap_test(address no_overlap_target, Address::ScaleFactor sf) {
1131 assert(no_overlap_target != NULL, "must be generated");
1132 array_overlap_test(no_overlap_target, NULL, sf);
1133 }
1134 void array_overlap_test(Label& L_no_overlap, Address::ScaleFactor sf) {
1135 array_overlap_test(NULL, &L_no_overlap, sf);
1136 }
1137 void array_overlap_test(address no_overlap_target, Label* NOLp, Address::ScaleFactor sf) {
1138 const Register from = c_rarg0;
1139 const Register to = c_rarg1;
1140 const Register count = c_rarg2;
1141 const Register end_from = rax;
1142
1143 __ cmpptr(to, from);
1144 __ lea(end_from, Address(from, count, sf, 0));
1145 if (NOLp == NULL) {
1146 ExternalAddress no_overlap(no_overlap_target);
1147 __ jump_cc(Assembler::belowEqual, no_overlap);
1148 __ cmpptr(to, end_from);
1149 __ jump_cc(Assembler::aboveEqual, no_overlap);
1150 } else {
1151 __ jcc(Assembler::belowEqual, (*NOLp));
1152 __ cmpptr(to, end_from);
1153 __ jcc(Assembler::aboveEqual, (*NOLp));
1154 }
1155 }
1156
1157 // Shuffle first three arg regs on Windows into Linux/Solaris locations.
1158 //
1159 // Outputs:
1160 // rdi - rcx
1161 // rsi - rdx
1162 // rdx - r8
1163 // rcx - r9
1164 //
1165 // Registers r9 and r10 are used to save rdi and rsi on Windows, which latter
1166 // are non-volatile. r9 and r10 should not be used by the caller.
1167 //
1168 void setup_arg_regs(int nargs = 3) {
1169 const Register saved_rdi = r9;
1170 const Register saved_rsi = r10;
1171 assert(nargs == 3 || nargs == 4, "else fix");
1172 #ifdef _WIN64
1173 assert(c_rarg0 == rcx && c_rarg1 == rdx && c_rarg2 == r8 && c_rarg3 == r9,
1174 "unexpected argument registers");
1175 if (nargs >= 4)
1176 __ mov(rax, r9); // r9 is also saved_rdi
1177 __ movptr(saved_rdi, rdi);
1178 __ movptr(saved_rsi, rsi);
1179 __ mov(rdi, rcx); // c_rarg0
1180 __ mov(rsi, rdx); // c_rarg1
1181 __ mov(rdx, r8); // c_rarg2
1182 if (nargs >= 4)
1183 __ mov(rcx, rax); // c_rarg3 (via rax)
1184 #else
1185 assert(c_rarg0 == rdi && c_rarg1 == rsi && c_rarg2 == rdx && c_rarg3 == rcx,
1186 "unexpected argument registers");
1187 #endif
1188 }
1189
1190 void restore_arg_regs() {
1191 const Register saved_rdi = r9;
1192 const Register saved_rsi = r10;
1193 #ifdef _WIN64
1194 __ movptr(rdi, saved_rdi);
1195 __ movptr(rsi, saved_rsi);
1196 #endif
1197 }
1198
1199 // Generate code for an array write pre barrier
1200 //
1201 // addr - starting address
1202 // count - element count
1203 // tmp - scratch register
1204 //
1205 // Destroy no registers!
1206 //
1207 void gen_write_ref_array_pre_barrier(Register addr, Register count, bool dest_uninitialized) {
1208 BarrierSet* bs = Universe::heap()->barrier_set();
1209 switch (bs->kind()) {
1210 case BarrierSet::G1SATBCTLogging:
1211 // With G1, don't generate the call if we statically know that the target in uninitialized
1212 if (!dest_uninitialized) {
1213 __ pusha(); // push registers
1214 if (count == c_rarg0) {
1215 if (addr == c_rarg1) {
1216 // exactly backwards!!
1217 __ xchgptr(c_rarg1, c_rarg0);
1218 } else {
1219 __ movptr(c_rarg1, count);
1220 __ movptr(c_rarg0, addr);
1221 }
1222 } else {
1223 __ movptr(c_rarg0, addr);
1224 __ movptr(c_rarg1, count);
1225 }
1226 __ call_VM_leaf(CAST_FROM_FN_PTR(address, BarrierSet::static_write_ref_array_pre), 2);
1227 __ popa();
1228 }
1229 break;
1230 case BarrierSet::CardTableModRef:
1231 case BarrierSet::CardTableExtension:
1232 case BarrierSet::ModRef:
1233 break;
1234 default:
1235 ShouldNotReachHere();
1236
1237 }
1238 }
1239
1240 //
1241 // Generate code for an array write post barrier
1242 //
1243 // Input:
1244 // start - register containing starting address of destination array
1245 // count - elements count
1246 // scratch - scratch register
1247 //
1248 // The input registers are overwritten.
1249 //
1250 void gen_write_ref_array_post_barrier(Register start, Register count, Register scratch) {
1251 assert_different_registers(start, count, scratch);
1252 BarrierSet* bs = Universe::heap()->barrier_set();
1253 switch (bs->kind()) {
1254 case BarrierSet::G1SATBCTLogging:
1255 {
1256 __ pusha(); // push registers (overkill)
1257 if (c_rarg0 == count) { // On win64 c_rarg0 == rcx
1258 assert_different_registers(c_rarg1, start);
1259 __ mov(c_rarg1, count);
1260 __ mov(c_rarg0, start);
1261 } else {
1262 assert_different_registers(c_rarg0, count);
1263 __ mov(c_rarg0, start);
1264 __ mov(c_rarg1, count);
1265 }
1266 __ call_VM_leaf(CAST_FROM_FN_PTR(address, BarrierSet::static_write_ref_array_post), 2);
1267 __ popa();
1268 }
1269 break;
1270 case BarrierSet::CardTableModRef:
1271 case BarrierSet::CardTableExtension:
1272 {
1273 CardTableModRefBS* ct = barrier_set_cast<CardTableModRefBS>(bs);
1274 assert(sizeof(*ct->byte_map_base) == sizeof(jbyte), "adjust this code");
1275
1276 Label L_loop;
1277 const Register end = count;
1278
1279 __ leaq(end, Address(start, count, TIMES_OOP, 0)); // end == start+count*oop_size
1280 __ subptr(end, BytesPerHeapOop); // end - 1 to make inclusive
1281 __ shrptr(start, CardTableModRefBS::card_shift);
1282 __ shrptr(end, CardTableModRefBS::card_shift);
1283 __ subptr(end, start); // end --> cards count
1284
1285 int64_t disp = (int64_t) ct->byte_map_base;
1286 __ mov64(scratch, disp);
1287 __ addptr(start, scratch);
1288 __ BIND(L_loop);
1289 __ movb(Address(start, count, Address::times_1), 0);
1290 __ decrement(count);
1291 __ jcc(Assembler::greaterEqual, L_loop);
1292 }
1293 break;
1294 default:
1295 ShouldNotReachHere();
1296
1297 }
1298 }
1299
1300
1301 // Copy big chunks forward
1302 //
1303 // Inputs:
1304 // end_from - source arrays end address
1305 // end_to - destination array end address
1306 // qword_count - 64-bits element count, negative
1307 // to - scratch
1308 // L_copy_bytes - entry label
1309 // L_copy_8_bytes - exit label
1310 //
1311 void copy_bytes_forward(Register end_from, Register end_to,
1312 Register qword_count, Register to,
1313 Label& L_copy_bytes, Label& L_copy_8_bytes) {
1314 DEBUG_ONLY(__ stop("enter at entry label, not here"));
1315 Label L_loop;
1316 __ align(OptoLoopAlignment);
1317 if (UseUnalignedLoadStores) {
1318 Label L_end;
1319 // Copy 64-bytes per iteration
1320 __ BIND(L_loop);
1321 if (UseAVX >= 2) {
1322 __ vmovdqu(xmm0, Address(end_from, qword_count, Address::times_8, -56));
1323 __ vmovdqu(Address(end_to, qword_count, Address::times_8, -56), xmm0);
1324 __ vmovdqu(xmm1, Address(end_from, qword_count, Address::times_8, -24));
1325 __ vmovdqu(Address(end_to, qword_count, Address::times_8, -24), xmm1);
1326 } else {
1327 __ movdqu(xmm0, Address(end_from, qword_count, Address::times_8, -56));
1328 __ movdqu(Address(end_to, qword_count, Address::times_8, -56), xmm0);
1329 __ movdqu(xmm1, Address(end_from, qword_count, Address::times_8, -40));
1330 __ movdqu(Address(end_to, qword_count, Address::times_8, -40), xmm1);
1331 __ movdqu(xmm2, Address(end_from, qword_count, Address::times_8, -24));
1332 __ movdqu(Address(end_to, qword_count, Address::times_8, -24), xmm2);
1333 __ movdqu(xmm3, Address(end_from, qword_count, Address::times_8, - 8));
1334 __ movdqu(Address(end_to, qword_count, Address::times_8, - 8), xmm3);
1335 }
1336 __ BIND(L_copy_bytes);
1337 __ addptr(qword_count, 8);
1338 __ jcc(Assembler::lessEqual, L_loop);
1339 __ subptr(qword_count, 4); // sub(8) and add(4)
1340 __ jccb(Assembler::greater, L_end);
1341 // Copy trailing 32 bytes
1342 if (UseAVX >= 2) {
1343 __ vmovdqu(xmm0, Address(end_from, qword_count, Address::times_8, -24));
1344 __ vmovdqu(Address(end_to, qword_count, Address::times_8, -24), xmm0);
1345 } else {
1346 __ movdqu(xmm0, Address(end_from, qword_count, Address::times_8, -24));
1347 __ movdqu(Address(end_to, qword_count, Address::times_8, -24), xmm0);
1348 __ movdqu(xmm1, Address(end_from, qword_count, Address::times_8, - 8));
1349 __ movdqu(Address(end_to, qword_count, Address::times_8, - 8), xmm1);
1350 }
1351 __ addptr(qword_count, 4);
1352 __ BIND(L_end);
1353 if (UseAVX >= 2) {
1354 // clean upper bits of YMM registers
1355 __ vzeroupper();
1356 }
1357 } else {
1358 // Copy 32-bytes per iteration
1359 __ BIND(L_loop);
1360 __ movq(to, Address(end_from, qword_count, Address::times_8, -24));
1361 __ movq(Address(end_to, qword_count, Address::times_8, -24), to);
1362 __ movq(to, Address(end_from, qword_count, Address::times_8, -16));
1363 __ movq(Address(end_to, qword_count, Address::times_8, -16), to);
1364 __ movq(to, Address(end_from, qword_count, Address::times_8, - 8));
1365 __ movq(Address(end_to, qword_count, Address::times_8, - 8), to);
1366 __ movq(to, Address(end_from, qword_count, Address::times_8, - 0));
1367 __ movq(Address(end_to, qword_count, Address::times_8, - 0), to);
1368
1369 __ BIND(L_copy_bytes);
1370 __ addptr(qword_count, 4);
1371 __ jcc(Assembler::lessEqual, L_loop);
1372 }
1373 __ subptr(qword_count, 4);
1374 __ jcc(Assembler::less, L_copy_8_bytes); // Copy trailing qwords
1375 }
1376
1377 // Copy big chunks backward
1378 //
1379 // Inputs:
1380 // from - source arrays address
1381 // dest - destination array address
1382 // qword_count - 64-bits element count
1383 // to - scratch
1384 // L_copy_bytes - entry label
1385 // L_copy_8_bytes - exit label
1386 //
1387 void copy_bytes_backward(Register from, Register dest,
1388 Register qword_count, Register to,
1389 Label& L_copy_bytes, Label& L_copy_8_bytes) {
1390 DEBUG_ONLY(__ stop("enter at entry label, not here"));
1391 Label L_loop;
1392 __ align(OptoLoopAlignment);
1393 if (UseUnalignedLoadStores) {
1394 Label L_end;
1395 // Copy 64-bytes per iteration
1396 __ BIND(L_loop);
1397 if (UseAVX >= 2) {
1398 __ vmovdqu(xmm0, Address(from, qword_count, Address::times_8, 32));
1399 __ vmovdqu(Address(dest, qword_count, Address::times_8, 32), xmm0);
1400 __ vmovdqu(xmm1, Address(from, qword_count, Address::times_8, 0));
1401 __ vmovdqu(Address(dest, qword_count, Address::times_8, 0), xmm1);
1402 } else {
1403 __ movdqu(xmm0, Address(from, qword_count, Address::times_8, 48));
1404 __ movdqu(Address(dest, qword_count, Address::times_8, 48), xmm0);
1405 __ movdqu(xmm1, Address(from, qword_count, Address::times_8, 32));
1406 __ movdqu(Address(dest, qword_count, Address::times_8, 32), xmm1);
1407 __ movdqu(xmm2, Address(from, qword_count, Address::times_8, 16));
1408 __ movdqu(Address(dest, qword_count, Address::times_8, 16), xmm2);
1409 __ movdqu(xmm3, Address(from, qword_count, Address::times_8, 0));
1410 __ movdqu(Address(dest, qword_count, Address::times_8, 0), xmm3);
1411 }
1412 __ BIND(L_copy_bytes);
1413 __ subptr(qword_count, 8);
1414 __ jcc(Assembler::greaterEqual, L_loop);
1415
1416 __ addptr(qword_count, 4); // add(8) and sub(4)
1417 __ jccb(Assembler::less, L_end);
1418 // Copy trailing 32 bytes
1419 if (UseAVX >= 2) {
1420 __ vmovdqu(xmm0, Address(from, qword_count, Address::times_8, 0));
1421 __ vmovdqu(Address(dest, qword_count, Address::times_8, 0), xmm0);
1422 } else {
1423 __ movdqu(xmm0, Address(from, qword_count, Address::times_8, 16));
1424 __ movdqu(Address(dest, qword_count, Address::times_8, 16), xmm0);
1425 __ movdqu(xmm1, Address(from, qword_count, Address::times_8, 0));
1426 __ movdqu(Address(dest, qword_count, Address::times_8, 0), xmm1);
1427 }
1428 __ subptr(qword_count, 4);
1429 __ BIND(L_end);
1430 if (UseAVX >= 2) {
1431 // clean upper bits of YMM registers
1432 __ vzeroupper();
1433 }
1434 } else {
1435 // Copy 32-bytes per iteration
1436 __ BIND(L_loop);
1437 __ movq(to, Address(from, qword_count, Address::times_8, 24));
1438 __ movq(Address(dest, qword_count, Address::times_8, 24), to);
1439 __ movq(to, Address(from, qword_count, Address::times_8, 16));
1440 __ movq(Address(dest, qword_count, Address::times_8, 16), to);
1441 __ movq(to, Address(from, qword_count, Address::times_8, 8));
1442 __ movq(Address(dest, qword_count, Address::times_8, 8), to);
1443 __ movq(to, Address(from, qword_count, Address::times_8, 0));
1444 __ movq(Address(dest, qword_count, Address::times_8, 0), to);
1445
1446 __ BIND(L_copy_bytes);
1447 __ subptr(qword_count, 4);
1448 __ jcc(Assembler::greaterEqual, L_loop);
1449 }
1450 __ addptr(qword_count, 4);
1451 __ jcc(Assembler::greater, L_copy_8_bytes); // Copy trailing qwords
1452 }
1453
1454
1455 // Arguments:
1456 // aligned - true => Input and output aligned on a HeapWord == 8-byte boundary
1457 // ignored
1458 // name - stub name string
1459 //
1460 // Inputs:
1461 // c_rarg0 - source array address
1462 // c_rarg1 - destination array address
1463 // c_rarg2 - element count, treated as ssize_t, can be zero
1464 //
1465 // If 'from' and/or 'to' are aligned on 4-, 2-, or 1-byte boundaries,
1466 // we let the hardware handle it. The one to eight bytes within words,
1467 // dwords or qwords that span cache line boundaries will still be loaded
1468 // and stored atomically.
1469 //
1470 // Side Effects:
1471 // disjoint_byte_copy_entry is set to the no-overlap entry point
1472 // used by generate_conjoint_byte_copy().
1473 //
1474 address generate_disjoint_byte_copy(bool aligned, address* entry, const char *name) {
1475 __ align(CodeEntryAlignment);
1476 StubCodeMark mark(this, "StubRoutines", name);
1477 address start = __ pc();
1478
1479 Label L_copy_bytes, L_copy_8_bytes, L_copy_4_bytes, L_copy_2_bytes;
1480 Label L_copy_byte, L_exit;
1481 const Register from = rdi; // source array address
1482 const Register to = rsi; // destination array address
1483 const Register count = rdx; // elements count
1484 const Register byte_count = rcx;
1485 const Register qword_count = count;
1486 const Register end_from = from; // source array end address
1487 const Register end_to = to; // destination array end address
1488 // End pointers are inclusive, and if count is not zero they point
1489 // to the last unit copied: end_to[0] := end_from[0]
1490
1491 __ enter(); // required for proper stackwalking of RuntimeStub frame
1492 assert_clean_int(c_rarg2, rax); // Make sure 'count' is clean int.
1493
1494 if (entry != NULL) {
1495 *entry = __ pc();
1496 // caller can pass a 64-bit byte count here (from Unsafe.copyMemory)
1497 BLOCK_COMMENT("Entry:");
1498 }
1499
1500 setup_arg_regs(); // from => rdi, to => rsi, count => rdx
1501 // r9 and r10 may be used to save non-volatile registers
1502
1503 // 'from', 'to' and 'count' are now valid
1504 __ movptr(byte_count, count);
1505 __ shrptr(count, 3); // count => qword_count
1506
1507 // Copy from low to high addresses. Use 'to' as scratch.
1508 __ lea(end_from, Address(from, qword_count, Address::times_8, -8));
1509 __ lea(end_to, Address(to, qword_count, Address::times_8, -8));
1510 __ negptr(qword_count); // make the count negative
1511 __ jmp(L_copy_bytes);
1512
1513 // Copy trailing qwords
1514 __ BIND(L_copy_8_bytes);
1515 __ movq(rax, Address(end_from, qword_count, Address::times_8, 8));
1516 __ movq(Address(end_to, qword_count, Address::times_8, 8), rax);
1517 __ increment(qword_count);
1518 __ jcc(Assembler::notZero, L_copy_8_bytes);
1519
1520 // Check for and copy trailing dword
1521 __ BIND(L_copy_4_bytes);
1522 __ testl(byte_count, 4);
1523 __ jccb(Assembler::zero, L_copy_2_bytes);
1524 __ movl(rax, Address(end_from, 8));
1525 __ movl(Address(end_to, 8), rax);
1526
1527 __ addptr(end_from, 4);
1528 __ addptr(end_to, 4);
1529
1530 // Check for and copy trailing word
1531 __ BIND(L_copy_2_bytes);
1532 __ testl(byte_count, 2);
1533 __ jccb(Assembler::zero, L_copy_byte);
1534 __ movw(rax, Address(end_from, 8));
1535 __ movw(Address(end_to, 8), rax);
1536
1537 __ addptr(end_from, 2);
1538 __ addptr(end_to, 2);
1539
1540 // Check for and copy trailing byte
1541 __ BIND(L_copy_byte);
1542 __ testl(byte_count, 1);
1543 __ jccb(Assembler::zero, L_exit);
1544 __ movb(rax, Address(end_from, 8));
1545 __ movb(Address(end_to, 8), rax);
1546
1547 __ BIND(L_exit);
1548 restore_arg_regs();
1549 inc_counter_np(SharedRuntime::_jbyte_array_copy_ctr); // Update counter after rscratch1 is free
1550 __ xorptr(rax, rax); // return 0
1551 __ leave(); // required for proper stackwalking of RuntimeStub frame
1552 __ ret(0);
1553
1554 // Copy in multi-bytes chunks
1555 copy_bytes_forward(end_from, end_to, qword_count, rax, L_copy_bytes, L_copy_8_bytes);
1556 __ jmp(L_copy_4_bytes);
1557
1558 return start;
1559 }
1560
1561 // Arguments:
1562 // aligned - true => Input and output aligned on a HeapWord == 8-byte boundary
1563 // ignored
1564 // name - stub name string
1565 //
1566 // Inputs:
1567 // c_rarg0 - source array address
1568 // c_rarg1 - destination array address
1569 // c_rarg2 - element count, treated as ssize_t, can be zero
1570 //
1571 // If 'from' and/or 'to' are aligned on 4-, 2-, or 1-byte boundaries,
1572 // we let the hardware handle it. The one to eight bytes within words,
1573 // dwords or qwords that span cache line boundaries will still be loaded
1574 // and stored atomically.
1575 //
1576 address generate_conjoint_byte_copy(bool aligned, address nooverlap_target,
1577 address* entry, const char *name) {
1578 __ align(CodeEntryAlignment);
1579 StubCodeMark mark(this, "StubRoutines", name);
1580 address start = __ pc();
1581
1582 Label L_copy_bytes, L_copy_8_bytes, L_copy_4_bytes, L_copy_2_bytes;
1583 const Register from = rdi; // source array address
1584 const Register to = rsi; // destination array address
1585 const Register count = rdx; // elements count
1586 const Register byte_count = rcx;
1587 const Register qword_count = count;
1588
1589 __ enter(); // required for proper stackwalking of RuntimeStub frame
1590 assert_clean_int(c_rarg2, rax); // Make sure 'count' is clean int.
1591
1592 if (entry != NULL) {
1593 *entry = __ pc();
1594 // caller can pass a 64-bit byte count here (from Unsafe.copyMemory)
1595 BLOCK_COMMENT("Entry:");
1596 }
1597
1598 array_overlap_test(nooverlap_target, Address::times_1);
1599 setup_arg_regs(); // from => rdi, to => rsi, count => rdx
1600 // r9 and r10 may be used to save non-volatile registers
1601
1602 // 'from', 'to' and 'count' are now valid
1603 __ movptr(byte_count, count);
1604 __ shrptr(count, 3); // count => qword_count
1605
1606 // Copy from high to low addresses.
1607
1608 // Check for and copy trailing byte
1609 __ testl(byte_count, 1);
1610 __ jcc(Assembler::zero, L_copy_2_bytes);
1611 __ movb(rax, Address(from, byte_count, Address::times_1, -1));
1612 __ movb(Address(to, byte_count, Address::times_1, -1), rax);
1613 __ decrement(byte_count); // Adjust for possible trailing word
1614
1615 // Check for and copy trailing word
1616 __ BIND(L_copy_2_bytes);
1617 __ testl(byte_count, 2);
1618 __ jcc(Assembler::zero, L_copy_4_bytes);
1619 __ movw(rax, Address(from, byte_count, Address::times_1, -2));
1620 __ movw(Address(to, byte_count, Address::times_1, -2), rax);
1621
1622 // Check for and copy trailing dword
1623 __ BIND(L_copy_4_bytes);
1624 __ testl(byte_count, 4);
1625 __ jcc(Assembler::zero, L_copy_bytes);
1626 __ movl(rax, Address(from, qword_count, Address::times_8));
1627 __ movl(Address(to, qword_count, Address::times_8), rax);
1628 __ jmp(L_copy_bytes);
1629
1630 // Copy trailing qwords
1631 __ BIND(L_copy_8_bytes);
1632 __ movq(rax, Address(from, qword_count, Address::times_8, -8));
1633 __ movq(Address(to, qword_count, Address::times_8, -8), rax);
1634 __ decrement(qword_count);
1635 __ jcc(Assembler::notZero, L_copy_8_bytes);
1636
1637 restore_arg_regs();
1638 inc_counter_np(SharedRuntime::_jbyte_array_copy_ctr); // Update counter after rscratch1 is free
1639 __ xorptr(rax, rax); // return 0
1640 __ leave(); // required for proper stackwalking of RuntimeStub frame
1641 __ ret(0);
1642
1643 // Copy in multi-bytes chunks
1644 copy_bytes_backward(from, to, qword_count, rax, L_copy_bytes, L_copy_8_bytes);
1645
1646 restore_arg_regs();
1647 inc_counter_np(SharedRuntime::_jbyte_array_copy_ctr); // Update counter after rscratch1 is free
1648 __ xorptr(rax, rax); // return 0
1649 __ leave(); // required for proper stackwalking of RuntimeStub frame
1650 __ ret(0);
1651
1652 return start;
1653 }
1654
1655 // Arguments:
1656 // aligned - true => Input and output aligned on a HeapWord == 8-byte boundary
1657 // ignored
1658 // name - stub name string
1659 //
1660 // Inputs:
1661 // c_rarg0 - source array address
1662 // c_rarg1 - destination array address
1663 // c_rarg2 - element count, treated as ssize_t, can be zero
1664 //
1665 // If 'from' and/or 'to' are aligned on 4- or 2-byte boundaries, we
1666 // let the hardware handle it. The two or four words within dwords
1667 // or qwords that span cache line boundaries will still be loaded
1668 // and stored atomically.
1669 //
1670 // Side Effects:
1671 // disjoint_short_copy_entry is set to the no-overlap entry point
1672 // used by generate_conjoint_short_copy().
1673 //
1674 address generate_disjoint_short_copy(bool aligned, address *entry, const char *name) {
1675 __ align(CodeEntryAlignment);
1676 StubCodeMark mark(this, "StubRoutines", name);
1677 address start = __ pc();
1678
1679 Label L_copy_bytes, L_copy_8_bytes, L_copy_4_bytes,L_copy_2_bytes,L_exit;
1680 const Register from = rdi; // source array address
1681 const Register to = rsi; // destination array address
1682 const Register count = rdx; // elements count
1683 const Register word_count = rcx;
1684 const Register qword_count = count;
1685 const Register end_from = from; // source array end address
1686 const Register end_to = to; // destination array end address
1687 // End pointers are inclusive, and if count is not zero they point
1688 // to the last unit copied: end_to[0] := end_from[0]
1689
1690 __ enter(); // required for proper stackwalking of RuntimeStub frame
1691 assert_clean_int(c_rarg2, rax); // Make sure 'count' is clean int.
1692
1693 if (entry != NULL) {
1694 *entry = __ pc();
1695 // caller can pass a 64-bit byte count here (from Unsafe.copyMemory)
1696 BLOCK_COMMENT("Entry:");
1697 }
1698
1699 setup_arg_regs(); // from => rdi, to => rsi, count => rdx
1700 // r9 and r10 may be used to save non-volatile registers
1701
1702 // 'from', 'to' and 'count' are now valid
1703 __ movptr(word_count, count);
1704 __ shrptr(count, 2); // count => qword_count
1705
1706 // Copy from low to high addresses. Use 'to' as scratch.
1707 __ lea(end_from, Address(from, qword_count, Address::times_8, -8));
1708 __ lea(end_to, Address(to, qword_count, Address::times_8, -8));
1709 __ negptr(qword_count);
1710 __ jmp(L_copy_bytes);
1711
1712 // Copy trailing qwords
1713 __ BIND(L_copy_8_bytes);
1714 __ movq(rax, Address(end_from, qword_count, Address::times_8, 8));
1715 __ movq(Address(end_to, qword_count, Address::times_8, 8), rax);
1716 __ increment(qword_count);
1717 __ jcc(Assembler::notZero, L_copy_8_bytes);
1718
1719 // Original 'dest' is trashed, so we can't use it as a
1720 // base register for a possible trailing word copy
1721
1722 // Check for and copy trailing dword
1723 __ BIND(L_copy_4_bytes);
1724 __ testl(word_count, 2);
1725 __ jccb(Assembler::zero, L_copy_2_bytes);
1726 __ movl(rax, Address(end_from, 8));
1727 __ movl(Address(end_to, 8), rax);
1728
1729 __ addptr(end_from, 4);
1730 __ addptr(end_to, 4);
1731
1732 // Check for and copy trailing word
1733 __ BIND(L_copy_2_bytes);
1734 __ testl(word_count, 1);
1735 __ jccb(Assembler::zero, L_exit);
1736 __ movw(rax, Address(end_from, 8));
1737 __ movw(Address(end_to, 8), rax);
1738
1739 __ BIND(L_exit);
1740 restore_arg_regs();
1741 inc_counter_np(SharedRuntime::_jshort_array_copy_ctr); // Update counter after rscratch1 is free
1742 __ xorptr(rax, rax); // return 0
1743 __ leave(); // required for proper stackwalking of RuntimeStub frame
1744 __ ret(0);
1745
1746 // Copy in multi-bytes chunks
1747 copy_bytes_forward(end_from, end_to, qword_count, rax, L_copy_bytes, L_copy_8_bytes);
1748 __ jmp(L_copy_4_bytes);
1749
1750 return start;
1751 }
1752
1753 address generate_fill(BasicType t, bool aligned, const char *name) {
1754 __ align(CodeEntryAlignment);
1755 StubCodeMark mark(this, "StubRoutines", name);
1756 address start = __ pc();
1757
1758 BLOCK_COMMENT("Entry:");
1759
1760 const Register to = c_rarg0; // source array address
1761 const Register value = c_rarg1; // value
1762 const Register count = c_rarg2; // elements count
1763
1764 __ enter(); // required for proper stackwalking of RuntimeStub frame
1765
1766 __ generate_fill(t, aligned, to, value, count, rax, xmm0);
1767
1768 __ leave(); // required for proper stackwalking of RuntimeStub frame
1769 __ ret(0);
1770 return start;
1771 }
1772
1773 // Arguments:
1774 // aligned - true => Input and output aligned on a HeapWord == 8-byte boundary
1775 // ignored
1776 // name - stub name string
1777 //
1778 // Inputs:
1779 // c_rarg0 - source array address
1780 // c_rarg1 - destination array address
1781 // c_rarg2 - element count, treated as ssize_t, can be zero
1782 //
1783 // If 'from' and/or 'to' are aligned on 4- or 2-byte boundaries, we
1784 // let the hardware handle it. The two or four words within dwords
1785 // or qwords that span cache line boundaries will still be loaded
1786 // and stored atomically.
1787 //
1788 address generate_conjoint_short_copy(bool aligned, address nooverlap_target,
1789 address *entry, const char *name) {
1790 __ align(CodeEntryAlignment);
1791 StubCodeMark mark(this, "StubRoutines", name);
1792 address start = __ pc();
1793
1794 Label L_copy_bytes, L_copy_8_bytes, L_copy_4_bytes;
1795 const Register from = rdi; // source array address
1796 const Register to = rsi; // destination array address
1797 const Register count = rdx; // elements count
1798 const Register word_count = rcx;
1799 const Register qword_count = count;
1800
1801 __ enter(); // required for proper stackwalking of RuntimeStub frame
1802 assert_clean_int(c_rarg2, rax); // Make sure 'count' is clean int.
1803
1804 if (entry != NULL) {
1805 *entry = __ pc();
1806 // caller can pass a 64-bit byte count here (from Unsafe.copyMemory)
1807 BLOCK_COMMENT("Entry:");
1808 }
1809
1810 array_overlap_test(nooverlap_target, Address::times_2);
1811 setup_arg_regs(); // from => rdi, to => rsi, count => rdx
1812 // r9 and r10 may be used to save non-volatile registers
1813
1814 // 'from', 'to' and 'count' are now valid
1815 __ movptr(word_count, count);
1816 __ shrptr(count, 2); // count => qword_count
1817
1818 // Copy from high to low addresses. Use 'to' as scratch.
1819
1820 // Check for and copy trailing word
1821 __ testl(word_count, 1);
1822 __ jccb(Assembler::zero, L_copy_4_bytes);
1823 __ movw(rax, Address(from, word_count, Address::times_2, -2));
1824 __ movw(Address(to, word_count, Address::times_2, -2), rax);
1825
1826 // Check for and copy trailing dword
1827 __ BIND(L_copy_4_bytes);
1828 __ testl(word_count, 2);
1829 __ jcc(Assembler::zero, L_copy_bytes);
1830 __ movl(rax, Address(from, qword_count, Address::times_8));
1831 __ movl(Address(to, qword_count, Address::times_8), rax);
1832 __ jmp(L_copy_bytes);
1833
1834 // Copy trailing qwords
1835 __ BIND(L_copy_8_bytes);
1836 __ movq(rax, Address(from, qword_count, Address::times_8, -8));
1837 __ movq(Address(to, qword_count, Address::times_8, -8), rax);
1838 __ decrement(qword_count);
1839 __ jcc(Assembler::notZero, L_copy_8_bytes);
1840
1841 restore_arg_regs();
1842 inc_counter_np(SharedRuntime::_jshort_array_copy_ctr); // Update counter after rscratch1 is free
1843 __ xorptr(rax, rax); // return 0
1844 __ leave(); // required for proper stackwalking of RuntimeStub frame
1845 __ ret(0);
1846
1847 // Copy in multi-bytes chunks
1848 copy_bytes_backward(from, to, qword_count, rax, L_copy_bytes, L_copy_8_bytes);
1849
1850 restore_arg_regs();
1851 inc_counter_np(SharedRuntime::_jshort_array_copy_ctr); // Update counter after rscratch1 is free
1852 __ xorptr(rax, rax); // return 0
1853 __ leave(); // required for proper stackwalking of RuntimeStub frame
1854 __ ret(0);
1855
1856 return start;
1857 }
1858
1859 // Arguments:
1860 // aligned - true => Input and output aligned on a HeapWord == 8-byte boundary
1861 // ignored
1862 // is_oop - true => oop array, so generate store check code
1863 // name - stub name string
1864 //
1865 // Inputs:
1866 // c_rarg0 - source array address
1867 // c_rarg1 - destination array address
1868 // c_rarg2 - element count, treated as ssize_t, can be zero
1869 //
1870 // If 'from' and/or 'to' are aligned on 4-byte boundaries, we let
1871 // the hardware handle it. The two dwords within qwords that span
1872 // cache line boundaries will still be loaded and stored atomicly.
1873 //
1874 // Side Effects:
1875 // disjoint_int_copy_entry is set to the no-overlap entry point
1876 // used by generate_conjoint_int_oop_copy().
1877 //
1878 address generate_disjoint_int_oop_copy(bool aligned, bool is_oop, address* entry,
1879 const char *name, bool dest_uninitialized = false) {
1880 __ align(CodeEntryAlignment);
1881 StubCodeMark mark(this, "StubRoutines", name);
1882 address start = __ pc();
1883
1884 Label L_copy_bytes, L_copy_8_bytes, L_copy_4_bytes, L_exit;
1885 const Register from = rdi; // source array address
1886 const Register to = rsi; // destination array address
1887 const Register count = rdx; // elements count
1888 const Register dword_count = rcx;
1889 const Register qword_count = count;
1890 const Register end_from = from; // source array end address
1891 const Register end_to = to; // destination array end address
1892 const Register saved_to = r11; // saved destination array address
1893 // End pointers are inclusive, and if count is not zero they point
1894 // to the last unit copied: end_to[0] := end_from[0]
1895
1896 __ enter(); // required for proper stackwalking of RuntimeStub frame
1897 assert_clean_int(c_rarg2, rax); // Make sure 'count' is clean int.
1898
1899 if (entry != NULL) {
1900 *entry = __ pc();
1901 // caller can pass a 64-bit byte count here (from Unsafe.copyMemory)
1902 BLOCK_COMMENT("Entry:");
1903 }
1904
1905 setup_arg_regs(); // from => rdi, to => rsi, count => rdx
1906 // r9 and r10 may be used to save non-volatile registers
1907 if (is_oop) {
1908 __ movq(saved_to, to);
1909 gen_write_ref_array_pre_barrier(to, count, dest_uninitialized);
1910 }
1911
1912 // 'from', 'to' and 'count' are now valid
1913 __ movptr(dword_count, count);
1914 __ shrptr(count, 1); // count => qword_count
1915
1916 // Copy from low to high addresses. Use 'to' as scratch.
1917 __ lea(end_from, Address(from, qword_count, Address::times_8, -8));
1918 __ lea(end_to, Address(to, qword_count, Address::times_8, -8));
1919 __ negptr(qword_count);
1920 __ jmp(L_copy_bytes);
1921
1922 // Copy trailing qwords
1923 __ BIND(L_copy_8_bytes);
1924 __ movq(rax, Address(end_from, qword_count, Address::times_8, 8));
1925 __ movq(Address(end_to, qword_count, Address::times_8, 8), rax);
1926 __ increment(qword_count);
1927 __ jcc(Assembler::notZero, L_copy_8_bytes);
1928
1929 // Check for and copy trailing dword
1930 __ BIND(L_copy_4_bytes);
1931 __ testl(dword_count, 1); // Only byte test since the value is 0 or 1
1932 __ jccb(Assembler::zero, L_exit);
1933 __ movl(rax, Address(end_from, 8));
1934 __ movl(Address(end_to, 8), rax);
1935
1936 __ BIND(L_exit);
1937 if (is_oop) {
1938 gen_write_ref_array_post_barrier(saved_to, dword_count, rax);
1939 }
1940 restore_arg_regs();
1941 inc_counter_np(SharedRuntime::_jint_array_copy_ctr); // Update counter after rscratch1 is free
1942 __ xorptr(rax, rax); // return 0
1943 __ leave(); // required for proper stackwalking of RuntimeStub frame
1944 __ ret(0);
1945
1946 // Copy in multi-bytes chunks
1947 copy_bytes_forward(end_from, end_to, qword_count, rax, L_copy_bytes, L_copy_8_bytes);
1948 __ jmp(L_copy_4_bytes);
1949
1950 return start;
1951 }
1952
1953 // Arguments:
1954 // aligned - true => Input and output aligned on a HeapWord == 8-byte boundary
1955 // ignored
1956 // is_oop - true => oop array, so generate store check code
1957 // name - stub name string
1958 //
1959 // Inputs:
1960 // c_rarg0 - source array address
1961 // c_rarg1 - destination array address
1962 // c_rarg2 - element count, treated as ssize_t, can be zero
1963 //
1964 // If 'from' and/or 'to' are aligned on 4-byte boundaries, we let
1965 // the hardware handle it. The two dwords within qwords that span
1966 // cache line boundaries will still be loaded and stored atomicly.
1967 //
1968 address generate_conjoint_int_oop_copy(bool aligned, bool is_oop, address nooverlap_target,
1969 address *entry, const char *name,
1970 bool dest_uninitialized = false) {
1971 __ align(CodeEntryAlignment);
1972 StubCodeMark mark(this, "StubRoutines", name);
1973 address start = __ pc();
1974
1975 Label L_copy_bytes, L_copy_8_bytes, L_copy_2_bytes, L_exit;
1976 const Register from = rdi; // source array address
1977 const Register to = rsi; // destination array address
1978 const Register count = rdx; // elements count
1979 const Register dword_count = rcx;
1980 const Register qword_count = count;
1981
1982 __ enter(); // required for proper stackwalking of RuntimeStub frame
1983 assert_clean_int(c_rarg2, rax); // Make sure 'count' is clean int.
1984
1985 if (entry != NULL) {
1986 *entry = __ pc();
1987 // caller can pass a 64-bit byte count here (from Unsafe.copyMemory)
1988 BLOCK_COMMENT("Entry:");
1989 }
1990
1991 array_overlap_test(nooverlap_target, Address::times_4);
1992 setup_arg_regs(); // from => rdi, to => rsi, count => rdx
1993 // r9 and r10 may be used to save non-volatile registers
1994
1995 if (is_oop) {
1996 // no registers are destroyed by this call
1997 gen_write_ref_array_pre_barrier(to, count, dest_uninitialized);
1998 }
1999
2000 assert_clean_int(count, rax); // Make sure 'count' is clean int.
2001 // 'from', 'to' and 'count' are now valid
2002 __ movptr(dword_count, count);
2003 __ shrptr(count, 1); // count => qword_count
2004
2005 // Copy from high to low addresses. Use 'to' as scratch.
2006
2007 // Check for and copy trailing dword
2008 __ testl(dword_count, 1);
2009 __ jcc(Assembler::zero, L_copy_bytes);
2010 __ movl(rax, Address(from, dword_count, Address::times_4, -4));
2011 __ movl(Address(to, dword_count, Address::times_4, -4), rax);
2012 __ jmp(L_copy_bytes);
2013
2014 // Copy trailing qwords
2015 __ BIND(L_copy_8_bytes);
2016 __ movq(rax, Address(from, qword_count, Address::times_8, -8));
2017 __ movq(Address(to, qword_count, Address::times_8, -8), rax);
2018 __ decrement(qword_count);
2019 __ jcc(Assembler::notZero, L_copy_8_bytes);
2020
2021 if (is_oop) {
2022 __ jmp(L_exit);
2023 }
2024 restore_arg_regs();
2025 inc_counter_np(SharedRuntime::_jint_array_copy_ctr); // Update counter after rscratch1 is free
2026 __ xorptr(rax, rax); // return 0
2027 __ leave(); // required for proper stackwalking of RuntimeStub frame
2028 __ ret(0);
2029
2030 // Copy in multi-bytes chunks
2031 copy_bytes_backward(from, to, qword_count, rax, L_copy_bytes, L_copy_8_bytes);
2032
2033 __ BIND(L_exit);
2034 if (is_oop) {
2035 gen_write_ref_array_post_barrier(to, dword_count, rax);
2036 }
2037 restore_arg_regs();
2038 inc_counter_np(SharedRuntime::_jint_array_copy_ctr); // Update counter after rscratch1 is free
2039 __ xorptr(rax, rax); // return 0
2040 __ leave(); // required for proper stackwalking of RuntimeStub frame
2041 __ ret(0);
2042
2043 return start;
2044 }
2045
2046 // Arguments:
2047 // aligned - true => Input and output aligned on a HeapWord boundary == 8 bytes
2048 // ignored
2049 // is_oop - true => oop array, so generate store check code
2050 // name - stub name string
2051 //
2052 // Inputs:
2053 // c_rarg0 - source array address
2054 // c_rarg1 - destination array address
2055 // c_rarg2 - element count, treated as ssize_t, can be zero
2056 //
2057 // Side Effects:
2058 // disjoint_oop_copy_entry or disjoint_long_copy_entry is set to the
2059 // no-overlap entry point used by generate_conjoint_long_oop_copy().
2060 //
2061 address generate_disjoint_long_oop_copy(bool aligned, bool is_oop, address *entry,
2062 const char *name, bool dest_uninitialized = false) {
2063 __ align(CodeEntryAlignment);
2064 StubCodeMark mark(this, "StubRoutines", name);
2065 address start = __ pc();
2066
2067 Label L_copy_bytes, L_copy_8_bytes, L_exit;
2068 const Register from = rdi; // source array address
2069 const Register to = rsi; // destination array address
2070 const Register qword_count = rdx; // elements count
2071 const Register end_from = from; // source array end address
2072 const Register end_to = rcx; // destination array end address
2073 const Register saved_to = to;
2074 const Register saved_count = r11;
2075 // End pointers are inclusive, and if count is not zero they point
2076 // to the last unit copied: end_to[0] := end_from[0]
2077
2078 __ enter(); // required for proper stackwalking of RuntimeStub frame
2079 // Save no-overlap entry point for generate_conjoint_long_oop_copy()
2080 assert_clean_int(c_rarg2, rax); // Make sure 'count' is clean int.
2081
2082 if (entry != NULL) {
2083 *entry = __ pc();
2084 // caller can pass a 64-bit byte count here (from Unsafe.copyMemory)
2085 BLOCK_COMMENT("Entry:");
2086 }
2087
2088 setup_arg_regs(); // from => rdi, to => rsi, count => rdx
2089 // r9 and r10 may be used to save non-volatile registers
2090 // 'from', 'to' and 'qword_count' are now valid
2091 if (is_oop) {
2092 // Save to and count for store barrier
2093 __ movptr(saved_count, qword_count);
2094 // no registers are destroyed by this call
2095 gen_write_ref_array_pre_barrier(to, qword_count, dest_uninitialized);
2096 }
2097
2098 // Copy from low to high addresses. Use 'to' as scratch.
2099 __ lea(end_from, Address(from, qword_count, Address::times_8, -8));
2100 __ lea(end_to, Address(to, qword_count, Address::times_8, -8));
2101 __ negptr(qword_count);
2102 __ jmp(L_copy_bytes);
2103
2104 // Copy trailing qwords
2105 __ BIND(L_copy_8_bytes);
2106 __ movq(rax, Address(end_from, qword_count, Address::times_8, 8));
2107 __ movq(Address(end_to, qword_count, Address::times_8, 8), rax);
2108 __ increment(qword_count);
2109 __ jcc(Assembler::notZero, L_copy_8_bytes);
2110
2111 if (is_oop) {
2112 __ jmp(L_exit);
2113 } else {
2114 restore_arg_regs();
2115 inc_counter_np(SharedRuntime::_jlong_array_copy_ctr); // Update counter after rscratch1 is free
2116 __ xorptr(rax, rax); // return 0
2117 __ leave(); // required for proper stackwalking of RuntimeStub frame
2118 __ ret(0);
2119 }
2120
2121 // Copy in multi-bytes chunks
2122 copy_bytes_forward(end_from, end_to, qword_count, rax, L_copy_bytes, L_copy_8_bytes);
2123
2124 if (is_oop) {
2125 __ BIND(L_exit);
2126 gen_write_ref_array_post_barrier(saved_to, saved_count, rax);
2127 }
2128 restore_arg_regs();
2129 if (is_oop) {
2130 inc_counter_np(SharedRuntime::_oop_array_copy_ctr); // Update counter after rscratch1 is free
2131 } else {
2132 inc_counter_np(SharedRuntime::_jlong_array_copy_ctr); // Update counter after rscratch1 is free
2133 }
2134 __ xorptr(rax, rax); // return 0
2135 __ leave(); // required for proper stackwalking of RuntimeStub frame
2136 __ ret(0);
2137
2138 return start;
2139 }
2140
2141 // Arguments:
2142 // aligned - true => Input and output aligned on a HeapWord boundary == 8 bytes
2143 // ignored
2144 // is_oop - true => oop array, so generate store check code
2145 // name - stub name string
2146 //
2147 // Inputs:
2148 // c_rarg0 - source array address
2149 // c_rarg1 - destination array address
2150 // c_rarg2 - element count, treated as ssize_t, can be zero
2151 //
2152 address generate_conjoint_long_oop_copy(bool aligned, bool is_oop,
2153 address nooverlap_target, address *entry,
2154 const char *name, bool dest_uninitialized = false) {
2155 __ align(CodeEntryAlignment);
2156 StubCodeMark mark(this, "StubRoutines", name);
2157 address start = __ pc();
2158
2159 Label L_copy_bytes, L_copy_8_bytes, L_exit;
2160 const Register from = rdi; // source array address
2161 const Register to = rsi; // destination array address
2162 const Register qword_count = rdx; // elements count
2163 const Register saved_count = rcx;
2164
2165 __ enter(); // required for proper stackwalking of RuntimeStub frame
2166 assert_clean_int(c_rarg2, rax); // Make sure 'count' is clean int.
2167
2168 if (entry != NULL) {
2169 *entry = __ pc();
2170 // caller can pass a 64-bit byte count here (from Unsafe.copyMemory)
2171 BLOCK_COMMENT("Entry:");
2172 }
2173
2174 array_overlap_test(nooverlap_target, Address::times_8);
2175 setup_arg_regs(); // from => rdi, to => rsi, count => rdx
2176 // r9 and r10 may be used to save non-volatile registers
2177 // 'from', 'to' and 'qword_count' are now valid
2178 if (is_oop) {
2179 // Save to and count for store barrier
2180 __ movptr(saved_count, qword_count);
2181 // No registers are destroyed by this call
2182 gen_write_ref_array_pre_barrier(to, saved_count, dest_uninitialized);
2183 }
2184
2185 __ jmp(L_copy_bytes);
2186
2187 // Copy trailing qwords
2188 __ BIND(L_copy_8_bytes);
2189 __ movq(rax, Address(from, qword_count, Address::times_8, -8));
2190 __ movq(Address(to, qword_count, Address::times_8, -8), rax);
2191 __ decrement(qword_count);
2192 __ jcc(Assembler::notZero, L_copy_8_bytes);
2193
2194 if (is_oop) {
2195 __ jmp(L_exit);
2196 } else {
2197 restore_arg_regs();
2198 inc_counter_np(SharedRuntime::_jlong_array_copy_ctr); // Update counter after rscratch1 is free
2199 __ xorptr(rax, rax); // return 0
2200 __ leave(); // required for proper stackwalking of RuntimeStub frame
2201 __ ret(0);
2202 }
2203
2204 // Copy in multi-bytes chunks
2205 copy_bytes_backward(from, to, qword_count, rax, L_copy_bytes, L_copy_8_bytes);
2206
2207 if (is_oop) {
2208 __ BIND(L_exit);
2209 gen_write_ref_array_post_barrier(to, saved_count, rax);
2210 }
2211 restore_arg_regs();
2212 if (is_oop) {
2213 inc_counter_np(SharedRuntime::_oop_array_copy_ctr); // Update counter after rscratch1 is free
2214 } else {
2215 inc_counter_np(SharedRuntime::_jlong_array_copy_ctr); // Update counter after rscratch1 is free
2216 }
2217 __ xorptr(rax, rax); // return 0
2218 __ leave(); // required for proper stackwalking of RuntimeStub frame
2219 __ ret(0);
2220
2221 return start;
2222 }
2223
2224
2225 // Helper for generating a dynamic type check.
2226 // Smashes no registers.
2227 void generate_type_check(Register sub_klass,
2228 Register super_check_offset,
2229 Register super_klass,
2230 Label& L_success) {
2231 assert_different_registers(sub_klass, super_check_offset, super_klass);
2232
2233 BLOCK_COMMENT("type_check:");
2234
2235 Label L_miss;
2236
2237 __ check_klass_subtype_fast_path(sub_klass, super_klass, noreg, &L_success, &L_miss, NULL,
2238 super_check_offset);
2239 __ check_klass_subtype_slow_path(sub_klass, super_klass, noreg, noreg, &L_success, NULL);
2240
2241 // Fall through on failure!
2242 __ BIND(L_miss);
2243 }
2244
2245 //
2246 // Generate checkcasting array copy stub
2247 //
2248 // Input:
2249 // c_rarg0 - source array address
2250 // c_rarg1 - destination array address
2251 // c_rarg2 - element count, treated as ssize_t, can be zero
2252 // c_rarg3 - size_t ckoff (super_check_offset)
2253 // not Win64
2254 // c_rarg4 - oop ckval (super_klass)
2255 // Win64
2256 // rsp+40 - oop ckval (super_klass)
2257 //
2258 // Output:
2259 // rax == 0 - success
2260 // rax == -1^K - failure, where K is partial transfer count
2261 //
2262 address generate_checkcast_copy(const char *name, address *entry,
2263 bool dest_uninitialized = false) {
2264
2265 Label L_load_element, L_store_element, L_do_card_marks, L_done;
2266
2267 // Input registers (after setup_arg_regs)
2268 const Register from = rdi; // source array address
2269 const Register to = rsi; // destination array address
2270 const Register length = rdx; // elements count
2271 const Register ckoff = rcx; // super_check_offset
2272 const Register ckval = r8; // super_klass
2273
2274 // Registers used as temps (r13, r14 are save-on-entry)
2275 const Register end_from = from; // source array end address
2276 const Register end_to = r13; // destination array end address
2277 const Register count = rdx; // -(count_remaining)
2278 const Register r14_length = r14; // saved copy of length
2279 // End pointers are inclusive, and if length is not zero they point
2280 // to the last unit copied: end_to[0] := end_from[0]
2281
2282 const Register rax_oop = rax; // actual oop copied
2283 const Register r11_klass = r11; // oop._klass
2284
2285 //---------------------------------------------------------------
2286 // Assembler stub will be used for this call to arraycopy
2287 // if the two arrays are subtypes of Object[] but the
2288 // destination array type is not equal to or a supertype
2289 // of the source type. Each element must be separately
2290 // checked.
2291
2292 __ align(CodeEntryAlignment);
2293 StubCodeMark mark(this, "StubRoutines", name);
2294 address start = __ pc();
2295
2296 __ enter(); // required for proper stackwalking of RuntimeStub frame
2297
2298 #ifdef ASSERT
2299 // caller guarantees that the arrays really are different
2300 // otherwise, we would have to make conjoint checks
2301 { Label L;
2302 array_overlap_test(L, TIMES_OOP);
2303 __ stop("checkcast_copy within a single array");
2304 __ bind(L);
2305 }
2306 #endif //ASSERT
2307
2308 setup_arg_regs(4); // from => rdi, to => rsi, length => rdx
2309 // ckoff => rcx, ckval => r8
2310 // r9 and r10 may be used to save non-volatile registers
2311 #ifdef _WIN64
2312 // last argument (#4) is on stack on Win64
2313 __ movptr(ckval, Address(rsp, 6 * wordSize));
2314 #endif
2315
2316 // Caller of this entry point must set up the argument registers.
2317 if (entry != NULL) {
2318 *entry = __ pc();
2319 BLOCK_COMMENT("Entry:");
2320 }
2321
2322 // allocate spill slots for r13, r14
2323 enum {
2324 saved_r13_offset,
2325 saved_r14_offset,
2326 saved_rbp_offset
2327 };
2328 __ subptr(rsp, saved_rbp_offset * wordSize);
2329 __ movptr(Address(rsp, saved_r13_offset * wordSize), r13);
2330 __ movptr(Address(rsp, saved_r14_offset * wordSize), r14);
2331
2332 // check that int operands are properly extended to size_t
2333 assert_clean_int(length, rax);
2334 assert_clean_int(ckoff, rax);
2335
2336 #ifdef ASSERT
2337 BLOCK_COMMENT("assert consistent ckoff/ckval");
2338 // The ckoff and ckval must be mutually consistent,
2339 // even though caller generates both.
2340 { Label L;
2341 int sco_offset = in_bytes(Klass::super_check_offset_offset());
2342 __ cmpl(ckoff, Address(ckval, sco_offset));
2343 __ jcc(Assembler::equal, L);
2344 __ stop("super_check_offset inconsistent");
2345 __ bind(L);
2346 }
2347 #endif //ASSERT
2348
2349 // Loop-invariant addresses. They are exclusive end pointers.
2350 Address end_from_addr(from, length, TIMES_OOP, 0);
2351 Address end_to_addr(to, length, TIMES_OOP, 0);
2352 // Loop-variant addresses. They assume post-incremented count < 0.
2353 Address from_element_addr(end_from, count, TIMES_OOP, 0);
2354 Address to_element_addr(end_to, count, TIMES_OOP, 0);
2355
2356 gen_write_ref_array_pre_barrier(to, count, dest_uninitialized);
2357
2358 // Copy from low to high addresses, indexed from the end of each array.
2359 __ lea(end_from, end_from_addr);
2360 __ lea(end_to, end_to_addr);
2361 __ movptr(r14_length, length); // save a copy of the length
2362 assert(length == count, ""); // else fix next line:
2363 __ negptr(count); // negate and test the length
2364 __ jcc(Assembler::notZero, L_load_element);
2365
2366 // Empty array: Nothing to do.
2367 __ xorptr(rax, rax); // return 0 on (trivial) success
2368 __ jmp(L_done);
2369
2370 // ======== begin loop ========
2371 // (Loop is rotated; its entry is L_load_element.)
2372 // Loop control:
2373 // for (count = -count; count != 0; count++)
2374 // Base pointers src, dst are biased by 8*(count-1),to last element.
2375 __ align(OptoLoopAlignment);
2376
2377 __ BIND(L_store_element);
2378 __ store_heap_oop(to_element_addr, rax_oop); // store the oop
2379 __ increment(count); // increment the count toward zero
2380 __ jcc(Assembler::zero, L_do_card_marks);
2381
2382 // ======== loop entry is here ========
2383 __ BIND(L_load_element);
2384 __ load_heap_oop(rax_oop, from_element_addr); // load the oop
2385 __ testptr(rax_oop, rax_oop);
2386 __ jcc(Assembler::zero, L_store_element);
2387
2388 __ load_klass(r11_klass, rax_oop);// query the object klass
2389 generate_type_check(r11_klass, ckoff, ckval, L_store_element);
2390 // ======== end loop ========
2391
2392 // It was a real error; we must depend on the caller to finish the job.
2393 // Register rdx = -1 * number of *remaining* oops, r14 = *total* oops.
2394 // Emit GC store barriers for the oops we have copied (r14 + rdx),
2395 // and report their number to the caller.
2396 assert_different_registers(rax, r14_length, count, to, end_to, rcx, rscratch1);
2397 Label L_post_barrier;
2398 __ addptr(r14_length, count); // K = (original - remaining) oops
2399 __ movptr(rax, r14_length); // save the value
2400 __ notptr(rax); // report (-1^K) to caller (does not affect flags)
2401 __ jccb(Assembler::notZero, L_post_barrier);
2402 __ jmp(L_done); // K == 0, nothing was copied, skip post barrier
2403
2404 // Come here on success only.
2405 __ BIND(L_do_card_marks);
2406 __ xorptr(rax, rax); // return 0 on success
2407
2408 __ BIND(L_post_barrier);
2409 gen_write_ref_array_post_barrier(to, r14_length, rscratch1);
2410
2411 // Common exit point (success or failure).
2412 __ BIND(L_done);
2413 __ movptr(r13, Address(rsp, saved_r13_offset * wordSize));
2414 __ movptr(r14, Address(rsp, saved_r14_offset * wordSize));
2415 restore_arg_regs();
2416 inc_counter_np(SharedRuntime::_checkcast_array_copy_ctr); // Update counter after rscratch1 is free
2417 __ leave(); // required for proper stackwalking of RuntimeStub frame
2418 __ ret(0);
2419
2420 return start;
2421 }
2422
2423 //
2424 // Generate 'unsafe' array copy stub
2425 // Though just as safe as the other stubs, it takes an unscaled
2426 // size_t argument instead of an element count.
2427 //
2428 // Input:
2429 // c_rarg0 - source array address
2430 // c_rarg1 - destination array address
2431 // c_rarg2 - byte count, treated as ssize_t, can be zero
2432 //
2433 // Examines the alignment of the operands and dispatches
2434 // to a long, int, short, or byte copy loop.
2435 //
2436 address generate_unsafe_copy(const char *name,
2437 address byte_copy_entry, address short_copy_entry,
2438 address int_copy_entry, address long_copy_entry) {
2439
2440 Label L_long_aligned, L_int_aligned, L_short_aligned;
2441
2442 // Input registers (before setup_arg_regs)
2443 const Register from = c_rarg0; // source array address
2444 const Register to = c_rarg1; // destination array address
2445 const Register size = c_rarg2; // byte count (size_t)
2446
2447 // Register used as a temp
2448 const Register bits = rax; // test copy of low bits
2449
2450 __ align(CodeEntryAlignment);
2451 StubCodeMark mark(this, "StubRoutines", name);
2452 address start = __ pc();
2453
2454 __ enter(); // required for proper stackwalking of RuntimeStub frame
2455
2456 // bump this on entry, not on exit:
2457 inc_counter_np(SharedRuntime::_unsafe_array_copy_ctr);
2458
2459 __ mov(bits, from);
2460 __ orptr(bits, to);
2461 __ orptr(bits, size);
2462
2463 __ testb(bits, BytesPerLong-1);
2464 __ jccb(Assembler::zero, L_long_aligned);
2465
2466 __ testb(bits, BytesPerInt-1);
2467 __ jccb(Assembler::zero, L_int_aligned);
2468
2469 __ testb(bits, BytesPerShort-1);
2470 __ jump_cc(Assembler::notZero, RuntimeAddress(byte_copy_entry));
2471
2472 __ BIND(L_short_aligned);
2473 __ shrptr(size, LogBytesPerShort); // size => short_count
2474 __ jump(RuntimeAddress(short_copy_entry));
2475
2476 __ BIND(L_int_aligned);
2477 __ shrptr(size, LogBytesPerInt); // size => int_count
2478 __ jump(RuntimeAddress(int_copy_entry));
2479
2480 __ BIND(L_long_aligned);
2481 __ shrptr(size, LogBytesPerLong); // size => qword_count
2482 __ jump(RuntimeAddress(long_copy_entry));
2483
2484 return start;
2485 }
2486
2487 // Perform range checks on the proposed arraycopy.
2488 // Kills temp, but nothing else.
2489 // Also, clean the sign bits of src_pos and dst_pos.
2490 void arraycopy_range_checks(Register src, // source array oop (c_rarg0)
2491 Register src_pos, // source position (c_rarg1)
2492 Register dst, // destination array oo (c_rarg2)
2493 Register dst_pos, // destination position (c_rarg3)
2494 Register length,
2495 Register temp,
2496 Label& L_failed) {
2497 BLOCK_COMMENT("arraycopy_range_checks:");
2498
2499 // if (src_pos + length > arrayOop(src)->length()) FAIL;
2500 __ movl(temp, length);
2501 __ addl(temp, src_pos); // src_pos + length
2502 __ cmpl(temp, Address(src, arrayOopDesc::length_offset_in_bytes()));
2503 __ jcc(Assembler::above, L_failed);
2504
2505 // if (dst_pos + length > arrayOop(dst)->length()) FAIL;
2506 __ movl(temp, length);
2507 __ addl(temp, dst_pos); // dst_pos + length
2508 __ cmpl(temp, Address(dst, arrayOopDesc::length_offset_in_bytes()));
2509 __ jcc(Assembler::above, L_failed);
2510
2511 // Have to clean up high 32-bits of 'src_pos' and 'dst_pos'.
2512 // Move with sign extension can be used since they are positive.
2513 __ movslq(src_pos, src_pos);
2514 __ movslq(dst_pos, dst_pos);
2515
2516 BLOCK_COMMENT("arraycopy_range_checks done");
2517 }
2518
2519 //
2520 // Generate generic array copy stubs
2521 //
2522 // Input:
2523 // c_rarg0 - src oop
2524 // c_rarg1 - src_pos (32-bits)
2525 // c_rarg2 - dst oop
2526 // c_rarg3 - dst_pos (32-bits)
2527 // not Win64
2528 // c_rarg4 - element count (32-bits)
2529 // Win64
2530 // rsp+40 - element count (32-bits)
2531 //
2532 // Output:
2533 // rax == 0 - success
2534 // rax == -1^K - failure, where K is partial transfer count
2535 //
2536 address generate_generic_copy(const char *name,
2537 address byte_copy_entry, address short_copy_entry,
2538 address int_copy_entry, address oop_copy_entry,
2539 address long_copy_entry, address checkcast_copy_entry) {
2540
2541 Label L_failed, L_failed_0, L_objArray;
2542 Label L_copy_bytes, L_copy_shorts, L_copy_ints, L_copy_longs;
2543
2544 // Input registers
2545 const Register src = c_rarg0; // source array oop
2546 const Register src_pos = c_rarg1; // source position
2547 const Register dst = c_rarg2; // destination array oop
2548 const Register dst_pos = c_rarg3; // destination position
2549 #ifndef _WIN64
2550 const Register length = c_rarg4;
2551 #else
2552 const Address length(rsp, 6 * wordSize); // elements count is on stack on Win64
2553 #endif
2554
2555 { int modulus = CodeEntryAlignment;
2556 int target = modulus - 5; // 5 = sizeof jmp(L_failed)
2557 int advance = target - (__ offset() % modulus);
2558 if (advance < 0) advance += modulus;
2559 if (advance > 0) __ nop(advance);
2560 }
2561 StubCodeMark mark(this, "StubRoutines", name);
2562
2563 // Short-hop target to L_failed. Makes for denser prologue code.
2564 __ BIND(L_failed_0);
2565 __ jmp(L_failed);
2566 assert(__ offset() % CodeEntryAlignment == 0, "no further alignment needed");
2567
2568 __ align(CodeEntryAlignment);
2569 address start = __ pc();
2570
2571 __ enter(); // required for proper stackwalking of RuntimeStub frame
2572
2573 // bump this on entry, not on exit:
2574 inc_counter_np(SharedRuntime::_generic_array_copy_ctr);
2575
2576 //-----------------------------------------------------------------------
2577 // Assembler stub will be used for this call to arraycopy
2578 // if the following conditions are met:
2579 //
2580 // (1) src and dst must not be null.
2581 // (2) src_pos must not be negative.
2582 // (3) dst_pos must not be negative.
2583 // (4) length must not be negative.
2584 // (5) src klass and dst klass should be the same and not NULL.
2585 // (6) src and dst should be arrays.
2586 // (7) src_pos + length must not exceed length of src.
2587 // (8) dst_pos + length must not exceed length of dst.
2588 //
2589
2590 // if (src == NULL) return -1;
2591 __ testptr(src, src); // src oop
2592 size_t j1off = __ offset();
2593 __ jccb(Assembler::zero, L_failed_0);
2594
2595 // if (src_pos < 0) return -1;
2596 __ testl(src_pos, src_pos); // src_pos (32-bits)
2597 __ jccb(Assembler::negative, L_failed_0);
2598
2599 // if (dst == NULL) return -1;
2600 __ testptr(dst, dst); // dst oop
2601 __ jccb(Assembler::zero, L_failed_0);
2602
2603 // if (dst_pos < 0) return -1;
2604 __ testl(dst_pos, dst_pos); // dst_pos (32-bits)
2605 size_t j4off = __ offset();
2606 __ jccb(Assembler::negative, L_failed_0);
2607
2608 // The first four tests are very dense code,
2609 // but not quite dense enough to put four
2610 // jumps in a 16-byte instruction fetch buffer.
2611 // That's good, because some branch predicters
2612 // do not like jumps so close together.
2613 // Make sure of this.
2614 guarantee(((j1off ^ j4off) & ~15) != 0, "I$ line of 1st & 4th jumps");
2615
2616 // registers used as temp
2617 const Register r11_length = r11; // elements count to copy
2618 const Register r10_src_klass = r10; // array klass
2619
2620 // if (length < 0) return -1;
2621 __ movl(r11_length, length); // length (elements count, 32-bits value)
2622 __ testl(r11_length, r11_length);
2623 __ jccb(Assembler::negative, L_failed_0);
2624
2625 __ load_klass(r10_src_klass, src);
2626 #ifdef ASSERT
2627 // assert(src->klass() != NULL);
2628 {
2629 BLOCK_COMMENT("assert klasses not null {");
2630 Label L1, L2;
2631 __ testptr(r10_src_klass, r10_src_klass);
2632 __ jcc(Assembler::notZero, L2); // it is broken if klass is NULL
2633 __ bind(L1);
2634 __ stop("broken null klass");
2635 __ bind(L2);
2636 __ load_klass(rax, dst);
2637 __ cmpq(rax, 0);
2638 __ jcc(Assembler::equal, L1); // this would be broken also
2639 BLOCK_COMMENT("} assert klasses not null done");
2640 }
2641 #endif
2642
2643 // Load layout helper (32-bits)
2644 //
2645 // |array_tag| | header_size | element_type | |log2_element_size|
2646 // 32 30 24 16 8 2 0
2647 //
2648 // array_tag: typeArray = 0x3, objArray = 0x2, non-array = 0x0
2649 //
2650
2651 const int lh_offset = in_bytes(Klass::layout_helper_offset());
2652
2653 // Handle objArrays completely differently...
2654 const jint objArray_lh = Klass::array_layout_helper(T_OBJECT);
2655 __ cmpl(Address(r10_src_klass, lh_offset), objArray_lh);
2656 __ jcc(Assembler::equal, L_objArray);
2657
2658 // if (src->klass() != dst->klass()) return -1;
2659 __ load_klass(rax, dst);
2660 __ cmpq(r10_src_klass, rax);
2661 __ jcc(Assembler::notEqual, L_failed);
2662
2663 const Register rax_lh = rax; // layout helper
2664 __ movl(rax_lh, Address(r10_src_klass, lh_offset));
2665
2666 // if (!src->is_Array()) return -1;
2667 __ cmpl(rax_lh, Klass::_lh_neutral_value);
2668 __ jcc(Assembler::greaterEqual, L_failed);
2669
2670 // At this point, it is known to be a typeArray (array_tag 0x3).
2671 #ifdef ASSERT
2672 {
2673 BLOCK_COMMENT("assert primitive array {");
2674 Label L;
2675 __ cmpl(rax_lh, (Klass::_lh_array_tag_type_value << Klass::_lh_array_tag_shift));
2676 __ jcc(Assembler::greaterEqual, L);
2677 __ stop("must be a primitive array");
2678 __ bind(L);
2679 BLOCK_COMMENT("} assert primitive array done");
2680 }
2681 #endif
2682
2683 arraycopy_range_checks(src, src_pos, dst, dst_pos, r11_length,
2684 r10, L_failed);
2685
2686 // TypeArrayKlass
2687 //
2688 // src_addr = (src + array_header_in_bytes()) + (src_pos << log2elemsize);
2689 // dst_addr = (dst + array_header_in_bytes()) + (dst_pos << log2elemsize);
2690 //
2691
2692 const Register r10_offset = r10; // array offset
2693 const Register rax_elsize = rax_lh; // element size
2694
2695 __ movl(r10_offset, rax_lh);
2696 __ shrl(r10_offset, Klass::_lh_header_size_shift);
2697 __ andptr(r10_offset, Klass::_lh_header_size_mask); // array_offset
2698 __ addptr(src, r10_offset); // src array offset
2699 __ addptr(dst, r10_offset); // dst array offset
2700 BLOCK_COMMENT("choose copy loop based on element size");
2701 __ andl(rax_lh, Klass::_lh_log2_element_size_mask); // rax_lh -> rax_elsize
2702
2703 // next registers should be set before the jump to corresponding stub
2704 const Register from = c_rarg0; // source array address
2705 const Register to = c_rarg1; // destination array address
2706 const Register count = c_rarg2; // elements count
2707
2708 // 'from', 'to', 'count' registers should be set in such order
2709 // since they are the same as 'src', 'src_pos', 'dst'.
2710
2711 __ BIND(L_copy_bytes);
2712 __ cmpl(rax_elsize, 0);
2713 __ jccb(Assembler::notEqual, L_copy_shorts);
2714 __ lea(from, Address(src, src_pos, Address::times_1, 0));// src_addr
2715 __ lea(to, Address(dst, dst_pos, Address::times_1, 0));// dst_addr
2716 __ movl2ptr(count, r11_length); // length
2717 __ jump(RuntimeAddress(byte_copy_entry));
2718
2719 __ BIND(L_copy_shorts);
2720 __ cmpl(rax_elsize, LogBytesPerShort);
2721 __ jccb(Assembler::notEqual, L_copy_ints);
2722 __ lea(from, Address(src, src_pos, Address::times_2, 0));// src_addr
2723 __ lea(to, Address(dst, dst_pos, Address::times_2, 0));// dst_addr
2724 __ movl2ptr(count, r11_length); // length
2725 __ jump(RuntimeAddress(short_copy_entry));
2726
2727 __ BIND(L_copy_ints);
2728 __ cmpl(rax_elsize, LogBytesPerInt);
2729 __ jccb(Assembler::notEqual, L_copy_longs);
2730 __ lea(from, Address(src, src_pos, Address::times_4, 0));// src_addr
2731 __ lea(to, Address(dst, dst_pos, Address::times_4, 0));// dst_addr
2732 __ movl2ptr(count, r11_length); // length
2733 __ jump(RuntimeAddress(int_copy_entry));
2734
2735 __ BIND(L_copy_longs);
2736 #ifdef ASSERT
2737 {
2738 BLOCK_COMMENT("assert long copy {");
2739 Label L;
2740 __ cmpl(rax_elsize, LogBytesPerLong);
2741 __ jcc(Assembler::equal, L);
2742 __ stop("must be long copy, but elsize is wrong");
2743 __ bind(L);
2744 BLOCK_COMMENT("} assert long copy done");
2745 }
2746 #endif
2747 __ lea(from, Address(src, src_pos, Address::times_8, 0));// src_addr
2748 __ lea(to, Address(dst, dst_pos, Address::times_8, 0));// dst_addr
2749 __ movl2ptr(count, r11_length); // length
2750 __ jump(RuntimeAddress(long_copy_entry));
2751
2752 // ObjArrayKlass
2753 __ BIND(L_objArray);
2754 // live at this point: r10_src_klass, r11_length, src[_pos], dst[_pos]
2755
2756 Label L_plain_copy, L_checkcast_copy;
2757 // test array classes for subtyping
2758 __ load_klass(rax, dst);
2759 __ cmpq(r10_src_klass, rax); // usual case is exact equality
2760 __ jcc(Assembler::notEqual, L_checkcast_copy);
2761
2762 // Identically typed arrays can be copied without element-wise checks.
2763 arraycopy_range_checks(src, src_pos, dst, dst_pos, r11_length,
2764 r10, L_failed);
2765
2766 __ lea(from, Address(src, src_pos, TIMES_OOP,
2767 arrayOopDesc::base_offset_in_bytes(T_OBJECT))); // src_addr
2768 __ lea(to, Address(dst, dst_pos, TIMES_OOP,
2769 arrayOopDesc::base_offset_in_bytes(T_OBJECT))); // dst_addr
2770 __ movl2ptr(count, r11_length); // length
2771 __ BIND(L_plain_copy);
2772 __ jump(RuntimeAddress(oop_copy_entry));
2773
2774 __ BIND(L_checkcast_copy);
2775 // live at this point: r10_src_klass, r11_length, rax (dst_klass)
2776 {
2777 // Before looking at dst.length, make sure dst is also an objArray.
2778 __ cmpl(Address(rax, lh_offset), objArray_lh);
2779 __ jcc(Assembler::notEqual, L_failed);
2780
2781 // It is safe to examine both src.length and dst.length.
2782 arraycopy_range_checks(src, src_pos, dst, dst_pos, r11_length,
2783 rax, L_failed);
2784
2785 const Register r11_dst_klass = r11;
2786 __ load_klass(r11_dst_klass, dst); // reload
2787
2788 // Marshal the base address arguments now, freeing registers.
2789 __ lea(from, Address(src, src_pos, TIMES_OOP,
2790 arrayOopDesc::base_offset_in_bytes(T_OBJECT)));
2791 __ lea(to, Address(dst, dst_pos, TIMES_OOP,
2792 arrayOopDesc::base_offset_in_bytes(T_OBJECT)));
2793 __ movl(count, length); // length (reloaded)
2794 Register sco_temp = c_rarg3; // this register is free now
2795 assert_different_registers(from, to, count, sco_temp,
2796 r11_dst_klass, r10_src_klass);
2797 assert_clean_int(count, sco_temp);
2798
2799 // Generate the type check.
2800 const int sco_offset = in_bytes(Klass::super_check_offset_offset());
2801 __ movl(sco_temp, Address(r11_dst_klass, sco_offset));
2802 assert_clean_int(sco_temp, rax);
2803 generate_type_check(r10_src_klass, sco_temp, r11_dst_klass, L_plain_copy);
2804
2805 // Fetch destination element klass from the ObjArrayKlass header.
2806 int ek_offset = in_bytes(ObjArrayKlass::element_klass_offset());
2807 __ movptr(r11_dst_klass, Address(r11_dst_klass, ek_offset));
2808 __ movl( sco_temp, Address(r11_dst_klass, sco_offset));
2809 assert_clean_int(sco_temp, rax);
2810
2811 // the checkcast_copy loop needs two extra arguments:
2812 assert(c_rarg3 == sco_temp, "#3 already in place");
2813 // Set up arguments for checkcast_copy_entry.
2814 setup_arg_regs(4);
2815 __ movptr(r8, r11_dst_klass); // dst.klass.element_klass, r8 is c_rarg4 on Linux/Solaris
2816 __ jump(RuntimeAddress(checkcast_copy_entry));
2817 }
2818
2819 __ BIND(L_failed);
2820 __ xorptr(rax, rax);
2821 __ notptr(rax); // return -1
2822 __ leave(); // required for proper stackwalking of RuntimeStub frame
2823 __ ret(0);
2824
2825 return start;
2826 }
2827
2828 void generate_arraycopy_stubs() {
2829 address entry;
2830 address entry_jbyte_arraycopy;
2831 address entry_jshort_arraycopy;
2832 address entry_jint_arraycopy;
2833 address entry_oop_arraycopy;
2834 address entry_jlong_arraycopy;
2835 address entry_checkcast_arraycopy;
2836
2837 StubRoutines::_jbyte_disjoint_arraycopy = generate_disjoint_byte_copy(false, &entry,
2838 "jbyte_disjoint_arraycopy");
2839 StubRoutines::_jbyte_arraycopy = generate_conjoint_byte_copy(false, entry, &entry_jbyte_arraycopy,
2840 "jbyte_arraycopy");
2841
2842 StubRoutines::_jshort_disjoint_arraycopy = generate_disjoint_short_copy(false, &entry,
2843 "jshort_disjoint_arraycopy");
2844 StubRoutines::_jshort_arraycopy = generate_conjoint_short_copy(false, entry, &entry_jshort_arraycopy,
2845 "jshort_arraycopy");
2846
2847 StubRoutines::_jint_disjoint_arraycopy = generate_disjoint_int_oop_copy(false, false, &entry,
2848 "jint_disjoint_arraycopy");
2849 StubRoutines::_jint_arraycopy = generate_conjoint_int_oop_copy(false, false, entry,
2850 &entry_jint_arraycopy, "jint_arraycopy");
2851
2852 StubRoutines::_jlong_disjoint_arraycopy = generate_disjoint_long_oop_copy(false, false, &entry,
2853 "jlong_disjoint_arraycopy");
2854 StubRoutines::_jlong_arraycopy = generate_conjoint_long_oop_copy(false, false, entry,
2855 &entry_jlong_arraycopy, "jlong_arraycopy");
2856
2857
2858 if (UseCompressedOops) {
2859 StubRoutines::_oop_disjoint_arraycopy = generate_disjoint_int_oop_copy(false, true, &entry,
2860 "oop_disjoint_arraycopy");
2861 StubRoutines::_oop_arraycopy = generate_conjoint_int_oop_copy(false, true, entry,
2862 &entry_oop_arraycopy, "oop_arraycopy");
2863 StubRoutines::_oop_disjoint_arraycopy_uninit = generate_disjoint_int_oop_copy(false, true, &entry,
2864 "oop_disjoint_arraycopy_uninit",
2865 /*dest_uninitialized*/true);
2866 StubRoutines::_oop_arraycopy_uninit = generate_conjoint_int_oop_copy(false, true, entry,
2867 NULL, "oop_arraycopy_uninit",
2868 /*dest_uninitialized*/true);
2869 } else {
2870 StubRoutines::_oop_disjoint_arraycopy = generate_disjoint_long_oop_copy(false, true, &entry,
2871 "oop_disjoint_arraycopy");
2872 StubRoutines::_oop_arraycopy = generate_conjoint_long_oop_copy(false, true, entry,
2873 &entry_oop_arraycopy, "oop_arraycopy");
2874 StubRoutines::_oop_disjoint_arraycopy_uninit = generate_disjoint_long_oop_copy(false, true, &entry,
2875 "oop_disjoint_arraycopy_uninit",
2876 /*dest_uninitialized*/true);
2877 StubRoutines::_oop_arraycopy_uninit = generate_conjoint_long_oop_copy(false, true, entry,
2878 NULL, "oop_arraycopy_uninit",
2879 /*dest_uninitialized*/true);
2880 }
2881
2882 StubRoutines::_checkcast_arraycopy = generate_checkcast_copy("checkcast_arraycopy", &entry_checkcast_arraycopy);
2883 StubRoutines::_checkcast_arraycopy_uninit = generate_checkcast_copy("checkcast_arraycopy_uninit", NULL,
2884 /*dest_uninitialized*/true);
2885
2886 StubRoutines::_unsafe_arraycopy = generate_unsafe_copy("unsafe_arraycopy",
2887 entry_jbyte_arraycopy,
2888 entry_jshort_arraycopy,
2889 entry_jint_arraycopy,
2890 entry_jlong_arraycopy);
2891 StubRoutines::_generic_arraycopy = generate_generic_copy("generic_arraycopy",
2892 entry_jbyte_arraycopy,
2893 entry_jshort_arraycopy,
2894 entry_jint_arraycopy,
2895 entry_oop_arraycopy,
2896 entry_jlong_arraycopy,
2897 entry_checkcast_arraycopy);
2898
2899 StubRoutines::_jbyte_fill = generate_fill(T_BYTE, false, "jbyte_fill");
2900 StubRoutines::_jshort_fill = generate_fill(T_SHORT, false, "jshort_fill");
2901 StubRoutines::_jint_fill = generate_fill(T_INT, false, "jint_fill");
2902 StubRoutines::_arrayof_jbyte_fill = generate_fill(T_BYTE, true, "arrayof_jbyte_fill");
2903 StubRoutines::_arrayof_jshort_fill = generate_fill(T_SHORT, true, "arrayof_jshort_fill");
2904 StubRoutines::_arrayof_jint_fill = generate_fill(T_INT, true, "arrayof_jint_fill");
2905
2906 // We don't generate specialized code for HeapWord-aligned source
2907 // arrays, so just use the code we've already generated
2908 StubRoutines::_arrayof_jbyte_disjoint_arraycopy = StubRoutines::_jbyte_disjoint_arraycopy;
2909 StubRoutines::_arrayof_jbyte_arraycopy = StubRoutines::_jbyte_arraycopy;
2910
2911 StubRoutines::_arrayof_jshort_disjoint_arraycopy = StubRoutines::_jshort_disjoint_arraycopy;
2912 StubRoutines::_arrayof_jshort_arraycopy = StubRoutines::_jshort_arraycopy;
2913
2914 StubRoutines::_arrayof_jint_disjoint_arraycopy = StubRoutines::_jint_disjoint_arraycopy;
2915 StubRoutines::_arrayof_jint_arraycopy = StubRoutines::_jint_arraycopy;
2916
2917 StubRoutines::_arrayof_jlong_disjoint_arraycopy = StubRoutines::_jlong_disjoint_arraycopy;
2918 StubRoutines::_arrayof_jlong_arraycopy = StubRoutines::_jlong_arraycopy;
2919
2920 StubRoutines::_arrayof_oop_disjoint_arraycopy = StubRoutines::_oop_disjoint_arraycopy;
2921 StubRoutines::_arrayof_oop_arraycopy = StubRoutines::_oop_arraycopy;
2922
2923 StubRoutines::_arrayof_oop_disjoint_arraycopy_uninit = StubRoutines::_oop_disjoint_arraycopy_uninit;
2924 StubRoutines::_arrayof_oop_arraycopy_uninit = StubRoutines::_oop_arraycopy_uninit;
2925 }
2926
2927 void generate_math_stubs() {
2928 {
2929 StubCodeMark mark(this, "StubRoutines", "log");
2930 StubRoutines::_intrinsic_log = (double (*)(double)) __ pc();
2931
2932 __ subq(rsp, 8);
2933 __ movdbl(Address(rsp, 0), xmm0);
2934 __ fld_d(Address(rsp, 0));
2935 __ flog();
2936 __ fstp_d(Address(rsp, 0));
2937 __ movdbl(xmm0, Address(rsp, 0));
2938 __ addq(rsp, 8);
2939 __ ret(0);
2940 }
2941 {
2942 StubCodeMark mark(this, "StubRoutines", "log10");
2943 StubRoutines::_intrinsic_log10 = (double (*)(double)) __ pc();
2944
2945 __ subq(rsp, 8);
2946 __ movdbl(Address(rsp, 0), xmm0);
2947 __ fld_d(Address(rsp, 0));
2948 __ flog10();
2949 __ fstp_d(Address(rsp, 0));
2950 __ movdbl(xmm0, Address(rsp, 0));
2951 __ addq(rsp, 8);
2952 __ ret(0);
2953 }
2954 {
2955 StubCodeMark mark(this, "StubRoutines", "sin");
2956 StubRoutines::_intrinsic_sin = (double (*)(double)) __ pc();
2957
2958 __ subq(rsp, 8);
2959 __ movdbl(Address(rsp, 0), xmm0);
2960 __ fld_d(Address(rsp, 0));
2961 __ trigfunc('s');
2962 __ fstp_d(Address(rsp, 0));
2963 __ movdbl(xmm0, Address(rsp, 0));
2964 __ addq(rsp, 8);
2965 __ ret(0);
2966 }
2967 {
2968 StubCodeMark mark(this, "StubRoutines", "cos");
2969 StubRoutines::_intrinsic_cos = (double (*)(double)) __ pc();
2970
2971 __ subq(rsp, 8);
2972 __ movdbl(Address(rsp, 0), xmm0);
2973 __ fld_d(Address(rsp, 0));
2974 __ trigfunc('c');
2975 __ fstp_d(Address(rsp, 0));
2976 __ movdbl(xmm0, Address(rsp, 0));
2977 __ addq(rsp, 8);
2978 __ ret(0);
2979 }
2980 {
2981 StubCodeMark mark(this, "StubRoutines", "tan");
2982 StubRoutines::_intrinsic_tan = (double (*)(double)) __ pc();
2983
2984 __ subq(rsp, 8);
2985 __ movdbl(Address(rsp, 0), xmm0);
2986 __ fld_d(Address(rsp, 0));
2987 __ trigfunc('t');
2988 __ fstp_d(Address(rsp, 0));
2989 __ movdbl(xmm0, Address(rsp, 0));
2990 __ addq(rsp, 8);
2991 __ ret(0);
2992 }
2993 {
2994 StubCodeMark mark(this, "StubRoutines", "exp");
2995 StubRoutines::_intrinsic_exp = (double (*)(double)) __ pc();
2996
2997 __ subq(rsp, 8);
2998 __ movdbl(Address(rsp, 0), xmm0);
2999 __ fld_d(Address(rsp, 0));
3000 __ exp_with_fallback(0);
3001 __ fstp_d(Address(rsp, 0));
3002 __ movdbl(xmm0, Address(rsp, 0));
3003 __ addq(rsp, 8);
3004 __ ret(0);
3005 }
3006 {
3007 StubCodeMark mark(this, "StubRoutines", "pow");
3008 StubRoutines::_intrinsic_pow = (double (*)(double,double)) __ pc();
3009
3010 __ subq(rsp, 8);
3011 __ movdbl(Address(rsp, 0), xmm1);
3012 __ fld_d(Address(rsp, 0));
3013 __ movdbl(Address(rsp, 0), xmm0);
3014 __ fld_d(Address(rsp, 0));
3015 __ pow_with_fallback(0);
3016 __ fstp_d(Address(rsp, 0));
3017 __ movdbl(xmm0, Address(rsp, 0));
3018 __ addq(rsp, 8);
3019 __ ret(0);
3020 }
3021 }
3022
3023 // AES intrinsic stubs
3024 enum {AESBlockSize = 16};
3025
3026 address generate_key_shuffle_mask() {
3027 __ align(16);
3028 StubCodeMark mark(this, "StubRoutines", "key_shuffle_mask");
3029 address start = __ pc();
3030 __ emit_data64( 0x0405060700010203, relocInfo::none );
3031 __ emit_data64( 0x0c0d0e0f08090a0b, relocInfo::none );
3032 return start;
3033 }
3034
3035 // Utility routine for loading a 128-bit key word in little endian format
3036 // can optionally specify that the shuffle mask is already in an xmmregister
3037 void load_key(XMMRegister xmmdst, Register key, int offset, XMMRegister xmm_shuf_mask=NULL) {
3038 __ movdqu(xmmdst, Address(key, offset));
3039 if (xmm_shuf_mask != NULL) {
3040 __ pshufb(xmmdst, xmm_shuf_mask);
3041 } else {
3042 __ pshufb(xmmdst, ExternalAddress(StubRoutines::x86::key_shuffle_mask_addr()));
3043 }
3044 }
3045
3046 // Arguments:
3047 //
3048 // Inputs:
3049 // c_rarg0 - source byte array address
3050 // c_rarg1 - destination byte array address
3051 // c_rarg2 - K (key) in little endian int array
3052 //
3053 address generate_aescrypt_encryptBlock() {
3054 assert(UseAES, "need AES instructions and misaligned SSE support");
3055 __ align(CodeEntryAlignment);
3056 StubCodeMark mark(this, "StubRoutines", "aescrypt_encryptBlock");
3057 Label L_doLast;
3058 address start = __ pc();
3059
3060 const Register from = c_rarg0; // source array address
3061 const Register to = c_rarg1; // destination array address
3062 const Register key = c_rarg2; // key array address
3063 const Register keylen = rax;
3064
3065 const XMMRegister xmm_result = xmm0;
3066 const XMMRegister xmm_key_shuf_mask = xmm1;
3067 // On win64 xmm6-xmm15 must be preserved so don't use them.
3068 const XMMRegister xmm_temp1 = xmm2;
3069 const XMMRegister xmm_temp2 = xmm3;
3070 const XMMRegister xmm_temp3 = xmm4;
3071 const XMMRegister xmm_temp4 = xmm5;
3072
3073 __ enter(); // required for proper stackwalking of RuntimeStub frame
3074
3075 // keylen could be only {11, 13, 15} * 4 = {44, 52, 60}
3076 __ movl(keylen, Address(key, arrayOopDesc::length_offset_in_bytes() - arrayOopDesc::base_offset_in_bytes(T_INT)));
3077
3078 __ movdqu(xmm_key_shuf_mask, ExternalAddress(StubRoutines::x86::key_shuffle_mask_addr()));
3079 __ movdqu(xmm_result, Address(from, 0)); // get 16 bytes of input
3080
3081 // For encryption, the java expanded key ordering is just what we need
3082 // we don't know if the key is aligned, hence not using load-execute form
3083
3084 load_key(xmm_temp1, key, 0x00, xmm_key_shuf_mask);
3085 __ pxor(xmm_result, xmm_temp1);
3086
3087 load_key(xmm_temp1, key, 0x10, xmm_key_shuf_mask);
3088 load_key(xmm_temp2, key, 0x20, xmm_key_shuf_mask);
3089 load_key(xmm_temp3, key, 0x30, xmm_key_shuf_mask);
3090 load_key(xmm_temp4, key, 0x40, xmm_key_shuf_mask);
3091
3092 __ aesenc(xmm_result, xmm_temp1);
3093 __ aesenc(xmm_result, xmm_temp2);
3094 __ aesenc(xmm_result, xmm_temp3);
3095 __ aesenc(xmm_result, xmm_temp4);
3096
3097 load_key(xmm_temp1, key, 0x50, xmm_key_shuf_mask);
3098 load_key(xmm_temp2, key, 0x60, xmm_key_shuf_mask);
3099 load_key(xmm_temp3, key, 0x70, xmm_key_shuf_mask);
3100 load_key(xmm_temp4, key, 0x80, xmm_key_shuf_mask);
3101
3102 __ aesenc(xmm_result, xmm_temp1);
3103 __ aesenc(xmm_result, xmm_temp2);
3104 __ aesenc(xmm_result, xmm_temp3);
3105 __ aesenc(xmm_result, xmm_temp4);
3106
3107 load_key(xmm_temp1, key, 0x90, xmm_key_shuf_mask);
3108 load_key(xmm_temp2, key, 0xa0, xmm_key_shuf_mask);
3109
3110 __ cmpl(keylen, 44);
3111 __ jccb(Assembler::equal, L_doLast);
3112
3113 __ aesenc(xmm_result, xmm_temp1);
3114 __ aesenc(xmm_result, xmm_temp2);
3115
3116 load_key(xmm_temp1, key, 0xb0, xmm_key_shuf_mask);
3117 load_key(xmm_temp2, key, 0xc0, xmm_key_shuf_mask);
3118
3119 __ cmpl(keylen, 52);
3120 __ jccb(Assembler::equal, L_doLast);
3121
3122 __ aesenc(xmm_result, xmm_temp1);
3123 __ aesenc(xmm_result, xmm_temp2);
3124
3125 load_key(xmm_temp1, key, 0xd0, xmm_key_shuf_mask);
3126 load_key(xmm_temp2, key, 0xe0, xmm_key_shuf_mask);
3127
3128 __ BIND(L_doLast);
3129 __ aesenc(xmm_result, xmm_temp1);
3130 __ aesenclast(xmm_result, xmm_temp2);
3131 __ movdqu(Address(to, 0), xmm_result); // store the result
3132 __ xorptr(rax, rax); // return 0
3133 __ leave(); // required for proper stackwalking of RuntimeStub frame
3134 __ ret(0);
3135
3136 return start;
3137 }
3138
3139
3140 // Arguments:
3141 //
3142 // Inputs:
3143 // c_rarg0 - source byte array address
3144 // c_rarg1 - destination byte array address
3145 // c_rarg2 - K (key) in little endian int array
3146 //
3147 address generate_aescrypt_decryptBlock() {
3148 assert(UseAES, "need AES instructions and misaligned SSE support");
3149 __ align(CodeEntryAlignment);
3150 StubCodeMark mark(this, "StubRoutines", "aescrypt_decryptBlock");
3151 Label L_doLast;
3152 address start = __ pc();
3153
3154 const Register from = c_rarg0; // source array address
3155 const Register to = c_rarg1; // destination array address
3156 const Register key = c_rarg2; // key array address
3157 const Register keylen = rax;
3158
3159 const XMMRegister xmm_result = xmm0;
3160 const XMMRegister xmm_key_shuf_mask = xmm1;
3161 // On win64 xmm6-xmm15 must be preserved so don't use them.
3162 const XMMRegister xmm_temp1 = xmm2;
3163 const XMMRegister xmm_temp2 = xmm3;
3164 const XMMRegister xmm_temp3 = xmm4;
3165 const XMMRegister xmm_temp4 = xmm5;
3166
3167 __ enter(); // required for proper stackwalking of RuntimeStub frame
3168
3169 // keylen could be only {11, 13, 15} * 4 = {44, 52, 60}
3170 __ movl(keylen, Address(key, arrayOopDesc::length_offset_in_bytes() - arrayOopDesc::base_offset_in_bytes(T_INT)));
3171
3172 __ movdqu(xmm_key_shuf_mask, ExternalAddress(StubRoutines::x86::key_shuffle_mask_addr()));
3173 __ movdqu(xmm_result, Address(from, 0));
3174
3175 // for decryption java expanded key ordering is rotated one position from what we want
3176 // so we start from 0x10 here and hit 0x00 last
3177 // we don't know if the key is aligned, hence not using load-execute form
3178 load_key(xmm_temp1, key, 0x10, xmm_key_shuf_mask);
3179 load_key(xmm_temp2, key, 0x20, xmm_key_shuf_mask);
3180 load_key(xmm_temp3, key, 0x30, xmm_key_shuf_mask);
3181 load_key(xmm_temp4, key, 0x40, xmm_key_shuf_mask);
3182
3183 __ pxor (xmm_result, xmm_temp1);
3184 __ aesdec(xmm_result, xmm_temp2);
3185 __ aesdec(xmm_result, xmm_temp3);
3186 __ aesdec(xmm_result, xmm_temp4);
3187
3188 load_key(xmm_temp1, key, 0x50, xmm_key_shuf_mask);
3189 load_key(xmm_temp2, key, 0x60, xmm_key_shuf_mask);
3190 load_key(xmm_temp3, key, 0x70, xmm_key_shuf_mask);
3191 load_key(xmm_temp4, key, 0x80, xmm_key_shuf_mask);
3192
3193 __ aesdec(xmm_result, xmm_temp1);
3194 __ aesdec(xmm_result, xmm_temp2);
3195 __ aesdec(xmm_result, xmm_temp3);
3196 __ aesdec(xmm_result, xmm_temp4);
3197
3198 load_key(xmm_temp1, key, 0x90, xmm_key_shuf_mask);
3199 load_key(xmm_temp2, key, 0xa0, xmm_key_shuf_mask);
3200 load_key(xmm_temp3, key, 0x00, xmm_key_shuf_mask);
3201
3202 __ cmpl(keylen, 44);
3203 __ jccb(Assembler::equal, L_doLast);
3204
3205 __ aesdec(xmm_result, xmm_temp1);
3206 __ aesdec(xmm_result, xmm_temp2);
3207
3208 load_key(xmm_temp1, key, 0xb0, xmm_key_shuf_mask);
3209 load_key(xmm_temp2, key, 0xc0, xmm_key_shuf_mask);
3210
3211 __ cmpl(keylen, 52);
3212 __ jccb(Assembler::equal, L_doLast);
3213
3214 __ aesdec(xmm_result, xmm_temp1);
3215 __ aesdec(xmm_result, xmm_temp2);
3216
3217 load_key(xmm_temp1, key, 0xd0, xmm_key_shuf_mask);
3218 load_key(xmm_temp2, key, 0xe0, xmm_key_shuf_mask);
3219
3220 __ BIND(L_doLast);
3221 __ aesdec(xmm_result, xmm_temp1);
3222 __ aesdec(xmm_result, xmm_temp2);
3223
3224 // for decryption the aesdeclast operation is always on key+0x00
3225 __ aesdeclast(xmm_result, xmm_temp3);
3226 __ movdqu(Address(to, 0), xmm_result); // store the result
3227 __ xorptr(rax, rax); // return 0
3228 __ leave(); // required for proper stackwalking of RuntimeStub frame
3229 __ ret(0);
3230
3231 return start;
3232 }
3233
3234
3235 // Arguments:
3236 //
3237 // Inputs:
3238 // c_rarg0 - source byte array address
3239 // c_rarg1 - destination byte array address
3240 // c_rarg2 - K (key) in little endian int array
3241 // c_rarg3 - r vector byte array address
3242 // c_rarg4 - input length
3243 //
3244 // Output:
3245 // rax - input length
3246 //
3247 address generate_cipherBlockChaining_encryptAESCrypt() {
3248 assert(UseAES, "need AES instructions and misaligned SSE support");
3249 __ align(CodeEntryAlignment);
3250 StubCodeMark mark(this, "StubRoutines", "cipherBlockChaining_encryptAESCrypt");
3251 address start = __ pc();
3252
3253 Label L_exit, L_key_192_256, L_key_256, L_loopTop_128, L_loopTop_192, L_loopTop_256;
3254 const Register from = c_rarg0; // source array address
3255 const Register to = c_rarg1; // destination array address
3256 const Register key = c_rarg2; // key array address
3257 const Register rvec = c_rarg3; // r byte array initialized from initvector array address
3258 // and left with the results of the last encryption block
3259 #ifndef _WIN64
3260 const Register len_reg = c_rarg4; // src len (must be multiple of blocksize 16)
3261 #else
3262 const Address len_mem(rbp, 6 * wordSize); // length is on stack on Win64
3263 const Register len_reg = r10; // pick the first volatile windows register
3264 #endif
3265 const Register pos = rax;
3266
3267 // xmm register assignments for the loops below
3268 const XMMRegister xmm_result = xmm0;
3269 const XMMRegister xmm_temp = xmm1;
3270 // keys 0-10 preloaded into xmm2-xmm12
3271 const int XMM_REG_NUM_KEY_FIRST = 2;
3272 const int XMM_REG_NUM_KEY_LAST = 15;
3273 const XMMRegister xmm_key0 = as_XMMRegister(XMM_REG_NUM_KEY_FIRST);
3274 const XMMRegister xmm_key10 = as_XMMRegister(XMM_REG_NUM_KEY_FIRST+10);
3275 const XMMRegister xmm_key11 = as_XMMRegister(XMM_REG_NUM_KEY_FIRST+11);
3276 const XMMRegister xmm_key12 = as_XMMRegister(XMM_REG_NUM_KEY_FIRST+12);
3277 const XMMRegister xmm_key13 = as_XMMRegister(XMM_REG_NUM_KEY_FIRST+13);
3278
3279 __ enter(); // required for proper stackwalking of RuntimeStub frame
3280
3281 #ifdef _WIN64
3282 // on win64, fill len_reg from stack position
3283 __ movl(len_reg, len_mem);
3284 // save the xmm registers which must be preserved 6-15
3285 __ subptr(rsp, -rsp_after_call_off * wordSize);
3286 for (int i = 6; i <= XMM_REG_NUM_KEY_LAST; i++) {
3287 __ movdqu(xmm_save(i), as_XMMRegister(i));
3288 }
3289 #else
3290 __ push(len_reg); // Save
3291 #endif
3292
3293 const XMMRegister xmm_key_shuf_mask = xmm_temp; // used temporarily to swap key bytes up front
3294 __ movdqu(xmm_key_shuf_mask, ExternalAddress(StubRoutines::x86::key_shuffle_mask_addr()));
3295 // load up xmm regs xmm2 thru xmm12 with key 0x00 - 0xa0
3296 for (int rnum = XMM_REG_NUM_KEY_FIRST, offset = 0x00; rnum <= XMM_REG_NUM_KEY_FIRST+10; rnum++) {
3297 load_key(as_XMMRegister(rnum), key, offset, xmm_key_shuf_mask);
3298 offset += 0x10;
3299 }
3300 __ movdqu(xmm_result, Address(rvec, 0x00)); // initialize xmm_result with r vec
3301
3302 // now split to different paths depending on the keylen (len in ints of AESCrypt.KLE array (52=192, or 60=256))
3303 __ movl(rax, Address(key, arrayOopDesc::length_offset_in_bytes() - arrayOopDesc::base_offset_in_bytes(T_INT)));
3304 __ cmpl(rax, 44);
3305 __ jcc(Assembler::notEqual, L_key_192_256);
3306
3307 // 128 bit code follows here
3308 __ movptr(pos, 0);
3309 __ align(OptoLoopAlignment);
3310
3311 __ BIND(L_loopTop_128);
3312 __ movdqu(xmm_temp, Address(from, pos, Address::times_1, 0)); // get next 16 bytes of input
3313 __ pxor (xmm_result, xmm_temp); // xor with the current r vector
3314 __ pxor (xmm_result, xmm_key0); // do the aes rounds
3315 for (int rnum = XMM_REG_NUM_KEY_FIRST + 1; rnum <= XMM_REG_NUM_KEY_FIRST + 9; rnum++) {
3316 __ aesenc(xmm_result, as_XMMRegister(rnum));
3317 }
3318 __ aesenclast(xmm_result, xmm_key10);
3319 __ movdqu(Address(to, pos, Address::times_1, 0), xmm_result); // store into the next 16 bytes of output
3320 // no need to store r to memory until we exit
3321 __ addptr(pos, AESBlockSize);
3322 __ subptr(len_reg, AESBlockSize);
3323 __ jcc(Assembler::notEqual, L_loopTop_128);
3324
3325 __ BIND(L_exit);
3326 __ movdqu(Address(rvec, 0), xmm_result); // final value of r stored in rvec of CipherBlockChaining object
3327
3328 #ifdef _WIN64
3329 // restore xmm regs belonging to calling function
3330 for (int i = 6; i <= XMM_REG_NUM_KEY_LAST; i++) {
3331 __ movdqu(as_XMMRegister(i), xmm_save(i));
3332 }
3333 __ movl(rax, len_mem);
3334 #else
3335 __ pop(rax); // return length
3336 #endif
3337 __ leave(); // required for proper stackwalking of RuntimeStub frame
3338 __ ret(0);
3339
3340 __ BIND(L_key_192_256);
3341 // here rax = len in ints of AESCrypt.KLE array (52=192, or 60=256)
3342 load_key(xmm_key11, key, 0xb0, xmm_key_shuf_mask);
3343 load_key(xmm_key12, key, 0xc0, xmm_key_shuf_mask);
3344 __ cmpl(rax, 52);
3345 __ jcc(Assembler::notEqual, L_key_256);
3346
3347 // 192-bit code follows here (could be changed to use more xmm registers)
3348 __ movptr(pos, 0);
3349 __ align(OptoLoopAlignment);
3350
3351 __ BIND(L_loopTop_192);
3352 __ movdqu(xmm_temp, Address(from, pos, Address::times_1, 0)); // get next 16 bytes of input
3353 __ pxor (xmm_result, xmm_temp); // xor with the current r vector
3354 __ pxor (xmm_result, xmm_key0); // do the aes rounds
3355 for (int rnum = XMM_REG_NUM_KEY_FIRST + 1; rnum <= XMM_REG_NUM_KEY_FIRST + 11; rnum++) {
3356 __ aesenc(xmm_result, as_XMMRegister(rnum));
3357 }
3358 __ aesenclast(xmm_result, xmm_key12);
3359 __ movdqu(Address(to, pos, Address::times_1, 0), xmm_result); // store into the next 16 bytes of output
3360 // no need to store r to memory until we exit
3361 __ addptr(pos, AESBlockSize);
3362 __ subptr(len_reg, AESBlockSize);
3363 __ jcc(Assembler::notEqual, L_loopTop_192);
3364 __ jmp(L_exit);
3365
3366 __ BIND(L_key_256);
3367 // 256-bit code follows here (could be changed to use more xmm registers)
3368 load_key(xmm_key13, key, 0xd0, xmm_key_shuf_mask);
3369 __ movptr(pos, 0);
3370 __ align(OptoLoopAlignment);
3371
3372 __ BIND(L_loopTop_256);
3373 __ movdqu(xmm_temp, Address(from, pos, Address::times_1, 0)); // get next 16 bytes of input
3374 __ pxor (xmm_result, xmm_temp); // xor with the current r vector
3375 __ pxor (xmm_result, xmm_key0); // do the aes rounds
3376 for (int rnum = XMM_REG_NUM_KEY_FIRST + 1; rnum <= XMM_REG_NUM_KEY_FIRST + 13; rnum++) {
3377 __ aesenc(xmm_result, as_XMMRegister(rnum));
3378 }
3379 load_key(xmm_temp, key, 0xe0);
3380 __ aesenclast(xmm_result, xmm_temp);
3381 __ movdqu(Address(to, pos, Address::times_1, 0), xmm_result); // store into the next 16 bytes of output
3382 // no need to store r to memory until we exit
3383 __ addptr(pos, AESBlockSize);
3384 __ subptr(len_reg, AESBlockSize);
3385 __ jcc(Assembler::notEqual, L_loopTop_256);
3386 __ jmp(L_exit);
3387
3388 return start;
3389 }
3390
3391 // Safefetch stubs.
3392 void generate_safefetch(const char* name, int size, address* entry,
3393 address* fault_pc, address* continuation_pc) {
3394 // safefetch signatures:
3395 // int SafeFetch32(int* adr, int errValue);
3396 // intptr_t SafeFetchN (intptr_t* adr, intptr_t errValue);
3397 //
3398 // arguments:
3399 // c_rarg0 = adr
3400 // c_rarg1 = errValue
3401 //
3402 // result:
3403 // PPC_RET = *adr or errValue
3404
3405 StubCodeMark mark(this, "StubRoutines", name);
3406
3407 // Entry point, pc or function descriptor.
3408 *entry = __ pc();
3409
3410 // Load *adr into c_rarg1, may fault.
3411 *fault_pc = __ pc();
3412 switch (size) {
3413 case 4:
3414 // int32_t
3415 __ movl(c_rarg1, Address(c_rarg0, 0));
3416 break;
3417 case 8:
3418 // int64_t
3419 __ movq(c_rarg1, Address(c_rarg0, 0));
3420 break;
3421 default:
3422 ShouldNotReachHere();
3423 }
3424
3425 // return errValue or *adr
3426 *continuation_pc = __ pc();
3427 __ movq(rax, c_rarg1);
3428 __ ret(0);
3429 }
3430
3431 // This is a version of CBC/AES Decrypt which does 4 blocks in a loop at a time
3432 // to hide instruction latency
3433 //
3434 // Arguments:
3435 //
3436 // Inputs:
3437 // c_rarg0 - source byte array address
3438 // c_rarg1 - destination byte array address
3439 // c_rarg2 - K (key) in little endian int array
3440 // c_rarg3 - r vector byte array address
3441 // c_rarg4 - input length
3442 //
3443 // Output:
3444 // rax - input length
3445 //
3446
3447 address generate_cipherBlockChaining_decryptAESCrypt_Parallel() {
3448 assert(UseAES, "need AES instructions and misaligned SSE support");
3449 __ align(CodeEntryAlignment);
3450 StubCodeMark mark(this, "StubRoutines", "cipherBlockChaining_decryptAESCrypt");
3451 address start = __ pc();
3452
3453 Label L_exit, L_key_192_256, L_key_256;
3454 Label L_singleBlock_loopTop_128, L_multiBlock_loopTop_128;
3455 Label L_singleBlock_loopTop_192, L_singleBlock_loopTop_256;
3456 const Register from = c_rarg0; // source array address
3457 const Register to = c_rarg1; // destination array address
3458 const Register key = c_rarg2; // key array address
3459 const Register rvec = c_rarg3; // r byte array initialized from initvector array address
3460 // and left with the results of the last encryption block
3461 #ifndef _WIN64
3462 const Register len_reg = c_rarg4; // src len (must be multiple of blocksize 16)
3463 #else
3464 const Address len_mem(rbp, 6 * wordSize); // length is on stack on Win64
3465 const Register len_reg = r10; // pick the first volatile windows register
3466 #endif
3467 const Register pos = rax;
3468
3469 // keys 0-10 preloaded into xmm2-xmm12
3470 const int XMM_REG_NUM_KEY_FIRST = 5;
3471 const int XMM_REG_NUM_KEY_LAST = 15;
3472 const XMMRegister xmm_key_first = as_XMMRegister(XMM_REG_NUM_KEY_FIRST);
3473 const XMMRegister xmm_key_last = as_XMMRegister(XMM_REG_NUM_KEY_LAST);
3474
3475 __ enter(); // required for proper stackwalking of RuntimeStub frame
3476
3477 #ifdef _WIN64
3478 // on win64, fill len_reg from stack position
3479 __ movl(len_reg, len_mem);
3480 // save the xmm registers which must be preserved 6-15
3481 __ subptr(rsp, -rsp_after_call_off * wordSize);
3482 for (int i = 6; i <= XMM_REG_NUM_KEY_LAST; i++) {
3483 __ movdqu(xmm_save(i), as_XMMRegister(i));
3484 }
3485 #else
3486 __ push(len_reg); // Save
3487 #endif
3488
3489 // the java expanded key ordering is rotated one position from what we want
3490 // so we start from 0x10 here and hit 0x00 last
3491 const XMMRegister xmm_key_shuf_mask = xmm1; // used temporarily to swap key bytes up front
3492 __ movdqu(xmm_key_shuf_mask, ExternalAddress(StubRoutines::x86::key_shuffle_mask_addr()));
3493 // load up xmm regs 5 thru 15 with key 0x10 - 0xa0 - 0x00
3494 for (int rnum = XMM_REG_NUM_KEY_FIRST, offset = 0x10; rnum < XMM_REG_NUM_KEY_LAST; rnum++) {
3495 load_key(as_XMMRegister(rnum), key, offset, xmm_key_shuf_mask);
3496 offset += 0x10;
3497 }
3498 load_key(xmm_key_last, key, 0x00, xmm_key_shuf_mask);
3499
3500 const XMMRegister xmm_prev_block_cipher = xmm1; // holds cipher of previous block
3501
3502 // registers holding the four results in the parallelized loop
3503 const XMMRegister xmm_result0 = xmm0;
3504 const XMMRegister xmm_result1 = xmm2;
3505 const XMMRegister xmm_result2 = xmm3;
3506 const XMMRegister xmm_result3 = xmm4;
3507
3508 __ movdqu(xmm_prev_block_cipher, Address(rvec, 0x00)); // initialize with initial rvec
3509
3510 // now split to different paths depending on the keylen (len in ints of AESCrypt.KLE array (52=192, or 60=256))
3511 __ movl(rax, Address(key, arrayOopDesc::length_offset_in_bytes() - arrayOopDesc::base_offset_in_bytes(T_INT)));
3512 __ cmpl(rax, 44);
3513 __ jcc(Assembler::notEqual, L_key_192_256);
3514
3515
3516 // 128-bit code follows here, parallelized
3517 __ movptr(pos, 0);
3518 __ align(OptoLoopAlignment);
3519 __ BIND(L_multiBlock_loopTop_128);
3520 __ cmpptr(len_reg, 4*AESBlockSize); // see if at least 4 blocks left
3521 __ jcc(Assembler::less, L_singleBlock_loopTop_128);
3522
3523 __ movdqu(xmm_result0, Address(from, pos, Address::times_1, 0*AESBlockSize)); // get next 4 blocks into xmmresult registers
3524 __ movdqu(xmm_result1, Address(from, pos, Address::times_1, 1*AESBlockSize));
3525 __ movdqu(xmm_result2, Address(from, pos, Address::times_1, 2*AESBlockSize));
3526 __ movdqu(xmm_result3, Address(from, pos, Address::times_1, 3*AESBlockSize));
3527
3528 #define DoFour(opc, src_reg) \
3529 __ opc(xmm_result0, src_reg); \
3530 __ opc(xmm_result1, src_reg); \
3531 __ opc(xmm_result2, src_reg); \
3532 __ opc(xmm_result3, src_reg);
3533
3534 DoFour(pxor, xmm_key_first);
3535 for (int rnum = XMM_REG_NUM_KEY_FIRST + 1; rnum <= XMM_REG_NUM_KEY_LAST - 1; rnum++) {
3536 DoFour(aesdec, as_XMMRegister(rnum));
3537 }
3538 DoFour(aesdeclast, xmm_key_last);
3539 // for each result, xor with the r vector of previous cipher block
3540 __ pxor(xmm_result0, xmm_prev_block_cipher);
3541 __ movdqu(xmm_prev_block_cipher, Address(from, pos, Address::times_1, 0*AESBlockSize));
3542 __ pxor(xmm_result1, xmm_prev_block_cipher);
3543 __ movdqu(xmm_prev_block_cipher, Address(from, pos, Address::times_1, 1*AESBlockSize));
3544 __ pxor(xmm_result2, xmm_prev_block_cipher);
3545 __ movdqu(xmm_prev_block_cipher, Address(from, pos, Address::times_1, 2*AESBlockSize));
3546 __ pxor(xmm_result3, xmm_prev_block_cipher);
3547 __ movdqu(xmm_prev_block_cipher, Address(from, pos, Address::times_1, 3*AESBlockSize)); // this will carry over to next set of blocks
3548
3549 __ movdqu(Address(to, pos, Address::times_1, 0*AESBlockSize), xmm_result0); // store 4 results into the next 64 bytes of output
3550 __ movdqu(Address(to, pos, Address::times_1, 1*AESBlockSize), xmm_result1);
3551 __ movdqu(Address(to, pos, Address::times_1, 2*AESBlockSize), xmm_result2);
3552 __ movdqu(Address(to, pos, Address::times_1, 3*AESBlockSize), xmm_result3);
3553
3554 __ addptr(pos, 4*AESBlockSize);
3555 __ subptr(len_reg, 4*AESBlockSize);
3556 __ jmp(L_multiBlock_loopTop_128);
3557
3558 // registers used in the non-parallelized loops
3559 // xmm register assignments for the loops below
3560 const XMMRegister xmm_result = xmm0;
3561 const XMMRegister xmm_prev_block_cipher_save = xmm2;
3562 const XMMRegister xmm_key11 = xmm3;
3563 const XMMRegister xmm_key12 = xmm4;
3564 const XMMRegister xmm_temp = xmm4;
3565
3566 __ align(OptoLoopAlignment);
3567 __ BIND(L_singleBlock_loopTop_128);
3568 __ cmpptr(len_reg, 0); // any blocks left??
3569 __ jcc(Assembler::equal, L_exit);
3570 __ movdqu(xmm_result, Address(from, pos, Address::times_1, 0)); // get next 16 bytes of cipher input
3571 __ movdqa(xmm_prev_block_cipher_save, xmm_result); // save for next r vector
3572 __ pxor (xmm_result, xmm_key_first); // do the aes dec rounds
3573 for (int rnum = XMM_REG_NUM_KEY_FIRST + 1; rnum <= XMM_REG_NUM_KEY_LAST - 1; rnum++) {
3574 __ aesdec(xmm_result, as_XMMRegister(rnum));
3575 }
3576 __ aesdeclast(xmm_result, xmm_key_last);
3577 __ pxor (xmm_result, xmm_prev_block_cipher); // xor with the current r vector
3578 __ movdqu(Address(to, pos, Address::times_1, 0), xmm_result); // store into the next 16 bytes of output
3579 // no need to store r to memory until we exit
3580 __ movdqa(xmm_prev_block_cipher, xmm_prev_block_cipher_save); // set up next r vector with cipher input from this block
3581
3582 __ addptr(pos, AESBlockSize);
3583 __ subptr(len_reg, AESBlockSize);
3584 __ jmp(L_singleBlock_loopTop_128);
3585
3586
3587 __ BIND(L_exit);
3588 __ movdqu(Address(rvec, 0), xmm_prev_block_cipher); // final value of r stored in rvec of CipherBlockChaining object
3589 #ifdef _WIN64
3590 // restore regs belonging to calling function
3591 for (int i = 6; i <= XMM_REG_NUM_KEY_LAST; i++) {
3592 __ movdqu(as_XMMRegister(i), xmm_save(i));
3593 }
3594 __ movl(rax, len_mem);
3595 #else
3596 __ pop(rax); // return length
3597 #endif
3598 __ leave(); // required for proper stackwalking of RuntimeStub frame
3599 __ ret(0);
3600
3601
3602 __ BIND(L_key_192_256);
3603 // here rax = len in ints of AESCrypt.KLE array (52=192, or 60=256)
3604 load_key(xmm_key11, key, 0xb0);
3605 __ cmpl(rax, 52);
3606 __ jcc(Assembler::notEqual, L_key_256);
3607
3608 // 192-bit code follows here (could be optimized to use parallelism)
3609 load_key(xmm_key12, key, 0xc0); // 192-bit key goes up to c0
3610 __ movptr(pos, 0);
3611 __ align(OptoLoopAlignment);
3612
3613 __ BIND(L_singleBlock_loopTop_192);
3614 __ movdqu(xmm_result, Address(from, pos, Address::times_1, 0)); // get next 16 bytes of cipher input
3615 __ movdqa(xmm_prev_block_cipher_save, xmm_result); // save for next r vector
3616 __ pxor (xmm_result, xmm_key_first); // do the aes dec rounds
3617 for (int rnum = XMM_REG_NUM_KEY_FIRST + 1; rnum <= XMM_REG_NUM_KEY_LAST - 1; rnum++) {
3618 __ aesdec(xmm_result, as_XMMRegister(rnum));
3619 }
3620 __ aesdec(xmm_result, xmm_key11);
3621 __ aesdec(xmm_result, xmm_key12);
3622 __ aesdeclast(xmm_result, xmm_key_last); // xmm15 always came from key+0
3623 __ pxor (xmm_result, xmm_prev_block_cipher); // xor with the current r vector
3624 __ movdqu(Address(to, pos, Address::times_1, 0), xmm_result); // store into the next 16 bytes of output
3625 // no need to store r to memory until we exit
3626 __ movdqa(xmm_prev_block_cipher, xmm_prev_block_cipher_save); // set up next r vector with cipher input from this block
3627 __ addptr(pos, AESBlockSize);
3628 __ subptr(len_reg, AESBlockSize);
3629 __ jcc(Assembler::notEqual,L_singleBlock_loopTop_192);
3630 __ jmp(L_exit);
3631
3632 __ BIND(L_key_256);
3633 // 256-bit code follows here (could be optimized to use parallelism)
3634 __ movptr(pos, 0);
3635 __ align(OptoLoopAlignment);
3636
3637 __ BIND(L_singleBlock_loopTop_256);
3638 __ movdqu(xmm_result, Address(from, pos, Address::times_1, 0)); // get next 16 bytes of cipher input
3639 __ movdqa(xmm_prev_block_cipher_save, xmm_result); // save for next r vector
3640 __ pxor (xmm_result, xmm_key_first); // do the aes dec rounds
3641 for (int rnum = XMM_REG_NUM_KEY_FIRST + 1; rnum <= XMM_REG_NUM_KEY_LAST - 1; rnum++) {
3642 __ aesdec(xmm_result, as_XMMRegister(rnum));
3643 }
3644 __ aesdec(xmm_result, xmm_key11);
3645 load_key(xmm_temp, key, 0xc0);
3646 __ aesdec(xmm_result, xmm_temp);
3647 load_key(xmm_temp, key, 0xd0);
3648 __ aesdec(xmm_result, xmm_temp);
3649 load_key(xmm_temp, key, 0xe0); // 256-bit key goes up to e0
3650 __ aesdec(xmm_result, xmm_temp);
3651 __ aesdeclast(xmm_result, xmm_key_last); // xmm15 came from key+0
3652 __ pxor (xmm_result, xmm_prev_block_cipher); // xor with the current r vector
3653 __ movdqu(Address(to, pos, Address::times_1, 0), xmm_result); // store into the next 16 bytes of output
3654 // no need to store r to memory until we exit
3655 __ movdqa(xmm_prev_block_cipher, xmm_prev_block_cipher_save); // set up next r vector with cipher input from this block
3656 __ addptr(pos, AESBlockSize);
3657 __ subptr(len_reg, AESBlockSize);
3658 __ jcc(Assembler::notEqual,L_singleBlock_loopTop_256);
3659 __ jmp(L_exit);
3660
3661 return start;
3662 }
3663
3664 /**
3665 * Arguments:
3666 *
3667 * Inputs:
3668 * c_rarg0 - int crc
3669 * c_rarg1 - byte* buf
3670 * c_rarg2 - int length
3671 *
3672 * Ouput:
3673 * rax - int crc result
3674 */
3675 address generate_updateBytesCRC32() {
3676 assert(UseCRC32Intrinsics, "need AVX and CLMUL instructions");
3677
3678 __ align(CodeEntryAlignment);
3679 StubCodeMark mark(this, "StubRoutines", "updateBytesCRC32");
3680
3681 address start = __ pc();
3682 // Win64: rcx, rdx, r8, r9 (c_rarg0, c_rarg1, ...)
3683 // Unix: rdi, rsi, rdx, rcx, r8, r9 (c_rarg0, c_rarg1, ...)
3684 // rscratch1: r10
3685 const Register crc = c_rarg0; // crc
3686 const Register buf = c_rarg1; // source java byte array address
3687 const Register len = c_rarg2; // length
3688 const Register table = c_rarg3; // crc_table address (reuse register)
3689 const Register tmp = r11;
3690 assert_different_registers(crc, buf, len, table, tmp, rax);
3691
3692 BLOCK_COMMENT("Entry:");
3693 __ enter(); // required for proper stackwalking of RuntimeStub frame
3694
3695 __ kernel_crc32(crc, buf, len, table, tmp);
3696
3697 __ movl(rax, crc);
3698 __ leave(); // required for proper stackwalking of RuntimeStub frame
3699 __ ret(0);
3700
3701 return start;
3702 }
3703
3704
3705 /**
3706 * Arguments:
3707 *
3708 * Input:
3709 * c_rarg0 - x address
3710 * c_rarg1 - x length
3711 * c_rarg2 - y address
3712 * c_rarg3 - y lenth
3713 * not Win64
3714 * c_rarg4 - z address
3715 * c_rarg5 - z length
3716 * Win64
3717 * rsp+40 - z address
3718 * rsp+48 - z length
3719 */
3720 address generate_multiplyToLen() {
3721 __ align(CodeEntryAlignment);
3722 StubCodeMark mark(this, "StubRoutines", "multiplyToLen");
3723
3724 address start = __ pc();
3725 // Win64: rcx, rdx, r8, r9 (c_rarg0, c_rarg1, ...)
3726 // Unix: rdi, rsi, rdx, rcx, r8, r9 (c_rarg0, c_rarg1, ...)
3727 const Register x = rdi;
3728 const Register xlen = rax;
3729 const Register y = rsi;
3730 const Register ylen = rcx;
3731 const Register z = r8;
3732 const Register zlen = r11;
3733
3734 // Next registers will be saved on stack in multiply_to_len().
3735 const Register tmp1 = r12;
3736 const Register tmp2 = r13;
3737 const Register tmp3 = r14;
3738 const Register tmp4 = r15;
3739 const Register tmp5 = rbx;
3740
3741 BLOCK_COMMENT("Entry:");
3742 __ enter(); // required for proper stackwalking of RuntimeStub frame
3743
3744 #ifndef _WIN64
3745 __ movptr(zlen, r9); // Save r9 in r11 - zlen
3746 #endif
3747 setup_arg_regs(4); // x => rdi, xlen => rsi, y => rdx
3748 // ylen => rcx, z => r8, zlen => r11
3749 // r9 and r10 may be used to save non-volatile registers
3750 #ifdef _WIN64
3751 // last 2 arguments (#4, #5) are on stack on Win64
3752 __ movptr(z, Address(rsp, 6 * wordSize));
3753 __ movptr(zlen, Address(rsp, 7 * wordSize));
3754 #endif
3755
3756 __ movptr(xlen, rsi);
3757 __ movptr(y, rdx);
3758 __ multiply_to_len(x, xlen, y, ylen, z, zlen, tmp1, tmp2, tmp3, tmp4, tmp5);
3759
3760 restore_arg_regs();
3761
3762 __ leave(); // required for proper stackwalking of RuntimeStub frame
3763 __ ret(0);
3764
3765 return start;
3766 }
3767
3768 #undef __
3769 #define __ masm->
3770
3771 // Continuation point for throwing of implicit exceptions that are
3772 // not handled in the current activation. Fabricates an exception
3773 // oop and initiates normal exception dispatching in this
3774 // frame. Since we need to preserve callee-saved values (currently
3775 // only for C2, but done for C1 as well) we need a callee-saved oop
3776 // map and therefore have to make these stubs into RuntimeStubs
3777 // rather than BufferBlobs. If the compiler needs all registers to
3778 // be preserved between the fault point and the exception handler
3779 // then it must assume responsibility for that in
3780 // AbstractCompiler::continuation_for_implicit_null_exception or
3781 // continuation_for_implicit_division_by_zero_exception. All other
3782 // implicit exceptions (e.g., NullPointerException or
3783 // AbstractMethodError on entry) are either at call sites or
3784 // otherwise assume that stack unwinding will be initiated, so
3785 // caller saved registers were assumed volatile in the compiler.
3786 address generate_throw_exception(const char* name,
3787 address runtime_entry,
3788 Register arg1 = noreg,
3789 Register arg2 = noreg) {
3790 // Information about frame layout at time of blocking runtime call.
3791 // Note that we only have to preserve callee-saved registers since
3792 // the compilers are responsible for supplying a continuation point
3793 // if they expect all registers to be preserved.
3794 enum layout {
3795 rbp_off = frame::arg_reg_save_area_bytes/BytesPerInt,
3796 rbp_off2,
3797 return_off,
3798 return_off2,
3799 framesize // inclusive of return address
3800 };
3801
3802 int insts_size = 512;
3803 int locs_size = 64;
3804
3805 CodeBuffer code(name, insts_size, locs_size);
3806 OopMapSet* oop_maps = new OopMapSet();
3807 MacroAssembler* masm = new MacroAssembler(&code);
3808
3809 address start = __ pc();
3810
3811 // This is an inlined and slightly modified version of call_VM
3812 // which has the ability to fetch the return PC out of
3813 // thread-local storage and also sets up last_Java_sp slightly
3814 // differently than the real call_VM
3815
3816 __ enter(); // required for proper stackwalking of RuntimeStub frame
3817
3818 assert(is_even(framesize/2), "sp not 16-byte aligned");
3819
3820 // return address and rbp are already in place
3821 __ subptr(rsp, (framesize-4) << LogBytesPerInt); // prolog
3822
3823 int frame_complete = __ pc() - start;
3824
3825 // Set up last_Java_sp and last_Java_fp
3826 address the_pc = __ pc();
3827 __ set_last_Java_frame(rsp, rbp, the_pc);
3828 __ andptr(rsp, -(StackAlignmentInBytes)); // Align stack
3829
3830 // Call runtime
3831 if (arg1 != noreg) {
3832 assert(arg2 != c_rarg1, "clobbered");
3833 __ movptr(c_rarg1, arg1);
3834 }
3835 if (arg2 != noreg) {
3836 __ movptr(c_rarg2, arg2);
3837 }
3838 __ movptr(c_rarg0, r15_thread);
3839 BLOCK_COMMENT("call runtime_entry");
3840 __ call(RuntimeAddress(runtime_entry));
3841
3842 // Generate oop map
3843 OopMap* map = new OopMap(framesize, 0);
3844
3845 oop_maps->add_gc_map(the_pc - start, map);
3846
3847 __ reset_last_Java_frame(true, true);
3848
3849 __ leave(); // required for proper stackwalking of RuntimeStub frame
3850
3851 // check for pending exceptions
3852 #ifdef ASSERT
3853 Label L;
3854 __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()),
3855 (int32_t) NULL_WORD);
3856 __ jcc(Assembler::notEqual, L);
3857 __ should_not_reach_here();
3858 __ bind(L);
3859 #endif // ASSERT
3860 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
3861
3862
3863 // codeBlob framesize is in words (not VMRegImpl::slot_size)
3864 RuntimeStub* stub =
3865 RuntimeStub::new_runtime_stub(name,
3866 &code,
3867 frame_complete,
3868 (framesize >> (LogBytesPerWord - LogBytesPerInt)),
3869 oop_maps, false);
3870 return stub->entry_point();
3871 }
3872
3873 void create_control_words() {
3874 // Round to nearest, 53-bit mode, exceptions masked
3875 StubRoutines::_fpu_cntrl_wrd_std = 0x027F;
3876 // Round to zero, 53-bit mode, exception mased
3877 StubRoutines::_fpu_cntrl_wrd_trunc = 0x0D7F;
3878 // Round to nearest, 24-bit mode, exceptions masked
3879 StubRoutines::_fpu_cntrl_wrd_24 = 0x007F;
3880 // Round to nearest, 64-bit mode, exceptions masked
3881 StubRoutines::_fpu_cntrl_wrd_64 = 0x037F;
3882 // Round to nearest, 64-bit mode, exceptions masked
3883 StubRoutines::_mxcsr_std = 0x1F80;
3884 // Note: the following two constants are 80-bit values
3885 // layout is critical for correct loading by FPU.
3886 // Bias for strict fp multiply/divide
3887 StubRoutines::_fpu_subnormal_bias1[0]= 0x00000000; // 2^(-15360) == 0x03ff 8000 0000 0000 0000
3888 StubRoutines::_fpu_subnormal_bias1[1]= 0x80000000;
3889 StubRoutines::_fpu_subnormal_bias1[2]= 0x03ff;
3890 // Un-Bias for strict fp multiply/divide
3891 StubRoutines::_fpu_subnormal_bias2[0]= 0x00000000; // 2^(+15360) == 0x7bff 8000 0000 0000 0000
3892 StubRoutines::_fpu_subnormal_bias2[1]= 0x80000000;
3893 StubRoutines::_fpu_subnormal_bias2[2]= 0x7bff;
3894 }
3895
3896 // Initialization
3897 void generate_initial() {
3898 // Generates all stubs and initializes the entry points
3899
3900 // This platform-specific settings are needed by generate_call_stub()
3901 create_control_words();
3902
3903 // entry points that exist in all platforms Note: This is code
3904 // that could be shared among different platforms - however the
3905 // benefit seems to be smaller than the disadvantage of having a
3906 // much more complicated generator structure. See also comment in
3907 // stubRoutines.hpp.
3908
3909 StubRoutines::_forward_exception_entry = generate_forward_exception();
3910
3911 StubRoutines::_call_stub_entry =
3912 generate_call_stub(StubRoutines::_call_stub_return_address);
3913
3914 // is referenced by megamorphic call
3915 StubRoutines::_catch_exception_entry = generate_catch_exception();
3916
3917 // atomic calls
3918 StubRoutines::_atomic_xchg_entry = generate_atomic_xchg();
3919 StubRoutines::_atomic_xchg_ptr_entry = generate_atomic_xchg_ptr();
3920 StubRoutines::_atomic_cmpxchg_entry = generate_atomic_cmpxchg();
3921 StubRoutines::_atomic_cmpxchg_byte_entry = generate_atomic_cmpxchg_byte();
3922 StubRoutines::_atomic_cmpxchg_long_entry = generate_atomic_cmpxchg_long();
3923 StubRoutines::_atomic_add_entry = generate_atomic_add();
3924 StubRoutines::_atomic_add_ptr_entry = generate_atomic_add_ptr();
3925 StubRoutines::_fence_entry = generate_orderaccess_fence();
3926
3927 StubRoutines::_handler_for_unsafe_access_entry =
3928 generate_handler_for_unsafe_access();
3929
3930 // platform dependent
3931 StubRoutines::x86::_get_previous_fp_entry = generate_get_previous_fp();
3932 StubRoutines::x86::_get_previous_sp_entry = generate_get_previous_sp();
3933
3934 StubRoutines::x86::_verify_mxcsr_entry = generate_verify_mxcsr();
3935
3936 // Build this early so it's available for the interpreter.
3937 StubRoutines::_throw_StackOverflowError_entry =
3938 generate_throw_exception("StackOverflowError throw_exception",
3939 CAST_FROM_FN_PTR(address,
3940 SharedRuntime::
3941 throw_StackOverflowError));
3942 if (UseCRC32Intrinsics) {
3943 // set table address before stub generation which use it
3944 StubRoutines::_crc_table_adr = (address)StubRoutines::x86::_crc_table;
3945 StubRoutines::_updateBytesCRC32 = generate_updateBytesCRC32();
3946 }
3947 }
3948
3949 void generate_all() {
3950 // Generates all stubs and initializes the entry points
3951
3952 // These entry points require SharedInfo::stack0 to be set up in
3953 // non-core builds and need to be relocatable, so they each
3954 // fabricate a RuntimeStub internally.
3955 StubRoutines::_throw_AbstractMethodError_entry =
3956 generate_throw_exception("AbstractMethodError throw_exception",
3957 CAST_FROM_FN_PTR(address,
3958 SharedRuntime::
3959 throw_AbstractMethodError));
3960
3961 StubRoutines::_throw_IncompatibleClassChangeError_entry =
3962 generate_throw_exception("IncompatibleClassChangeError throw_exception",
3963 CAST_FROM_FN_PTR(address,
3964 SharedRuntime::
3965 throw_IncompatibleClassChangeError));
3966
3967 StubRoutines::_throw_NullPointerException_at_call_entry =
3968 generate_throw_exception("NullPointerException at call throw_exception",
3969 CAST_FROM_FN_PTR(address,
3970 SharedRuntime::
3971 throw_NullPointerException_at_call));
3972
3973 // entry points that are platform specific
3974 StubRoutines::x86::_f2i_fixup = generate_f2i_fixup();
3975 StubRoutines::x86::_f2l_fixup = generate_f2l_fixup();
3976 StubRoutines::x86::_d2i_fixup = generate_d2i_fixup();
3977 StubRoutines::x86::_d2l_fixup = generate_d2l_fixup();
3978
3979 StubRoutines::x86::_float_sign_mask = generate_fp_mask("float_sign_mask", 0x7FFFFFFF7FFFFFFF);
3980 StubRoutines::x86::_float_sign_flip = generate_fp_mask("float_sign_flip", 0x8000000080000000);
3981 StubRoutines::x86::_double_sign_mask = generate_fp_mask("double_sign_mask", 0x7FFFFFFFFFFFFFFF);
3982 StubRoutines::x86::_double_sign_flip = generate_fp_mask("double_sign_flip", 0x8000000000000000);
3983
3984 // support for verify_oop (must happen after universe_init)
3985 StubRoutines::_verify_oop_subroutine_entry = generate_verify_oop();
3986
3987 // arraycopy stubs used by compilers
3988 generate_arraycopy_stubs();
3989
3990 generate_math_stubs();
3991
3992 // don't bother generating these AES intrinsic stubs unless global flag is set
3993 if (UseAESIntrinsics) {
3994 StubRoutines::x86::_key_shuffle_mask_addr = generate_key_shuffle_mask(); // needed by the others
3995
3996 StubRoutines::_aescrypt_encryptBlock = generate_aescrypt_encryptBlock();
3997 StubRoutines::_aescrypt_decryptBlock = generate_aescrypt_decryptBlock();
3998 StubRoutines::_cipherBlockChaining_encryptAESCrypt = generate_cipherBlockChaining_encryptAESCrypt();
3999 StubRoutines::_cipherBlockChaining_decryptAESCrypt = generate_cipherBlockChaining_decryptAESCrypt_Parallel();
4000 }
4001
4002 // Safefetch stubs.
4003 generate_safefetch("SafeFetch32", sizeof(int), &StubRoutines::_safefetch32_entry,
4004 &StubRoutines::_safefetch32_fault_pc,
4005 &StubRoutines::_safefetch32_continuation_pc);
4006 generate_safefetch("SafeFetchN", sizeof(intptr_t), &StubRoutines::_safefetchN_entry,
4007 &StubRoutines::_safefetchN_fault_pc,
4008 &StubRoutines::_safefetchN_continuation_pc);
4009 #ifdef COMPILER2
4010 if (UseMultiplyToLenIntrinsic) {
4011 StubRoutines::_multiplyToLen = generate_multiplyToLen();
4012 }
4013 #endif
4014 }
4015
4016 public:
4017 StubGenerator(CodeBuffer* code, bool all) : StubCodeGenerator(code) {
4018 if (all) {
4019 generate_all();
4020 } else {
4021 generate_initial();
4022 }
4023 }
4024 }; // end class declaration
4025
4026 void StubGenerator_generate(CodeBuffer* code, bool all) {
4027 StubGenerator g(code, all);
4028 }