1 /*
2 * Copyright (c) 2013, 2015, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 */
23
24 package org.graalvm.compiler.asm.aarch64.test;
25
26 import org.graalvm.compiler.asm.AbstractAddress;
27 import org.graalvm.compiler.asm.Label;
28 import org.graalvm.compiler.asm.aarch64.AArch64Address;
29 import org.graalvm.compiler.asm.aarch64.AArch64Assembler;
30
31 import jdk.vm.ci.code.Register;
32 import jdk.vm.ci.code.TargetDescription;
33
34 /**
35 * Cheat so that we can test protected functions of assembler.
36 */
37 class TestProtectedAssembler extends AArch64Assembler {
38
39 TestProtectedAssembler(TargetDescription target) {
40 super(target);
41 }
42
43 @Override
44 protected void cbnz(int size, Register reg, int imm21, int pos) {
45 super.cbnz(size, reg, imm21, pos);
46 }
47
48 @Override
49 protected void cbz(int size, Register reg, int imm21, int pos) {
50 super.cbz(size, reg, imm21, pos);
51 }
52
53 @Override
54 public void ands(int size, Register dst, Register src, long bimm) {
55 super.ands(size, dst, src, bimm);
56 }
57
58 @Override
59 protected void b(ConditionFlag condition, int imm21) {
60 super.b(condition, imm21);
61 }
62
63 @Override
64 protected void b(ConditionFlag condition, int imm21, int pos) {
65 super.b(condition, imm21, pos);
66 }
67
68 @Override
69 protected void cbnz(int size, Register reg, int imm21) {
70 super.cbnz(size, reg, imm21);
71 }
72
73 @Override
74 protected void cbz(int size, Register reg, int imm21) {
75 super.cbz(size, reg, imm21);
76 }
77
78 @Override
79 protected void b(int imm28) {
80 super.b(imm28);
81 }
82
83 @Override
84 protected void b(int imm28, int pos) {
85 super.b(imm28, pos);
86 }
87
88 @Override
89 public void bl(int imm28) {
90 super.bl(imm28);
91 }
92
93 @Override
94 public void blr(Register reg) {
95 super.blr(reg);
96 }
97
98 @Override
99 protected void br(Register reg) {
100 super.br(reg);
101 }
102
103 @Override
104 public void ret(Register reg) {
105 super.ret(reg);
106 }
107
108 @Override
109 public void ldr(int srcSize, Register rt, AArch64Address address) {
110 super.ldr(srcSize, rt, address);
111 }
112
113 @Override
114 public void ldrs(int targetSize, int srcSize, Register rt, AArch64Address address) {
115 super.ldrs(targetSize, srcSize, rt, address);
116 }
117
118 @Override
119 public void str(int destSize, Register rt, AArch64Address address) {
120 super.str(destSize, rt, address);
121 }
122
123 @Override
124 protected void ldxr(int size, Register rt, Register rn) {
125 super.ldxr(size, rt, rn);
126 }
127
128 @Override
129 protected void stxr(int size, Register rs, Register rt, Register rn) {
130 super.stxr(size, rs, rt, rn);
131 }
132
133 @Override
134 protected void ldar(int size, Register rt, Register rn) {
135 super.ldar(size, rt, rn);
136 }
137
138 @Override
139 protected void stlr(int size, Register rt, Register rn) {
140 super.stlr(size, rt, rn);
141 }
142
143 @Override
144 public void ldaxr(int size, Register rt, Register rn) {
145 super.ldaxr(size, rt, rn);
146 }
147
148 @Override
149 public void stlxr(int size, Register rs, Register rt, Register rn) {
150 super.stlxr(size, rs, rt, rn);
151 }
152
153 @Override
154 public void adr(Register dst, int imm21) {
155 super.adr(dst, imm21);
156 }
157
158 @Override
159 protected void add(int size, Register dst, Register src, int aimm) {
160 super.add(size, dst, src, aimm);
161 }
162
163 @Override
164 protected void adds(int size, Register dst, Register src, int aimm) {
165 super.adds(size, dst, src, aimm);
166 }
167
168 @Override
169 protected void sub(int size, Register dst, Register src, int aimm) {
170 super.sub(size, dst, src, aimm);
171 }
172
173 @Override
174 protected void subs(int size, Register dst, Register src, int aimm) {
175 super.subs(size, dst, src, aimm);
176 }
177
178 @Override
179 public void and(int size, Register dst, Register src, long bimm) {
180 super.and(size, dst, src, bimm);
181 }
182
183 @Override
184 public void eor(int size, Register dst, Register src, long bimm) {
185 super.eor(size, dst, src, bimm);
186 }
187
188 @Override
189 protected void orr(int size, Register dst, Register src, long bimm) {
190 super.orr(size, dst, src, bimm);
191 }
192
193 @Override
194 protected void movz(int size, Register dst, int uimm16, int shiftAmt) {
195 super.movz(size, dst, uimm16, shiftAmt);
196 }
197
198 @Override
199 protected void movn(int size, Register dst, int uimm16, int shiftAmt) {
200 super.movn(size, dst, uimm16, shiftAmt);
201 }
202
203 @Override
204 protected void movk(int size, Register dst, int uimm16, int pos) {
205 super.movk(size, dst, uimm16, pos);
206 }
207
208 @Override
209 protected void bfm(int size, Register dst, Register src, int r, int s) {
210 super.bfm(size, dst, src, r, s);
211 }
212
213 @Override
214 protected void ubfm(int size, Register dst, Register src, int r, int s) {
215 super.ubfm(size, dst, src, r, s);
216 }
217
218 @Override
219 protected void sbfm(int size, Register dst, Register src, int r, int s) {
220 super.sbfm(size, dst, src, r, s);
221 }
222
223 @Override
224 protected void extr(int size, Register dst, Register src1, Register src2, int lsb) {
225 super.extr(size, dst, src1, src2, lsb);
226 }
227
228 @Override
229 protected void adds(int size, Register dst, Register src1, Register src2, ShiftType shiftType, int imm) {
230 super.adds(size, dst, src1, src2, shiftType, imm);
231 }
232
233 @Override
234 protected void subs(int size, Register dst, Register src1, Register src2, ShiftType shiftType, int imm) {
235 super.subs(size, dst, src1, src2, shiftType, imm);
236 }
237
238 @Override
239 protected void add(int size, Register dst, Register src1, Register src2, ShiftType shiftType, int imm) {
240 super.add(size, dst, src1, src2, shiftType, imm);
241 }
242
243 @Override
244 protected void sub(int size, Register dst, Register src1, Register src2, ShiftType shiftType, int imm) {
245 super.sub(size, dst, src1, src2, shiftType, imm);
246 }
247
248 @Override
249 public void add(int size, Register dst, Register src1, Register src2, ExtendType extendType, int shiftAmt) {
250 super.add(size, dst, src1, src2, extendType, shiftAmt);
251 }
252
253 @Override
254 protected void adds(int size, Register dst, Register src1, Register src2, ExtendType extendType, int shiftAmt) {
255 super.adds(size, dst, src1, src2, extendType, shiftAmt);
256 }
257
258 @Override
259 protected void sub(int size, Register dst, Register src1, Register src2, ExtendType extendType, int shiftAmt) {
260 super.sub(size, dst, src1, src2, extendType, shiftAmt);
261 }
262
263 @Override
264 protected void subs(int size, Register dst, Register src1, Register src2, ExtendType extendType, int shiftAmt) {
265 super.subs(size, dst, src1, src2, extendType, shiftAmt);
266 }
267
268 @Override
269 protected void and(int size, Register dst, Register src1, Register src2, ShiftType shiftType, int shiftAmt) {
270 super.and(size, dst, src1, src2, shiftType, shiftAmt);
271 }
272
273 @Override
274 protected void ands(int size, Register dst, Register src1, Register src2, ShiftType shiftType, int shiftAmt) {
275 super.ands(size, dst, src1, src2, shiftType, shiftAmt);
276 }
277
278 @Override
279 protected void bic(int size, Register dst, Register src1, Register src2, ShiftType shiftType, int shiftAmt) {
280 super.bic(size, dst, src1, src2, shiftType, shiftAmt);
281 }
282
283 @Override
284 protected void bics(int size, Register dst, Register src1, Register src2, ShiftType shiftType, int shiftAmt) {
285 super.bics(size, dst, src1, src2, shiftType, shiftAmt);
286 }
287
288 @Override
289 protected void eon(int size, Register dst, Register src1, Register src2, ShiftType shiftType, int shiftAmt) {
290 super.eon(size, dst, src1, src2, shiftType, shiftAmt);
291 }
292
293 @Override
294 protected void eor(int size, Register dst, Register src1, Register src2, ShiftType shiftType, int shiftAmt) {
295 super.eor(size, dst, src1, src2, shiftType, shiftAmt);
296 }
297
298 @Override
299 protected void orr(int size, Register dst, Register src1, Register src2, ShiftType shiftType, int shiftAmt) {
300 super.orr(size, dst, src1, src2, shiftType, shiftAmt);
301 }
302
303 @Override
304 protected void orn(int size, Register dst, Register src1, Register src2, ShiftType shiftType, int shiftAmt) {
305 super.orn(size, dst, src1, src2, shiftType, shiftAmt);
306 }
307
308 @Override
309 protected void asr(int size, Register dst, Register src1, Register src2) {
310 super.asr(size, dst, src1, src2);
311 }
312
313 @Override
314 protected void lsl(int size, Register dst, Register src1, Register src2) {
315 super.lsl(size, dst, src1, src2);
316 }
317
318 @Override
319 protected void lsr(int size, Register dst, Register src1, Register src2) {
320 super.lsr(size, dst, src1, src2);
321 }
322
323 @Override
324 protected void ror(int size, Register dst, Register src1, Register src2) {
325 super.ror(size, dst, src1, src2);
326 }
327
328 @Override
329 protected void cls(int size, Register dst, Register src) {
330 super.cls(size, dst, src);
331 }
332
333 @Override
334 public void clz(int size, Register dst, Register src) {
335 super.clz(size, dst, src);
336 }
337
338 @Override
339 protected void rbit(int size, Register dst, Register src) {
340 super.rbit(size, dst, src);
341 }
342
343 @Override
344 public void rev(int size, Register dst, Register src) {
345 super.rev(size, dst, src);
346 }
347
348 @Override
349 protected void csel(int size, Register dst, Register src1, Register src2, ConditionFlag condition) {
350 super.csel(size, dst, src1, src2, condition);
351 }
352
353 @Override
354 protected void csneg(int size, Register dst, Register src1, Register src2, ConditionFlag condition) {
355 super.csneg(size, dst, src1, src2, condition);
356 }
357
358 @Override
359 protected void csinc(int size, Register dst, Register src1, Register src2, ConditionFlag condition) {
360 super.csinc(size, dst, src1, src2, condition);
361 }
362
363 @Override
364 protected void madd(int size, Register dst, Register src1, Register src2, Register src3) {
365 super.madd(size, dst, src1, src2, src3);
366 }
367
368 @Override
369 protected void msub(int size, Register dst, Register src1, Register src2, Register src3) {
370 super.msub(size, dst, src1, src2, src3);
371 }
372
373 @Override
374 public void sdiv(int size, Register dst, Register src1, Register src2) {
375 super.sdiv(size, dst, src1, src2);
376 }
377
378 @Override
379 public void udiv(int size, Register dst, Register src1, Register src2) {
380 super.udiv(size, dst, src1, src2);
381 }
382
383 @Override
384 public void fldr(int size, Register rt, AArch64Address address) {
385 super.fldr(size, rt, address);
386 }
387
388 @Override
389 public void fstr(int size, Register rt, AArch64Address address) {
390 super.fstr(size, rt, address);
391 }
392
393 @Override
394 protected void fmov(int size, Register dst, Register src) {
395 super.fmov(size, dst, src);
396 }
397
398 @Override
399 protected void fmovFpu2Cpu(int size, Register dst, Register src) {
400 super.fmovFpu2Cpu(size, dst, src);
401 }
402
403 @Override
404 protected void fmovCpu2Fpu(int size, Register dst, Register src) {
405 super.fmovCpu2Fpu(size, dst, src);
406 }
407
408 @Override
409 protected void fmov(int size, Register dst, double imm) {
410 super.fmov(size, dst, imm);
411 }
412
413 @Override
414 public void fcvt(int srcSize, Register dst, Register src) {
415 super.fcvt(srcSize, dst, src);
416 }
417
418 @Override
419 public void fcvtzs(int targetSize, int srcSize, Register dst, Register src) {
420 super.fcvtzs(targetSize, srcSize, dst, src);
421 }
422
423 @Override
424 public void scvtf(int targetSize, int srcSize, Register dst, Register src) {
425 super.scvtf(targetSize, srcSize, dst, src);
426 }
427
428 @Override
429 protected void frintz(int size, Register dst, Register src) {
430 super.frintz(size, dst, src);
431 }
432
433 @Override
434 public void fabs(int size, Register dst, Register src) {
435 super.fabs(size, dst, src);
436 }
437
438 @Override
439 public void fneg(int size, Register dst, Register src) {
440 super.fneg(size, dst, src);
441 }
442
443 @Override
444 public void fsqrt(int size, Register dst, Register src) {
445 super.fsqrt(size, dst, src);
446 }
447
448 @Override
449 public void fadd(int size, Register dst, Register src1, Register src2) {
450 super.fadd(size, dst, src1, src2);
451 }
452
453 @Override
454 public void fsub(int size, Register dst, Register src1, Register src2) {
455 super.fsub(size, dst, src1, src2);
456 }
457
458 @Override
459 public void fmul(int size, Register dst, Register src1, Register src2) {
460 super.fmul(size, dst, src1, src2);
461 }
462
463 @Override
464 public void fdiv(int size, Register dst, Register src1, Register src2) {
465 super.fdiv(size, dst, src1, src2);
466 }
467
468 @Override
469 protected void fmadd(int size, Register dst, Register src1, Register src2, Register src3) {
470 super.fmadd(size, dst, src1, src2, src3);
471 }
472
473 @Override
474 protected void fmsub(int size, Register dst, Register src1, Register src2, Register src3) {
475 super.fmsub(size, dst, src1, src2, src3);
476 }
477
478 @Override
479 public void fcmp(int size, Register src1, Register src2) {
480 super.fcmp(size, src1, src2);
481 }
482
483 @Override
484 public void fccmp(int size, Register src1, Register src2, int uimm4, ConditionFlag condition) {
485 super.fccmp(size, src1, src2, uimm4, condition);
486 }
487
488 @Override
489 public void fcmpZero(int size, Register src) {
490 super.fcmpZero(size, src);
491 }
492
493 @Override
494 protected void fcsel(int size, Register dst, Register src1, Register src2, ConditionFlag condition) {
495 super.fcsel(size, dst, src1, src2, condition);
496 }
497
498 @Override
499 protected void hlt(int uimm16) {
500 super.hlt(uimm16);
501 }
502
503 @Override
504 protected void brk(int uimm16) {
505 super.brk(uimm16);
506 }
507
508 @Override
509 protected void hint(SystemHint hint) {
510 super.hint(hint);
511 }
512
513 @Override
514 protected void clrex() {
515 super.clrex();
516 }
517
518 @Override
519 public void dmb(BarrierKind barrierKind) {
520 super.dmb(barrierKind);
521 }
522
523 @Override
524 public void align(int modulus) {
525 }
526
527 @Override
528 public void jmp(Label l) {
529 }
530
531 @Override
532 protected void patchJumpTarget(int branch, int jumpTarget) {
533
534 }
535
536 @Override
537 public AbstractAddress makeAddress(Register base, int displacement) {
538 throw new UnsupportedOperationException();
539 }
540
541 @Override
542 public AbstractAddress getPlaceholder(int instructionStartPosition) {
543 throw new UnsupportedOperationException();
544 }
545
546 @Override
547 public void ensureUniquePC() {
548 throw new UnsupportedOperationException();
549 }
550 }