1 /* 2 * Copyright (c) 2013, Oracle and/or its affiliates. All rights reserved. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 4 * 5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. 8 * 9 * This code is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * version 2 for more details (a copy is included in the LICENSE file that 13 * accompanied this code). 14 * 15 * You should have received a copy of the GNU General Public License version 16 * 2 along with this work; if not, write to the Free Software Foundation, 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 20 * or visit www.oracle.com if you need additional information or have any 21 * questions. 22 */ 23 package org.graalvm.compiler.hotspot.amd64; 24 25 import static org.graalvm.compiler.lir.LIRInstruction.OperandFlag.REG; 26 import static jdk.vm.ci.amd64.AMD64.rsp; 27 import static jdk.vm.ci.code.ValueUtil.asRegister; 28 29 import org.graalvm.compiler.asm.amd64.AMD64Address; 30 import org.graalvm.compiler.asm.amd64.AMD64MacroAssembler; 31 import org.graalvm.compiler.hotspot.GraalHotSpotVMConfig; 32 import org.graalvm.compiler.lir.LIRInstructionClass; 33 import org.graalvm.compiler.lir.Opcode; 34 import org.graalvm.compiler.lir.amd64.AMD64LIRInstruction; 35 import org.graalvm.compiler.lir.asm.CompilationResultBuilder; 36 37 import jdk.vm.ci.code.Register; 38 import jdk.vm.ci.meta.AllocatableValue; 39 40 /** 41 * Pushes an interpreter frame to the stack. 42 */ 43 @Opcode("PUSH_INTERPRETER_FRAME") 44 final class AMD64HotSpotPushInterpreterFrameOp extends AMD64LIRInstruction { 45 public static final LIRInstructionClass<AMD64HotSpotPushInterpreterFrameOp> TYPE = LIRInstructionClass.create(AMD64HotSpotPushInterpreterFrameOp.class); 46 47 @Alive(REG) AllocatableValue frameSize; 48 @Alive(REG) AllocatableValue framePc; 49 @Alive(REG) AllocatableValue senderSp; 50 @Alive(REG) AllocatableValue initialInfo; 51 private final GraalHotSpotVMConfig config; 52 53 AMD64HotSpotPushInterpreterFrameOp(AllocatableValue frameSize, AllocatableValue framePc, AllocatableValue senderSp, AllocatableValue initialInfo, GraalHotSpotVMConfig config) { 54 super(TYPE); 55 this.frameSize = frameSize; 56 this.framePc = framePc; 57 this.senderSp = senderSp; 58 this.initialInfo = initialInfo; 59 this.config = config; 60 } 61 62 @Override 63 public void emitCode(CompilationResultBuilder crb, AMD64MacroAssembler masm) { 64 final Register frameSizeRegister = asRegister(frameSize); 65 final Register framePcRegister = asRegister(framePc); 66 final Register senderSpRegister = asRegister(senderSp); 67 final Register initialInfoRegister = asRegister(initialInfo); 68 final int wordSize = 8; 69 70 // We'll push PC and BP by hand. 71 masm.subq(frameSizeRegister, 2 * wordSize); 72 73 // Push return address. 74 masm.push(framePcRegister); 75 76 // Prolog 77 masm.push(initialInfoRegister); 78 masm.movq(initialInfoRegister, rsp); 79 masm.subq(rsp, frameSizeRegister); 80 81 // This value is corrected by layout_activation_impl. 82 masm.movptr(new AMD64Address(initialInfoRegister, config.frameInterpreterFrameLastSpOffset * wordSize), 0); 83 84 // Make the frame walkable. 85 masm.movq(new AMD64Address(initialInfoRegister, config.frameInterpreterFrameSenderSpOffset * wordSize), senderSpRegister); 86 } 87 }