1 /*
   2  * Copyright (c) 2011, 2015, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  */
  23 package org.graalvm.compiler.lir.amd64;
  24 
  25 import static jdk.vm.ci.code.ValueUtil.asRegister;
  26 
  27 import org.graalvm.compiler.asm.Label;
  28 import org.graalvm.compiler.asm.amd64.AMD64Address;
  29 import org.graalvm.compiler.asm.amd64.AMD64Assembler.ConditionFlag;
  30 import org.graalvm.compiler.asm.amd64.AMD64MacroAssembler;
  31 import org.graalvm.compiler.core.common.LIRKind;
  32 import org.graalvm.compiler.lir.LIRInstructionClass;
  33 import org.graalvm.compiler.lir.Opcode;
  34 import org.graalvm.compiler.lir.asm.CompilationResultBuilder;
  35 
  36 import jdk.vm.ci.amd64.AMD64;
  37 import jdk.vm.ci.amd64.AMD64Kind;
  38 import jdk.vm.ci.meta.AllocatableValue;
  39 
  40 public enum AMD64Arithmetic {
  41     FREM,
  42     DREM;
  43 
  44     public static class FPDivRemOp extends AMD64LIRInstruction {
  45         public static final LIRInstructionClass<FPDivRemOp> TYPE = LIRInstructionClass.create(FPDivRemOp.class);
  46 
  47         @Opcode private final AMD64Arithmetic opcode;
  48         @Def protected AllocatableValue result;
  49         @Use protected AllocatableValue x;
  50         @Use protected AllocatableValue y;
  51         @Temp protected AllocatableValue raxTemp;
  52 
  53         public FPDivRemOp(AMD64Arithmetic opcode, AllocatableValue result, AllocatableValue x, AllocatableValue y) {
  54             super(TYPE);
  55             this.opcode = opcode;
  56             this.result = result;
  57             this.raxTemp = AMD64.rax.asValue(LIRKind.value(AMD64Kind.DWORD));
  58             this.x = x;
  59             this.y = y;
  60         }
  61 
  62         @Override
  63         public void emitCode(CompilationResultBuilder crb, AMD64MacroAssembler masm) {
  64             AMD64Address tmp = new AMD64Address(AMD64.rsp);
  65             masm.subq(AMD64.rsp, 8);
  66             if (opcode == FREM) {
  67                 masm.movflt(tmp, asRegister(y));
  68                 masm.flds(tmp);
  69                 masm.movflt(tmp, asRegister(x));
  70                 masm.flds(tmp);
  71             } else {
  72                 assert opcode == DREM;
  73                 masm.movdbl(tmp, asRegister(y));
  74                 masm.fldd(tmp);
  75                 masm.movdbl(tmp, asRegister(x));
  76                 masm.fldd(tmp);
  77             }
  78 
  79             Label label = new Label();
  80             masm.bind(label);
  81             masm.fprem();
  82             masm.fwait();
  83             masm.fnstswAX();
  84             masm.testl(AMD64.rax, 0x400);
  85             masm.jcc(ConditionFlag.NotZero, label);
  86             masm.fxch(1);
  87             masm.fpop();
  88 
  89             if (opcode == FREM) {
  90                 masm.fstps(tmp);
  91                 masm.movflt(asRegister(result), tmp);
  92             } else {
  93                 masm.fstpd(tmp);
  94                 masm.movdbl(asRegister(result), tmp);
  95             }
  96             masm.addq(AMD64.rsp, 8);
  97         }
  98 
  99         @Override
 100         public void verify() {
 101             super.verify();
 102             assert (opcode.name().startsWith("F") && result.getPlatformKind() == AMD64Kind.SINGLE && x.getPlatformKind() == AMD64Kind.SINGLE && y.getPlatformKind() == AMD64Kind.SINGLE) ||
 103                             (opcode.name().startsWith("D") && result.getPlatformKind() == AMD64Kind.DOUBLE && x.getPlatformKind() == AMD64Kind.DOUBLE && y.getPlatformKind() == AMD64Kind.DOUBLE);
 104         }
 105     }
 106 }