1 /*
2 * Copyright (c) 2000, 2017, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
2067 tty->print("Simplified: ");
2068 for( uint i = _simplified; i; i = lrgs(i)._next )
2069 tty->print("L%d ",i);
2070 tty->cr();
2071 }
2072
2073 static char *print_reg( OptoReg::Name reg, const PhaseChaitin *pc, char *buf ) {
2074 if ((int)reg < 0)
2075 sprintf(buf, "<OptoReg::%d>", (int)reg);
2076 else if (OptoReg::is_reg(reg))
2077 strcpy(buf, Matcher::regName[reg]);
2078 else
2079 sprintf(buf,"%s + #%d",OptoReg::regname(OptoReg::c_frame_pointer),
2080 pc->reg2offset(reg));
2081 return buf+strlen(buf);
2082 }
2083
2084 // Dump a register name into a buffer. Be intelligent if we get called
2085 // before allocation is complete.
2086 char *PhaseChaitin::dump_register( const Node *n, char *buf ) const {
2087 if( this == NULL ) { // Not got anything?
2088 sprintf(buf,"N%d",n->_idx); // Then use Node index
2089 } else if( _node_regs ) {
2090 // Post allocation, use direct mappings, no LRG info available
2091 print_reg( get_reg_first(n), this, buf );
2092 } else {
2093 uint lidx = _lrg_map.find_const(n); // Grab LRG number
2094 if( !_ifg ) {
2095 sprintf(buf,"L%d",lidx); // No register binding yet
2096 } else if( !lidx ) { // Special, not allocated value
2097 strcpy(buf,"Special");
2098 } else {
2099 if (lrgs(lidx)._is_vector) {
2100 if (lrgs(lidx).mask().is_bound_set(lrgs(lidx).num_regs()))
2101 print_reg( lrgs(lidx).reg(), this, buf ); // a bound machine register
2102 else
2103 sprintf(buf,"L%d",lidx); // No register binding yet
2104 } else if( (lrgs(lidx).num_regs() == 1)
2105 ? lrgs(lidx).mask().is_bound1()
2106 : lrgs(lidx).mask().is_bound_pair() ) {
2107 // Hah! We have a bound machine register
2108 print_reg( lrgs(lidx).reg(), this, buf );
2109 } else {
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1 /*
2 * Copyright (c) 2000, 2019, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
2067 tty->print("Simplified: ");
2068 for( uint i = _simplified; i; i = lrgs(i)._next )
2069 tty->print("L%d ",i);
2070 tty->cr();
2071 }
2072
2073 static char *print_reg( OptoReg::Name reg, const PhaseChaitin *pc, char *buf ) {
2074 if ((int)reg < 0)
2075 sprintf(buf, "<OptoReg::%d>", (int)reg);
2076 else if (OptoReg::is_reg(reg))
2077 strcpy(buf, Matcher::regName[reg]);
2078 else
2079 sprintf(buf,"%s + #%d",OptoReg::regname(OptoReg::c_frame_pointer),
2080 pc->reg2offset(reg));
2081 return buf+strlen(buf);
2082 }
2083
2084 // Dump a register name into a buffer. Be intelligent if we get called
2085 // before allocation is complete.
2086 char *PhaseChaitin::dump_register( const Node *n, char *buf ) const {
2087 if( _node_regs ) {
2088 // Post allocation, use direct mappings, no LRG info available
2089 print_reg( get_reg_first(n), this, buf );
2090 } else {
2091 uint lidx = _lrg_map.find_const(n); // Grab LRG number
2092 if( !_ifg ) {
2093 sprintf(buf,"L%d",lidx); // No register binding yet
2094 } else if( !lidx ) { // Special, not allocated value
2095 strcpy(buf,"Special");
2096 } else {
2097 if (lrgs(lidx)._is_vector) {
2098 if (lrgs(lidx).mask().is_bound_set(lrgs(lidx).num_regs()))
2099 print_reg( lrgs(lidx).reg(), this, buf ); // a bound machine register
2100 else
2101 sprintf(buf,"L%d",lidx); // No register binding yet
2102 } else if( (lrgs(lidx).num_regs() == 1)
2103 ? lrgs(lidx).mask().is_bound1()
2104 : lrgs(lidx).mask().is_bound_pair() ) {
2105 // Hah! We have a bound machine register
2106 print_reg( lrgs(lidx).reg(), this, buf );
2107 } else {
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