940 
 941   // Jump to the interpreter just as if interpreter was doing it.
 942 
 943 #ifdef CC_INTERP
 944   const Register tos = R17_tos;
 945 #else
 946   const Register tos = R15_esp;
 947   __ load_const_optimized(R25_templateTableBase, (address)Interpreter::dispatch_table((TosState)0), R11_scratch1);
 948 #endif
 949 
 950   // load TOS
 951   __ addi(tos, R1_SP, st_off);
 952 
 953   // Frame_manager expects initial_caller_sp (= SP without resize by c2i) in R21_tmp1.
 954   assert(sender_SP == R21_sender_SP, "passing initial caller's SP in wrong register");
 955   __ bctr();
 956 
 957   return c2i_entrypoint;
 958 }
 959 
 960 static void gen_i2c_adapter(MacroAssembler *masm,
 961                             int total_args_passed,
 962                             int comp_args_on_stack,
 963                             const BasicType *sig_bt,
 964                             const VMRegPair *regs) {
 965 
 966   // Load method's entry-point from method.
 967   __ ld(R12_scratch2, in_bytes(Method::from_compiled_offset()), R19_method);
 968   __ mtctr(R12_scratch2);
 969 
 970   // We will only enter here from an interpreted frame and never from after
 971   // passing thru a c2i. Azul allowed this but we do not. If we lose the
 972   // race and use a c2i we will remain interpreted for the race loser(s).
 973   // This removes all sorts of headaches on the x86 side and also eliminates
 974   // the possibility of having c2i -> i2c -> c2i -> ... endless transitions.
 975 
 976   // Note: r13 contains the senderSP on entry. We must preserve it since
 977   // we may do a i2c -> c2i transition if we lose a race where compiled
 978   // code goes non-entrant while we get args ready.
 979   // In addition we use r13 to locate all the interpreter args as
 980   // we must align the stack to 16 bytes on an i2c entry else we

 940 
 941   // Jump to the interpreter just as if interpreter was doing it.
 942 
 943 #ifdef CC_INTERP
 944   const Register tos = R17_tos;
 945 #else
 946   const Register tos = R15_esp;
 947   __ load_const_optimized(R25_templateTableBase, (address)Interpreter::dispatch_table((TosState)0), R11_scratch1);
 948 #endif
 949 
 950   // load TOS
 951   __ addi(tos, R1_SP, st_off);
 952 
 953   // Frame_manager expects initial_caller_sp (= SP without resize by c2i) in R21_tmp1.
 954   assert(sender_SP == R21_sender_SP, "passing initial caller's SP in wrong register");
 955   __ bctr();
 956 
 957   return c2i_entrypoint;
 958 }
 959 
 960 void SharedRuntime::gen_i2c_adapter(MacroAssembler *masm,
 961                                     int total_args_passed,
 962                                     int comp_args_on_stack,
 963                                     const BasicType *sig_bt,
 964                                     const VMRegPair *regs) {
 965 
 966   // Load method's entry-point from method.
 967   __ ld(R12_scratch2, in_bytes(Method::from_compiled_offset()), R19_method);
 968   __ mtctr(R12_scratch2);
 969 
 970   // We will only enter here from an interpreted frame and never from after
 971   // passing thru a c2i. Azul allowed this but we do not. If we lose the
 972   // race and use a c2i we will remain interpreted for the race loser(s).
 973   // This removes all sorts of headaches on the x86 side and also eliminates
 974   // the possibility of having c2i -> i2c -> c2i -> ... endless transitions.
 975 
 976   // Note: r13 contains the senderSP on entry. We must preserve it since
 977   // we may do a i2c -> c2i transition if we lose a race where compiled
 978   // code goes non-entrant while we get args ready.
 979   // In addition we use r13 to locate all the interpreter args as
 980   // we must align the stack to 16 bytes on an i2c entry else we