148 number_of_registers = 8,
149 max_slots_per_register = 16 // 512-bit
150 #else
151 number_of_registers = 32,
152 max_slots_per_register = 16 // 512-bit
153 #endif // AMD64
154 };
155
156 // construction
157 friend XMMRegister as_XMMRegister(int encoding);
158
159 inline VMReg as_VMReg();
160
161 // derived registers, offsets, and addresses
162 XMMRegister successor() const { return as_XMMRegister(encoding() + 1); }
163
164 // accessors
165 int encoding() const { assert(is_valid(), err_msg("invalid register (%d)", (int)(intptr_t)this )); return (intptr_t)this; }
166 bool is_valid() const { return 0 <= (intptr_t)this && (intptr_t)this < number_of_registers; }
167 const char* name() const;
168 };
169
170
171 // The XMM registers, for P3 and up chips
172 CONSTANT_REGISTER_DECLARATION(XMMRegister, xnoreg , (-1));
173 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm0 , ( 0));
174 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm1 , ( 1));
175 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm2 , ( 2));
176 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm3 , ( 3));
177 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm4 , ( 4));
178 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm5 , ( 5));
179 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm6 , ( 6));
180 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm7 , ( 7));
181 #ifdef AMD64
182 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm8, (8));
183 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm9, (9));
184 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm10, (10));
185 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm11, (11));
186 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm12, (12));
187 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm13, (13));
|
148 number_of_registers = 8,
149 max_slots_per_register = 16 // 512-bit
150 #else
151 number_of_registers = 32,
152 max_slots_per_register = 16 // 512-bit
153 #endif // AMD64
154 };
155
156 // construction
157 friend XMMRegister as_XMMRegister(int encoding);
158
159 inline VMReg as_VMReg();
160
161 // derived registers, offsets, and addresses
162 XMMRegister successor() const { return as_XMMRegister(encoding() + 1); }
163
164 // accessors
165 int encoding() const { assert(is_valid(), err_msg("invalid register (%d)", (int)(intptr_t)this )); return (intptr_t)this; }
166 bool is_valid() const { return 0 <= (intptr_t)this && (intptr_t)this < number_of_registers; }
167 const char* name() const;
168 const char* sub_word_name(int offset) const;
169 };
170
171
172 // The XMM registers, for P3 and up chips
173 CONSTANT_REGISTER_DECLARATION(XMMRegister, xnoreg , (-1));
174 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm0 , ( 0));
175 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm1 , ( 1));
176 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm2 , ( 2));
177 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm3 , ( 3));
178 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm4 , ( 4));
179 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm5 , ( 5));
180 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm6 , ( 6));
181 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm7 , ( 7));
182 #ifdef AMD64
183 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm8, (8));
184 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm9, (9));
185 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm10, (10));
186 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm11, (11));
187 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm12, (12));
188 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm13, (13));
|