1 /*
2 * Copyright (c) 2000, 2019, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #ifndef CPU_X86_GLOBALS_X86_HPP
26 #define CPU_X86_GLOBALS_X86_HPP
27
28 #include "utilities/globalDefinitions.hpp"
29 #include "utilities/macros.hpp"
30
31 // Sets the default values for platform dependent flags used by the runtime system.
32 // (see globals.hpp)
33
34 define_pd_global(bool, ImplicitNullChecks, true); // Generate code for implicit null checks
35 define_pd_global(bool, TrapBasedNullChecks, false); // Not needed on x86.
36 define_pd_global(bool, UncommonNullCast, true); // Uncommon-trap NULLs passed to check cast
37
38 define_pd_global(uintx, CodeCacheSegmentSize, 64 TIERED_ONLY(+64)); // Tiered compilation has large code-entry alignment.
39 // See 4827828 for this change. There is no globals_core_i486.hpp. I can't
40 // assign a different value for C2 without touching a number of files. Use
41 // #ifdef to minimize the change as it's late in Mantis. -- FIXME.
42 // c1 doesn't have this problem because the fix to 4858033 assures us
43 // the the vep is aligned at CodeEntryAlignment whereas c2 only aligns
44 // the uep and the vep doesn't get real alignment but just slops on by
45 // only assured that the entry instruction meets the 5 byte size requirement.
46 #if COMPILER2_OR_JVMCI
47 define_pd_global(intx, CodeEntryAlignment, 32);
48 #else
49 define_pd_global(intx, CodeEntryAlignment, 16);
50 #endif // COMPILER2_OR_JVMCI
51 define_pd_global(intx, OptoLoopAlignment, 16);
52 define_pd_global(intx, InlineFrequencyCount, 100);
53 define_pd_global(intx, InlineSmallCode, 1000);
54
55 #define DEFAULT_STACK_YELLOW_PAGES (NOT_WINDOWS(2) WINDOWS_ONLY(3))
56 #define DEFAULT_STACK_RED_PAGES (1)
57 #define DEFAULT_STACK_RESERVED_PAGES (NOT_WINDOWS(1) WINDOWS_ONLY(0))
58
59 #define MIN_STACK_YELLOW_PAGES DEFAULT_STACK_YELLOW_PAGES
60 #define MIN_STACK_RED_PAGES DEFAULT_STACK_RED_PAGES
61 #define MIN_STACK_RESERVED_PAGES (0)
62
63 #ifdef _LP64
64 // Java_java_net_SocketOutputStream_socketWrite0() uses a 64k buffer on the
65 // stack if compiled for unix and LP64. To pass stack overflow tests we need
66 // 20 shadow pages.
67 #define DEFAULT_STACK_SHADOW_PAGES (NOT_WIN64(20) WIN64_ONLY(7) DEBUG_ONLY(+2))
68 // For those clients that do not use write socket, we allow
69 // the min range value to be below that of the default
70 #define MIN_STACK_SHADOW_PAGES (NOT_WIN64(10) WIN64_ONLY(7) DEBUG_ONLY(+2))
71 #else
72 #define DEFAULT_STACK_SHADOW_PAGES (4 DEBUG_ONLY(+5))
73 #define MIN_STACK_SHADOW_PAGES DEFAULT_STACK_SHADOW_PAGES
74 #endif // _LP64
75
76 define_pd_global(intx, StackYellowPages, DEFAULT_STACK_YELLOW_PAGES);
77 define_pd_global(intx, StackRedPages, DEFAULT_STACK_RED_PAGES);
78 define_pd_global(intx, StackShadowPages, DEFAULT_STACK_SHADOW_PAGES);
79 define_pd_global(intx, StackReservedPages, DEFAULT_STACK_RESERVED_PAGES);
80
81 define_pd_global(bool, RewriteBytecodes, true);
82 define_pd_global(bool, RewriteFrequentPairs, true);
83
84 define_pd_global(uintx, TypeProfileLevel, 111);
85
86 define_pd_global(bool, CompactStrings, true);
87
88 define_pd_global(bool, PreserveFramePointer, false);
89
90 define_pd_global(intx, InitArrayShortSize, 8*BytesPerLong);
91
92 #if defined(_LP64) || defined(_WINDOWS)
93 define_pd_global(bool, ThreadLocalHandshakes, true);
94 #else
95 // get_thread() is slow on linux 32 bit, therefore off by default
96 define_pd_global(bool, ThreadLocalHandshakes, false);
97 #endif
98
99 #define ARCH_FLAGS(develop, \
100 product, \
101 diagnostic, \
102 experimental, \
103 notproduct, \
104 range, \
105 constraint, \
106 writeable) \
107 \
108 develop(bool, IEEEPrecision, true, \
109 "Enables IEEE precision (for INTEL only)") \
110 \
111 product(bool, UseStoreImmI16, true, \
112 "Use store immediate 16-bits value instruction on x86") \
113 \
114 product(intx, UseAVX, 3, \
115 "Highest supported AVX instructions set on x86/x64") \
116 range(0, 99) \
117 \
118 product(bool, UseCLMUL, false, \
119 "Control whether CLMUL instructions can be used on x86/x64") \
120 \
121 diagnostic(bool, UseIncDec, true, \
122 "Use INC, DEC instructions on x86") \
123 \
124 product(bool, UseNewLongLShift, false, \
125 "Use optimized bitwise shift left") \
126 \
127 product(bool, UseAddressNop, false, \
128 "Use '0F 1F [addr]' NOP instructions on x86 cpus") \
129 \
130 product(bool, UseXmmLoadAndClearUpper, true, \
131 "Load low part of XMM register and clear upper part") \
132 \
133 product(bool, UseXmmRegToRegMoveAll, false, \
134 "Copy all XMM register bits when moving value between registers") \
135 \
136 product(bool, UseXmmI2D, false, \
137 "Use SSE2 CVTDQ2PD instruction to convert Integer to Double") \
138 \
139 product(bool, UseXmmI2F, false, \
140 "Use SSE2 CVTDQ2PS instruction to convert Integer to Float") \
141 \
142 product(bool, UseUnalignedLoadStores, false, \
143 "Use SSE2 MOVDQU instruction for Arraycopy") \
144 \
145 product(bool, UseXMMForObjInit, false, \
146 "Use XMM/YMM MOVDQU instruction for Object Initialization") \
147 \
148 product(bool, UseFastStosb, false, \
149 "Use fast-string operation for zeroing: rep stosb") \
150 \
151 /* Use Restricted Transactional Memory for lock eliding */ \
152 product(bool, UseRTMLocking, false, \
153 "Enable RTM lock eliding for inflated locks in compiled code") \
154 \
155 experimental(bool, UseRTMForStackLocks, false, \
156 "Enable RTM lock eliding for stack locks in compiled code") \
157 \
158 product(bool, UseRTMDeopt, false, \
159 "Perform deopt and recompilation based on RTM abort ratio") \
160 \
161 product(int, RTMRetryCount, 5, \
162 "Number of RTM retries on lock abort or busy") \
163 range(0, max_jint) \
164 \
165 experimental(int, RTMSpinLoopCount, 100, \
166 "Spin count for lock to become free before RTM retry") \
167 range(0, max_jint) \
168 \
169 experimental(int, RTMAbortThreshold, 1000, \
170 "Calculate abort ratio after this number of aborts") \
171 range(0, max_jint) \
172 \
173 experimental(int, RTMLockingThreshold, 10000, \
174 "Lock count at which to do RTM lock eliding without " \
175 "abort ratio calculation") \
176 range(0, max_jint) \
177 \
178 experimental(int, RTMAbortRatio, 50, \
179 "Lock abort ratio at which to stop use RTM lock eliding") \
180 range(0, 100) /* natural range */ \
181 \
182 experimental(int, RTMTotalCountIncrRate, 64, \
183 "Increment total RTM attempted lock count once every n times") \
184 range(1, max_jint) \
185 constraint(RTMTotalCountIncrRateConstraintFunc,AfterErgo) \
186 \
187 experimental(intx, RTMLockingCalculationDelay, 0, \
188 "Number of milliseconds to wait before start calculating aborts " \
189 "for RTM locking") \
190 \
191 experimental(bool, UseRTMXendForLockBusy, true, \
192 "Use RTM Xend instead of Xabort when lock busy") \
193 \
194 /* assembler */ \
195 product(bool, UseCountLeadingZerosInstruction, false, \
196 "Use count leading zeros instruction") \
197 \
198 product(bool, UseCountTrailingZerosInstruction, false, \
199 "Use count trailing zeros instruction") \
200 \
201 product(bool, UseSSE42Intrinsics, false, \
202 "SSE4.2 versions of intrinsics") \
203 \
204 product(bool, UseBMI1Instructions, false, \
205 "Use BMI1 instructions") \
206 \
207 product(bool, UseBMI2Instructions, false, \
208 "Use BMI2 instructions") \
209 \
210 diagnostic(bool, UseLibmIntrinsic, true, \
211 "Use Libm Intrinsics") \
212 \
213 /* Minimum array size in bytes to use AVX512 intrinsics */ \
214 /* for copy, inflate and fill which don't bail out early based on any */ \
215 /* condition. When this value is set to zero compare operations like */ \
216 /* compare, vectorizedMismatch, compress can also use AVX512 intrinsics.*/\
217 diagnostic(int, AVX3Threshold, 4096, \
218 "Minimum array size in bytes to use AVX512 intrinsics" \
219 "for copy, inflate and fill. When this value is set as zero" \
220 "compare operations can also use AVX512 intrinsics.") \
221 range(0, max_jint)
222 #endif // CPU_X86_GLOBALS_X86_HPP