1 /* 2 * Copyright (c) 2016, Oracle and/or its affiliates. All rights reserved. 3 * Copyright (c) 2016 SAP SE. All rights reserved. 4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 5 * 6 * This code is free software; you can redistribute it and/or modify it 7 * under the terms of the GNU General Public License version 2 only, as 8 * published by the Free Software Foundation. 9 * 10 * This code is distributed in the hope that it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 13 * version 2 for more details (a copy is included in the LICENSE file that 14 * accompanied this code). 15 * 16 * You should have received a copy of the GNU General Public License version 17 * 2 along with this work; if not, write to the Free Software Foundation, 18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 19 * 20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 21 * or visit www.oracle.com if you need additional information or have any 22 * questions. 23 * 24 */ 25 26 #include "precompiled.hpp" 27 #include "asm/assembler.inline.hpp" 28 #include "compiler/disassembler.hpp" 29 #include "code/compiledIC.hpp" 30 #include "memory/resourceArea.hpp" 31 #include "runtime/java.hpp" 32 #include "runtime/stubCodeGenerator.hpp" 33 #include "vm_version_s390.hpp" 34 35 # include <sys/sysinfo.h> 36 37 bool VM_Version::_is_determine_features_test_running = false; 38 39 unsigned long VM_Version::_features[_features_buffer_len] = {0, 0, 0, 0}; 40 unsigned long VM_Version::_cipher_features[_features_buffer_len] = {0, 0, 0, 0}; 41 unsigned long VM_Version::_msgdigest_features[_features_buffer_len] = {0, 0, 0, 0}; 42 unsigned int VM_Version::_nfeatures = 0; 43 unsigned int VM_Version::_ncipher_features = 0; 44 unsigned int VM_Version::_nmsgdigest_features = 0; 45 unsigned int VM_Version::_Dcache_lineSize = 256; 46 unsigned int VM_Version::_Icache_lineSize = 256; 47 48 static const char* z_gen[] = {" ", "G1", "G2", "G3", "G4", "G5", "G6", "G7" }; 49 static const char* z_machine[] = {" ", "2064", "2084", "2094", "2097", "2817", " ", "2964" }; 50 static const char* z_name[] = {" ", "z900", "z990", "z9 EC", "z10 EC", "z196 EC", "ec12", "z13" }; 51 52 void VM_Version::initialize() { 53 determine_features(); // Get processor capabilities. 54 set_features_string(); // Set a descriptive feature indication. 55 56 if (Verbose) { 57 print_features(); 58 } 59 60 intx cache_line_size = Dcache_lineSize(0); 61 62 MaxVectorSize = 8; 63 64 if (has_PrefetchRaw()) { 65 if (FLAG_IS_DEFAULT(AllocatePrefetchStyle)) { // not preset 66 // 0 = no prefetch. 67 // 1 = Prefetch instructions for each allocation. 68 // 2 = Use TLAB watermark to gate allocation prefetch. 69 AllocatePrefetchStyle = 1; 70 } 71 72 if (AllocatePrefetchStyle > 0) { // Prefetching turned on at all? 73 // Distance to prefetch ahead of allocation pointer. 74 if (FLAG_IS_DEFAULT(AllocatePrefetchDistance) || (AllocatePrefetchDistance < 0)) { // not preset 75 AllocatePrefetchDistance = 0; 76 } 77 78 // Number of lines to prefetch ahead of allocation pointer. 79 if (FLAG_IS_DEFAULT(AllocatePrefetchLines) || (AllocatePrefetchLines <= 0)) { // not preset 80 AllocatePrefetchLines = 3; 81 } 82 83 // Step size in bytes of sequential prefetch instructions. 84 if (FLAG_IS_DEFAULT(AllocatePrefetchStepSize) || (AllocatePrefetchStepSize <= 0)) { // not preset 85 FLAG_SET_DEFAULT(AllocatePrefetchStepSize, cache_line_size); 86 } else if (AllocatePrefetchStepSize < cache_line_size) { 87 FLAG_SET_DEFAULT(AllocatePrefetchStepSize, cache_line_size); 88 } else { 89 FLAG_SET_DEFAULT(AllocatePrefetchStepSize, cache_line_size); 90 } 91 } else { 92 FLAG_SET_DEFAULT(AllocatePrefetchStyle, 0); 93 AllocatePrefetchDistance = 0; 94 AllocatePrefetchLines = 0; 95 // Can't be zero. Will SIGFPE during constraints checking. 96 FLAG_SET_DEFAULT(AllocatePrefetchStepSize, cache_line_size); 97 } 98 99 } else { 100 FLAG_SET_DEFAULT(AllocatePrefetchStyle, 0); 101 AllocatePrefetchDistance = 0; 102 AllocatePrefetchLines = 0; 103 // Can't be zero. Will SIGFPE during constraints checking. 104 FLAG_SET_DEFAULT(AllocatePrefetchStepSize, cache_line_size); 105 } 106 107 // TODO: 108 // On z/Architecture, cache line size is significantly large (256 bytes). Do we really need 109 // to keep contended members that far apart? Performance tests are required. 110 if (FLAG_IS_DEFAULT(ContendedPaddingWidth) && (cache_line_size > ContendedPaddingWidth)) { 111 ContendedPaddingWidth = cache_line_size; 112 } 113 114 // On z/Architecture, the CRC32/CRC32C intrinsics are implemented "by hand". 115 // TODO: Provide implementation based on the vector instructions available from z13. 116 // Note: The CHECKSUM instruction, which has been there since the very beginning 117 // (of z/Architecture), computes "some kind of" a checksum. 118 // It has nothing to do with the CRC32 algorithm. 119 if (FLAG_IS_DEFAULT(UseCRC32Intrinsics)) { 120 FLAG_SET_DEFAULT(UseCRC32Intrinsics, true); 121 } 122 if (FLAG_IS_DEFAULT(UseCRC32CIntrinsics)) { 123 FLAG_SET_DEFAULT(UseCRC32CIntrinsics, true); 124 } 125 126 // TODO: Provide implementation. 127 if (UseAdler32Intrinsics) { 128 warning("Adler32Intrinsics not available on this CPU."); 129 FLAG_SET_DEFAULT(UseAdler32Intrinsics, false); 130 } 131 132 // On z/Architecture, we take UseAES as the general switch to enable/disable the AES intrinsics. 133 // The specific, and yet to be defined, switches UseAESxxxIntrinsics will then be set 134 // depending on the actual machine capabilities. 135 // Explicitly setting them via CmdLine option takes precedence, of course. 136 // TODO: UseAESIntrinsics must be made keylength specific. 137 // As of March 2015 and Java8, only AES128 is supported by the Java Cryptographic Extensions. 138 // Therefore, UseAESIntrinsics is of minimal use at the moment. 139 if (FLAG_IS_DEFAULT(UseAES) && has_Crypto_AES()) { 140 FLAG_SET_DEFAULT(UseAES, true); 141 } 142 if (UseAES && !has_Crypto_AES()) { 143 warning("AES instructions are not available on this CPU"); 144 FLAG_SET_DEFAULT(UseAES, false); 145 } 146 if (UseAES) { 147 if (FLAG_IS_DEFAULT(UseAESIntrinsics)) { 148 FLAG_SET_DEFAULT(UseAESIntrinsics, true); 149 } 150 } 151 if (UseAESIntrinsics && !has_Crypto_AES()) { 152 warning("AES intrinsics are not available on this CPU"); 153 FLAG_SET_DEFAULT(UseAESIntrinsics, false); 154 } 155 156 // TODO: implement AES/CTR intrinsics 157 if (UseAESCTRIntrinsics) { 158 warning("AES/CTR intrinsics are not available on this CPU"); 159 FLAG_SET_DEFAULT(UseAESCTRIntrinsics, false); 160 } 161 162 // TODO: implement GHASH intrinsics 163 if (UseGHASHIntrinsics) { 164 warning("GHASH intrinsics are not available on this CPU"); 165 FLAG_SET_DEFAULT(UseGHASHIntrinsics, false); 166 } 167 168 if (FLAG_IS_DEFAULT(UseFMA)) { 169 FLAG_SET_DEFAULT(UseFMA, true); 170 } 171 172 // On z/Architecture, we take UseSHA as the general switch to enable/disable the SHA intrinsics. 173 // The specific switches UseSHAxxxIntrinsics will then be set depending on the actual 174 // machine capabilities. 175 // Explicitly setting them via CmdLine option takes precedence, of course. 176 if (FLAG_IS_DEFAULT(UseSHA) && has_Crypto_SHA()) { 177 FLAG_SET_DEFAULT(UseSHA, true); 178 } 179 if (UseSHA && !has_Crypto_SHA()) { 180 warning("SHA instructions are not available on this CPU"); 181 FLAG_SET_DEFAULT(UseSHA, false); 182 } 183 if (UseSHA && has_Crypto_SHA1()) { 184 if (FLAG_IS_DEFAULT(UseSHA1Intrinsics)) { 185 FLAG_SET_DEFAULT(UseSHA1Intrinsics, true); 186 } 187 } else if (UseSHA1Intrinsics) { 188 warning("Intrinsics for SHA-1 crypto hash functions not available on this CPU."); 189 FLAG_SET_DEFAULT(UseSHA1Intrinsics, false); 190 } 191 if (UseSHA && has_Crypto_SHA256()) { 192 if (FLAG_IS_DEFAULT(UseSHA256Intrinsics)) { 193 FLAG_SET_DEFAULT(UseSHA256Intrinsics, true); 194 } 195 } else if (UseSHA256Intrinsics) { 196 warning("Intrinsics for SHA-224 and SHA-256 crypto hash functions not available on this CPU."); 197 FLAG_SET_DEFAULT(UseSHA256Intrinsics, false); 198 } 199 if (UseSHA && has_Crypto_SHA512()) { 200 if (FLAG_IS_DEFAULT(UseSHA512Intrinsics)) { 201 FLAG_SET_DEFAULT(UseSHA512Intrinsics, true); 202 } 203 } else if (UseSHA512Intrinsics) { 204 warning("Intrinsics for SHA-384 and SHA-512 crypto hash functions not available on this CPU."); 205 FLAG_SET_DEFAULT(UseSHA512Intrinsics, false); 206 } 207 208 if (FLAG_IS_DEFAULT(UseMultiplyToLenIntrinsic)) { 209 FLAG_SET_DEFAULT(UseMultiplyToLenIntrinsic, true); 210 } 211 if (FLAG_IS_DEFAULT(UseMontgomeryMultiplyIntrinsic)) { 212 FLAG_SET_DEFAULT(UseMontgomeryMultiplyIntrinsic, true); 213 } 214 if (FLAG_IS_DEFAULT(UseMontgomerySquareIntrinsic)) { 215 FLAG_SET_DEFAULT(UseMontgomerySquareIntrinsic, true); 216 } 217 if (FLAG_IS_DEFAULT(UsePopCountInstruction)) { 218 FLAG_SET_DEFAULT(UsePopCountInstruction, true); 219 } 220 221 // z/Architecture supports 8-byte compare-exchange operations 222 // (see Atomic::cmpxchg and StubGenerator::generate_atomic_cmpxchg_ptr) 223 // and 'atomic long memory ops' (see Unsafe_GetLongVolatile). 224 _supports_cx8 = true; 225 226 _supports_atomic_getadd4 = VM_Version::has_LoadAndALUAtomicV1(); 227 _supports_atomic_getadd8 = VM_Version::has_LoadAndALUAtomicV1(); 228 229 // z/Architecture supports unaligned memory accesses. 230 // Performance penalty is negligible. An additional tick or so 231 // is lost if the accessed data spans a cache line boundary. 232 // Unaligned accesses are not atomic, of course. 233 if (FLAG_IS_DEFAULT(UseUnalignedAccesses)) { 234 FLAG_SET_DEFAULT(UseUnalignedAccesses, true); 235 } 236 } 237 238 239 void VM_Version::set_features_string() { 240 241 unsigned int ambiguity = 0; 242 if (is_z13()) { 243 _features_string = "System z G7-z13 (LDISP_fast, ExtImm, PCrel Load/Store, CmpB, Cond Load/Store, Interlocked Update, TxM, VectorInstr)"; 244 ambiguity++; 245 } 246 if (is_ec12()) { 247 _features_string = "System z G6-EC12 (LDISP_fast, ExtImm, PCrel Load/Store, CmpB, Cond Load/Store, Interlocked Update, TxM)"; 248 ambiguity++; 249 } 250 if (is_z196()) { 251 _features_string = "System z G5-z196 (LDISP_fast, ExtImm, PCrel Load/Store, CmpB, Cond Load/Store, Interlocked Update)"; 252 ambiguity++; 253 } 254 if (is_z10()) { 255 _features_string = "System z G4-z10 (LDISP_fast, ExtImm, PCrel Load/Store, CmpB)"; 256 ambiguity++; 257 } 258 if (is_z9()) { 259 _features_string = "System z G3-z9 (LDISP_fast, ExtImm), out-of-support as of 2016-04-01"; 260 ambiguity++; 261 } 262 if (is_z990()) { 263 _features_string = "System z G2-z990 (LDISP_fast), out-of-support as of 2014-07-01"; 264 ambiguity++; 265 } 266 if (is_z900()) { 267 _features_string = "System z G1-z900 (LDISP), out-of-support as of 2014-07-01"; 268 ambiguity++; 269 } 270 271 if (ambiguity == 0) { 272 _features_string = "z/Architecture (unknown generation)"; 273 } else if (ambiguity > 1) { 274 tty->print_cr("*** WARNING *** Ambiguous z/Architecture detection, ambiguity = %d", ambiguity); 275 tty->print_cr(" oldest detected generation is %s", _features_string); 276 _features_string = "z/Architecture (ambiguous detection)"; 277 } 278 279 if (has_Crypto_AES()) { 280 char buf[256]; 281 assert(strlen(_features_string) + 4 + 3*4 + 1 < sizeof(buf), "increase buffer size"); 282 jio_snprintf(buf, sizeof(buf), "%s aes%s%s%s", // String 'aes' must be surrounded by spaces so that jtreg tests recognize it. 283 _features_string, 284 has_Crypto_AES128() ? " 128" : "", 285 has_Crypto_AES192() ? " 192" : "", 286 has_Crypto_AES256() ? " 256" : ""); 287 _features_string = os::strdup(buf); 288 } 289 290 if (has_Crypto_SHA()) { 291 char buf[256]; 292 assert(strlen(_features_string) + 4 + 2 + 2*4 + 6 + 1 < sizeof(buf), "increase buffer size"); 293 // String 'sha1' etc must be surrounded by spaces so that jtreg tests recognize it. 294 jio_snprintf(buf, sizeof(buf), "%s %s%s%s%s", 295 _features_string, 296 has_Crypto_SHA1() ? " sha1" : "", 297 has_Crypto_SHA256() ? " sha256" : "", 298 has_Crypto_SHA512() ? " sha512" : "", 299 has_Crypto_GHASH() ? " ghash" : ""); 300 if (has_Crypto_AES()) { os::free((void *)_features_string); } 301 _features_string = os::strdup(buf); 302 } 303 } 304 305 // featureBuffer - bit array indicating availability of various features 306 // featureNum - bit index of feature to be tested 307 // Featurenum < 0 requests test for any nonzero bit in featureBuffer. 308 // bufLen - length of featureBuffer in bits 309 bool VM_Version::test_feature_bit(unsigned long* featureBuffer, int featureNum, unsigned int bufLen) { 310 assert(bufLen > 0, "buffer len must be positive"); 311 assert((bufLen & 0x0007) == 0, "unaligned buffer len"); 312 assert(((intptr_t)featureBuffer&0x0007) == 0, "unaligned feature buffer"); 313 if (featureNum < 0) { 314 // Any bit set at all? 315 bool anyBit = false; 316 for (size_t i = 0; i < bufLen/(8*sizeof(long)); i++) { 317 anyBit = anyBit || (featureBuffer[i] != 0); 318 } 319 return anyBit; 320 } else { 321 assert((unsigned int)featureNum < bufLen, "feature index out of range"); 322 unsigned char* byteBuffer = (unsigned char*)featureBuffer; 323 int byteIndex = featureNum/(8*sizeof(char)); 324 int bitIndex = featureNum%(8*sizeof(char)); 325 // Indexed bit set? 326 return (byteBuffer[byteIndex] & (1U<<(7-bitIndex))) != 0; 327 } 328 } 329 330 void VM_Version::print_features_internal(const char* text, bool print_anyway) { 331 tty->print_cr("%s %s", text, features_string()); 332 tty->print("%s", text); 333 for (unsigned int i = 0; i < _nfeatures; i++) { 334 tty->print(" 0x%16.16lx", _features[i]); 335 } 336 tty->cr(); 337 338 if (Verbose || print_anyway) { 339 // z900 340 if (has_long_displacement() ) tty->print_cr("available: %s", "LongDispFacility"); 341 // z990 342 if (has_long_displacement_fast() ) tty->print_cr("available: %s", "LongDispFacilityHighPerf"); 343 if (has_ETF2() && has_ETF3() ) tty->print_cr("available: %s", "ETF2 and ETF3"); 344 if (has_Crypto() ) tty->print_cr("available: %s", "CryptoFacility"); 345 // z9 346 if (has_extended_immediate() ) tty->print_cr("available: %s", "ExtImmedFacility"); 347 if (has_StoreFacilityListExtended()) tty->print_cr("available: %s", "StoreFacilityListExtended"); 348 if (has_StoreClockFast() ) tty->print_cr("available: %s", "StoreClockFast"); 349 if (has_ETF2Enhancements() ) tty->print_cr("available: %s", "ETF2 Enhancements"); 350 if (has_ETF3Enhancements() ) tty->print_cr("available: %s", "ETF3 Enhancements"); 351 if (has_HFPUnnormalized() ) tty->print_cr("available: %s", "HFPUnnormalizedFacility"); 352 if (has_HFPMultiplyAndAdd() ) tty->print_cr("available: %s", "HFPMultiplyAndAddFacility"); 353 // z10 354 if (has_ParsingEnhancements() ) tty->print_cr("available: %s", "Parsing Enhancements"); 355 if (has_ExtractCPUtime() ) tty->print_cr("available: %s", "ExtractCPUTime"); 356 if (has_CompareSwapStore() ) tty->print_cr("available: %s", "CompareSwapStore"); 357 if (has_GnrlInstrExtensions() ) tty->print_cr("available: %s", "General Instruction Extensions"); 358 if (has_CompareBranch() ) tty->print_cr(" available: %s", "Compare and Branch"); 359 if (has_CompareTrap() ) tty->print_cr(" available: %s", "Compare and Trap"); 360 if (has_RelativeLoadStore() ) tty->print_cr(" available: %s", "Relative Load/Store"); 361 if (has_MultiplySingleImm32() ) tty->print_cr(" available: %s", "MultiplySingleImm32"); 362 if (has_Prefetch() ) tty->print_cr(" available: %s", "Prefetch"); 363 if (has_MoveImmToMem() ) tty->print_cr(" available: %s", "Direct Moves Immediate to Memory"); 364 if (has_MemWithImmALUOps() ) tty->print_cr(" available: %s", "Direct ALU Ops Memory .op. Immediate"); 365 if (has_ExtractCPUAttributes() ) tty->print_cr(" available: %s", "Extract CPU Atributes"); 366 if (has_ExecuteExtensions() ) tty->print_cr("available: %s", "ExecuteExtensions"); 367 if (has_FPSupportEnhancements() ) tty->print_cr("available: %s", "FPSupportEnhancements"); 368 if (has_DecimalFloatingPoint() ) tty->print_cr("available: %s", "DecimalFloatingPoint"); 369 // z196 370 if (has_DistinctOpnds() ) tty->print_cr("available: %s", "Distinct Operands"); 371 if (has_InterlockedAccessV1() ) tty->print_cr(" available: %s", "InterlockedAccess V1 (fast)"); 372 if (has_PopCount() ) tty->print_cr(" available: %s", "PopCount"); 373 if (has_LoadStoreConditional() ) tty->print_cr(" available: %s", "LoadStoreConditional"); 374 if (has_HighWordInstr() ) tty->print_cr(" available: %s", "HighWord Instructions"); 375 if (has_FastSync() ) tty->print_cr(" available: %s", "FastSync (bcr 14,0)"); 376 if (has_AtomicMemWithImmALUOps() ) tty->print_cr("available: %s", "Atomic Direct ALU Ops Memory .op. Immediate"); 377 if (has_FPExtensions() ) tty->print_cr("available: %s", "Floatingpoint Extensions"); 378 if (has_CryptoExt3() ) tty->print_cr("available: %s", "Crypto Extensions 3"); 379 if (has_CryptoExt4() ) tty->print_cr("available: %s", "Crypto Extensions 4"); 380 // EC12 381 if (has_MiscInstrExt() ) tty->print_cr("available: %s", "Miscelaneous Instruction Extensions"); 382 if (has_ExecutionHint() ) tty->print_cr(" available: %s", "Execution Hints (branch prediction)"); 383 if (has_ProcessorAssist() ) tty->print_cr(" available: %s", "Processor Assists"); 384 if (has_LoadAndTrap() ) tty->print_cr(" available: %s", "Load and Trap"); 385 if (has_TxMem() ) tty->print_cr("available: %s", "Transactional Memory"); 386 if (has_InterlockedAccessV2() ) tty->print_cr(" available: %s", "InterlockedAccess V2 (fast)"); 387 if (has_DFPZonedConversion() ) tty->print_cr(" available: %s", "DFP Zoned Conversions"); 388 // z13 389 if (has_LoadStoreConditional2() ) tty->print_cr("available: %s", "Load/Store Conditional 2"); 390 if (has_CryptoExt5() ) tty->print_cr("available: %s", "Crypto Extensions 5"); 391 if (has_DFPPackedConversion() ) tty->print_cr("available: %s", "DFP Packed Conversions"); 392 if (has_VectorFacility() ) tty->print_cr("available: %s", "Vector Facility"); 393 // test switches 394 if (has_TestFeature1Impl() ) tty->print_cr("available: %s", "TestFeature1Impl"); 395 if (has_TestFeature2Impl() ) tty->print_cr("available: %s", "TestFeature2Impl"); 396 if (has_TestFeature4Impl() ) tty->print_cr("available: %s", "TestFeature4Impl"); 397 if (has_TestFeature8Impl() ) tty->print_cr("available: %s", "TestFeature8Impl"); 398 399 if (has_Crypto()) { 400 tty->cr(); 401 tty->print_cr("detailed availability of %s capabilities:", "CryptoFacility"); 402 if (test_feature_bit(&_cipher_features[0], -1, 2*Cipher::_featureBits)) { 403 tty->cr(); 404 tty->print_cr(" available: %s", "Message Cipher Functions"); 405 } 406 if (test_feature_bit(&_cipher_features[0], -1, (int)Cipher::_featureBits)) { 407 tty->print_cr(" available Crypto Features of KM (Cipher Message):"); 408 for (unsigned int i = 0; i < Cipher::_featureBits; i++) { 409 if (test_feature_bit(&_cipher_features[0], i, (int)Cipher::_featureBits)) { 410 switch (i) { 411 case Cipher::_Query: tty->print_cr(" available: KM Query"); break; 412 case Cipher::_DEA: tty->print_cr(" available: KM DEA"); break; 413 case Cipher::_TDEA128: tty->print_cr(" available: KM TDEA-128"); break; 414 case Cipher::_TDEA192: tty->print_cr(" available: KM TDEA-192"); break; 415 case Cipher::_EncryptedDEA: tty->print_cr(" available: KM Encrypted DEA"); break; 416 case Cipher::_EncryptedDEA128: tty->print_cr(" available: KM Encrypted DEA-128"); break; 417 case Cipher::_EncryptedDEA192: tty->print_cr(" available: KM Encrypted DEA-192"); break; 418 case Cipher::_AES128: tty->print_cr(" available: KM AES-128"); break; 419 case Cipher::_AES192: tty->print_cr(" available: KM AES-192"); break; 420 case Cipher::_AES256: tty->print_cr(" available: KM AES-256"); break; 421 case Cipher::_EnccryptedAES128: tty->print_cr(" available: KM Encrypted-AES-128"); break; 422 case Cipher::_EnccryptedAES192: tty->print_cr(" available: KM Encrypted-AES-192"); break; 423 case Cipher::_EnccryptedAES256: tty->print_cr(" available: KM Encrypted-AES-256"); break; 424 case Cipher::_XTSAES128: tty->print_cr(" available: KM XTS-AES-128"); break; 425 case Cipher::_XTSAES256: tty->print_cr(" available: KM XTS-AES-256"); break; 426 case Cipher::_EncryptedXTSAES128: tty->print_cr(" available: KM XTS-Encrypted-AES-128"); break; 427 case Cipher::_EncryptedXTSAES256: tty->print_cr(" available: KM XTS-Encrypted-AES-256"); break; 428 default: tty->print_cr(" available: unknown KM code %d", i); break; 429 } 430 } 431 } 432 } 433 if (test_feature_bit(&_cipher_features[2], -1, (int)Cipher::_featureBits)) { 434 tty->print_cr(" available Crypto Features of KMC (Cipher Message with Chaining):"); 435 for (unsigned int i = 0; i < Cipher::_featureBits; i++) { 436 if (test_feature_bit(&_cipher_features[2], i, (int)Cipher::_featureBits)) { 437 switch (i) { 438 case Cipher::_Query: tty->print_cr(" available: KMC Query"); break; 439 case Cipher::_DEA: tty->print_cr(" available: KMC DEA"); break; 440 case Cipher::_TDEA128: tty->print_cr(" available: KMC TDEA-128"); break; 441 case Cipher::_TDEA192: tty->print_cr(" available: KMC TDEA-192"); break; 442 case Cipher::_EncryptedDEA: tty->print_cr(" available: KMC Encrypted DEA"); break; 443 case Cipher::_EncryptedDEA128: tty->print_cr(" available: KMC Encrypted DEA-128"); break; 444 case Cipher::_EncryptedDEA192: tty->print_cr(" available: KMC Encrypted DEA-192"); break; 445 case Cipher::_AES128: tty->print_cr(" available: KMC AES-128"); break; 446 case Cipher::_AES192: tty->print_cr(" available: KMC AES-192"); break; 447 case Cipher::_AES256: tty->print_cr(" available: KMC AES-256"); break; 448 case Cipher::_EnccryptedAES128: tty->print_cr(" available: KMC Encrypted-AES-128"); break; 449 case Cipher::_EnccryptedAES192: tty->print_cr(" available: KMC Encrypted-AES-192"); break; 450 case Cipher::_EnccryptedAES256: tty->print_cr(" available: KMC Encrypted-AES-256"); break; 451 case Cipher::_PRNG: tty->print_cr(" available: KMC PRNG"); break; 452 default: tty->print_cr(" available: unknown KMC code %d", i); break; 453 } 454 } 455 } 456 } 457 458 if (test_feature_bit(&_msgdigest_features[0], -1, 2*MsgDigest::_featureBits)) { 459 tty->cr(); 460 tty->print_cr(" available: %s", "Message Digest Functions for SHA"); 461 } 462 if (test_feature_bit(&_msgdigest_features[0], -1, (int)MsgDigest::_featureBits)) { 463 tty->print_cr(" available Features of KIMD (Msg Digest):"); 464 for (unsigned int i = 0; i < MsgDigest::_featureBits; i++) { 465 if (test_feature_bit(&_msgdigest_features[0], i, (int)MsgDigest::_featureBits)) { 466 switch (i) { 467 case MsgDigest::_Query: tty->print_cr(" available: KIMD Query"); break; 468 case MsgDigest::_SHA1: tty->print_cr(" available: KIMD SHA-1"); break; 469 case MsgDigest::_SHA256: tty->print_cr(" available: KIMD SHA-256"); break; 470 case MsgDigest::_SHA512: tty->print_cr(" available: KIMD SHA-512"); break; 471 case MsgDigest::_GHASH: tty->print_cr(" available: KIMD GHASH"); break; 472 default: tty->print_cr(" available: unknown code %d", i); break; 473 } 474 } 475 } 476 } 477 if (test_feature_bit(&_msgdigest_features[2], -1, (int)MsgDigest::_featureBits)) { 478 tty->print_cr(" available Features of KLMD (Msg Digest):"); 479 for (unsigned int i = 0; i < MsgDigest::_featureBits; i++) { 480 if (test_feature_bit(&_msgdigest_features[2], i, (int)MsgDigest::_featureBits)) { 481 switch (i) { 482 case MsgDigest::_Query: tty->print_cr(" available: KLMD Query"); break; 483 case MsgDigest::_SHA1: tty->print_cr(" available: KLMD SHA-1"); break; 484 case MsgDigest::_SHA256: tty->print_cr(" available: KLMD SHA-256"); break; 485 case MsgDigest::_SHA512: tty->print_cr(" available: KLMD SHA-512"); break; 486 default: tty->print_cr(" available: unknown code %d", i); break; 487 } 488 } 489 } 490 } 491 } 492 if (ContendedPaddingWidth > 0) { 493 tty->cr(); 494 tty->print_cr("ContendedPaddingWidth " INTX_FORMAT, ContendedPaddingWidth); 495 } 496 } 497 } 498 499 void VM_Version::print_features() { 500 print_features_internal("Version:"); 501 } 502 503 void VM_Version::reset_features(bool reset) { 504 if (reset) { 505 for (unsigned int i = 0; i < _features_buffer_len; i++) { 506 VM_Version::_features[i] = 0; 507 } 508 } 509 } 510 511 void VM_Version::set_features_z900(bool reset) { 512 reset_features(reset); 513 514 set_has_long_displacement(); 515 set_has_ETF2(); 516 } 517 518 void VM_Version::set_features_z990(bool reset) { 519 reset_features(reset); 520 521 set_features_z900(false); 522 set_has_ETF3(); 523 set_has_long_displacement_fast(); 524 set_has_HFPMultiplyAndAdd(); 525 } 526 527 void VM_Version::set_features_z9(bool reset) { 528 reset_features(reset); 529 530 set_features_z990(false); 531 set_has_StoreFacilityListExtended(); 532 // set_has_Crypto(); // Do not set, crypto features must be retrieved separately. 533 set_has_ETF2Enhancements(); 534 set_has_ETF3Enhancements(); 535 set_has_extended_immediate(); 536 set_has_StoreClockFast(); 537 set_has_HFPUnnormalized(); 538 } 539 540 void VM_Version::set_features_z10(bool reset) { 541 reset_features(reset); 542 543 set_features_z9(false); 544 set_has_CompareSwapStore(); 545 set_has_RelativeLoadStore(); 546 set_has_CompareBranch(); 547 set_has_CompareTrap(); 548 set_has_MultiplySingleImm32(); 549 set_has_Prefetch(); 550 set_has_MoveImmToMem(); 551 set_has_MemWithImmALUOps(); 552 set_has_ExecuteExtensions(); 553 set_has_FPSupportEnhancements(); 554 set_has_DecimalFloatingPoint(); 555 set_has_ExtractCPUtime(); 556 set_has_CryptoExt3(); 557 } 558 559 void VM_Version::set_features_z196(bool reset) { 560 reset_features(reset); 561 562 set_features_z10(false); 563 set_has_InterlockedAccessV1(); 564 set_has_PopCount(); 565 set_has_LoadStoreConditional(); 566 set_has_HighWordInstr(); 567 set_has_FastSync(); 568 set_has_FPExtensions(); 569 set_has_DistinctOpnds(); 570 set_has_CryptoExt4(); 571 } 572 573 void VM_Version::set_features_ec12(bool reset) { 574 reset_features(reset); 575 576 set_features_z196(false); 577 set_has_MiscInstrExt(); 578 set_has_InterlockedAccessV2(); 579 set_has_LoadAndALUAtomicV2(); 580 set_has_TxMem(); 581 } 582 583 void VM_Version::set_features_z13(bool reset) { 584 reset_features(reset); 585 586 set_features_ec12(false); 587 set_has_LoadStoreConditional2(); 588 set_has_CryptoExt5(); 589 set_has_VectorFacility(); 590 } 591 592 void VM_Version::set_features_from(const char* march) { 593 bool err = false; 594 bool prt = false; 595 596 if ((march != NULL) && (march[0] != '\0')) { 597 const int buf_len = 16; 598 const int hdr_len = 5; 599 char buf[buf_len]; 600 if (strlen(march) >= hdr_len) { 601 memcpy(buf, march, hdr_len); 602 buf[hdr_len] = '\00'; 603 } else { 604 buf[0] = '\00'; 605 } 606 607 if (!strcmp(march, "z900")) { 608 set_features_z900(); 609 } else if (!strcmp(march, "z990")) { 610 set_features_z990(); 611 } else if (!strcmp(march, "z9")) { 612 set_features_z9(); 613 } else if (!strcmp(march, "z10")) { 614 set_features_z10(); 615 } else if (!strcmp(march, "z196")) { 616 set_features_z196(); 617 } else if (!strcmp(march, "ec12")) { 618 set_features_ec12(); 619 } else if (!strcmp(march, "z13")) { 620 set_features_z13(); 621 } else if (!strcmp(buf, "ztest")) { 622 assert(!has_TestFeaturesImpl(), "possible facility list flag conflict"); 623 if (strlen(march) > hdr_len) { 624 int itest = 0; 625 if ((strlen(march)-hdr_len) >= buf_len) err = true; 626 if (!err) { 627 memcpy(buf, &march[hdr_len], strlen(march)-hdr_len); 628 buf[strlen(march)-hdr_len] = '\00'; 629 for (size_t i = 0; !err && (i < strlen(buf)); i++) { 630 itest = itest*10 + buf[i]-'0'; 631 err = err || ((buf[i]-'0') < 0) || ((buf[i]-'0') > 9) || (itest > 15); 632 } 633 } 634 if (!err) { 635 prt = true; 636 if (itest & 0x01) { set_has_TestFeature1Impl(); } 637 if (itest & 0x02) { set_has_TestFeature2Impl(); } 638 if (itest & 0x04) { set_has_TestFeature4Impl(); } 639 if (itest & 0x08) { set_has_TestFeature8Impl(); } 640 } 641 } else { 642 prt = true; 643 set_has_TestFeature1Impl(); 644 set_has_TestFeature2Impl(); 645 set_has_TestFeature4Impl(); 646 set_has_TestFeature8Impl(); 647 } 648 } else { 649 err = true; 650 } 651 if (!err) { 652 set_features_string(); 653 if (prt || PrintAssembly) { 654 print_features_internal("CPU Version as set by cmdline option:", prt); 655 } 656 } else { 657 tty->print_cr("***Warning: Unsupported ProcessorArchitecture: %s, internal settings left undisturbed.", march); 658 } 659 } 660 661 } 662 663 static long (*getFeatures)(unsigned long*, int, int) = NULL; 664 665 void VM_Version::set_getFeatures(address entryPoint) { 666 if (getFeatures == NULL) { 667 getFeatures = (long(*)(unsigned long*, int, int))entryPoint; 668 } 669 } 670 671 long VM_Version::call_getFeatures(unsigned long* buffer, int buflen, int functionCode) { 672 VM_Version::_is_determine_features_test_running = true; 673 long functionResult = (*getFeatures)(buffer, buflen, functionCode); 674 VM_Version::_is_determine_features_test_running = false; 675 return functionResult; 676 } 677 678 // Helper function for "extract cache attribute" instruction. 679 int VM_Version::calculate_ECAG_functionCode(unsigned int attributeIndication, 680 unsigned int levelIndication, 681 unsigned int typeIndication) { 682 return (attributeIndication<<4) | (levelIndication<<1) | typeIndication; 683 } 684 685 void VM_Version::determine_features() { 686 687 const int cbuf_size = _code_buffer_len; 688 const int buf_len = _features_buffer_len; 689 690 // Allocate code buffer space for the detection code. 691 ResourceMark rm; 692 CodeBuffer cbuf("determine CPU features", cbuf_size, 0); 693 MacroAssembler* a = new MacroAssembler(&cbuf); 694 695 // Emit code. 696 set_getFeatures(a->pc()); 697 address code = a->pc(); 698 699 // Try STFLE. Possible INVOP will cause defaults to be used. 700 Label getFEATURES; 701 Label getCPUFEATURES; // fcode = -1 (cache) 702 Label getCIPHERFEATURES; // fcode = -2 (cipher) 703 Label getMSGDIGESTFEATURES; // fcode = -3 (SHA) 704 Label checkLongDispFast; 705 Label noLongDisp; 706 Label posDisp, negDisp; 707 Label errRTN; 708 a->z_ltgfr(Z_R0, Z_ARG2); // Buf len to r0 and test. 709 a->z_brl(getFEATURES); // negative -> Get machine features. 710 a->z_brz(checkLongDispFast); // zero -> Check for high-speed Long Displacement Facility. 711 a->z_aghi(Z_R0, -1); 712 a->z_stfle(0, Z_ARG1); 713 a->z_lg(Z_R1, 0, Z_ARG1); // Get first DW of facility list. 714 a->z_lgr(Z_RET, Z_R0); // Calculate rtn value for success. 715 a->z_la(Z_RET, 1, Z_RET); 716 a->z_brnz(errRTN); // Instr failed if non-zero CC. 717 a->z_ltgr(Z_R1, Z_R1); // Instr failed if first DW == 0. 718 a->z_bcr(Assembler::bcondNotZero, Z_R14); // Successful return. 719 720 a->bind(errRTN); 721 a->z_lngr(Z_RET, Z_RET); 722 a->z_ltgr(Z_R1, Z_R1); 723 a->z_bcr(Assembler::bcondNotZero, Z_R14); // Return "buffer too small". 724 a->z_xgr(Z_RET, Z_RET); 725 a->z_br(Z_R14); // Return "operation aborted". 726 727 a->bind(getFEATURES); 728 a->z_cghi(Z_R0, -1); // -1: Extract CPU attributes, currently: cache layout only. 729 a->z_bre(getCPUFEATURES); 730 a->z_cghi(Z_R0, -2); // -2: Extract detailed crypto capabilities (cipher instructions). 731 a->z_bre(getCIPHERFEATURES); 732 a->z_cghi(Z_R0, -3); // -3: Extract detailed crypto capabilities (msg digest instructions). 733 a->z_bre(getMSGDIGESTFEATURES); 734 735 a->z_xgr(Z_RET, Z_RET); // Not a valid function code. 736 a->z_br(Z_R14); // Return "operation aborted". 737 738 // Try KIMD/KLMD query function to get details about msg digest (secure hash, SHA) instructions. 739 a->bind(getMSGDIGESTFEATURES); 740 a->z_lghi(Z_R0,(int)MsgDigest::_Query); // query function code 741 a->z_lgr(Z_R1,Z_R2); // param block addr, 2*16 bytes min size 742 a->z_kimd(Z_R2,Z_R2); // Get available KIMD functions (bit pattern in param blk). 743 a->z_la(Z_R1,16,Z_R1); // next param block addr 744 a->z_klmd(Z_R2,Z_R2); // Get available KLMD functions (bit pattern in param blk). 745 a->z_lghi(Z_RET,4); 746 a->z_br(Z_R14); 747 748 // Try KM/KMC query function to get details about crypto instructions. 749 a->bind(getCIPHERFEATURES); 750 a->z_lghi(Z_R0,(int)Cipher::_Query); // query function code 751 a->z_lgr(Z_R1,Z_R2); // param block addr, 2*16 bytes min size (KIMD/KLMD output) 752 a->z_km(Z_R2,Z_R2); // get available KM functions 753 a->z_la(Z_R1,16,Z_R1); // next param block addr 754 a->z_kmc(Z_R2,Z_R2); // get available KMC functions 755 a->z_lghi(Z_RET,4); 756 a->z_br(Z_R14); 757 758 // Use EXTRACT CPU ATTRIBUTE instruction to get information about cache layout. 759 a->bind(getCPUFEATURES); 760 a->z_xgr(Z_R0,Z_R0); // as recommended in instruction documentation 761 a->z_ecag(Z_RET,Z_R0,0,Z_ARG3); // Extract information as requested by Z_ARG1 contents. 762 a->z_br(Z_R14); 763 764 // Check the performance of the Long Displacement Facility, i.e. find out if we are running on z900 or newer. 765 a->bind(checkLongDispFast); 766 a->z_llill(Z_R0, 0xffff); // preset #iterations 767 a->z_larl(Z_R1, posDisp); 768 a->z_stck(0, Z_ARG1); // Get begin timestamp. 769 770 a->bind(posDisp); // Positive disp loop. 771 a->z_lg(Z_ARG2, 0, Z_ARG1); 772 a->z_bctgr(Z_R0, Z_R1); 773 774 a->z_stck(0, Z_ARG1); // Get end timestamp. 775 a->z_sg(Z_ARG2, 0, Z_R0, Z_ARG1); // Calculate elapsed time. 776 a->z_lcgr(Z_ARG2, Z_ARG2); 777 a->z_srlg(Z_ARG2, Z_ARG2, 12); // LSB: now microseconds 778 a->z_stg(Z_ARG2, 8, Z_ARG1); // Store difference in buffer[1]. 779 780 a->z_llill(Z_R0, 0xffff); // preset #iterations 781 a->z_larl(Z_R1, negDisp); 782 a->z_xgr(Z_ARG2, Z_ARG2); // Clear to detect absence of LongDisp facility. 783 a->z_stck(0, Z_ARG1); // Get begin timestamp. 784 a->z_la(Z_ARG1, 8, Z_ARG1); 785 786 a->bind(negDisp); // Negative disp loop. 787 a->z_lg(Z_ARG2, -8, Z_ARG1); 788 a->z_bctgr(Z_R0, Z_R1); 789 790 a->z_aghi(Z_ARG1, -8); 791 a->z_stck(0, Z_ARG1); // Get end timestamp. 792 a->z_ltgr(Z_ARG2, Z_ARG2); // Check for absence of LongDisp facility. 793 a->z_brz(noLongDisp); 794 a->z_sg(Z_ARG2, 0, Z_R0, Z_ARG1); // Calc elapsed time. 795 a->z_lcgr(Z_ARG2, Z_ARG2); 796 a->z_srlg(Z_ARG2, Z_ARG2, 12); // LSB: now microseconds 797 a->z_stg(Z_ARG2, 0, Z_ARG1); // store difference in buffer[0] 798 799 a->z_llill(Z_RET,0xffff); 800 a->z_br(Z_R14); 801 802 a->bind(noLongDisp); 803 a->z_lghi(Z_RET,-1); 804 a->z_br(Z_R14); 805 806 address code_end = a->pc(); 807 a->flush(); 808 809 // Print the detection code. 810 bool printVerbose = Verbose || PrintAssembly || PrintStubCode; 811 if (printVerbose) { 812 ttyLocker ttyl; 813 tty->print_cr("Decoding CPU feature detection stub at " INTPTR_FORMAT " before execution:", p2i(code)); 814 tty->print_cr("Stub length is %ld bytes, codebuffer reserves %d bytes, %ld bytes spare.", 815 code_end-code, cbuf_size, cbuf_size-(code_end-code)); 816 817 // Use existing decode function. This enables the [Code] format which is needed to DecodeErrorFile. 818 Disassembler::decode((u_char*)code, (u_char*)code_end, tty); 819 } 820 821 // Prepare for detection code execution and clear work buffer. 822 _nfeatures = 0; 823 _ncipher_features = 0; 824 unsigned long buffer[buf_len]; 825 826 for (int i = 0; i < buf_len; i++) { 827 buffer[i] = 0L; 828 } 829 830 // execute code 831 // Illegal instructions will be replaced by 0 in signal handler. 832 // In case of problems, call_getFeatures will return a not-positive result. 833 long used_len = call_getFeatures(buffer, buf_len, 0); 834 835 bool ok; 836 if (used_len == 1) { 837 ok = true; 838 } else if (used_len > 1) { 839 unsigned int used_lenU = (unsigned int)used_len; 840 ok = true; 841 for (unsigned int i = 1; i < used_lenU; i++) { 842 ok = ok && (buffer[i] == 0L); 843 } 844 if (printVerbose && !ok) { 845 bool compact = false; 846 tty->print_cr("Note: feature list has %d (i.e. more than one) array elements.", used_lenU); 847 if (compact) { 848 tty->print("non-zero feature list elements:"); 849 for (unsigned int i = 0; i < used_lenU; i++) { 850 tty->print(" [%d]: 0x%16.16lx", i, buffer[i]); 851 } 852 tty->cr(); 853 } else { 854 for (unsigned int i = 0; i < used_lenU; i++) { 855 tty->print_cr("non-zero feature list[%d]: 0x%16.16lx", i, buffer[i]); 856 } 857 } 858 859 if (compact) { 860 tty->print_cr("Active features (compact view):"); 861 for (unsigned int k = 0; k < used_lenU; k++) { 862 tty->print_cr(" buffer[%d]:", k); 863 for (unsigned int j = k*sizeof(long); j < (k+1)*sizeof(long); j++) { 864 bool line = false; 865 for (unsigned int i = j*8; i < (j+1)*8; i++) { 866 bool bit = test_feature_bit(buffer, i, used_lenU*sizeof(long)*8); 867 if (bit) { 868 if (!line) { 869 tty->print(" byte[%d]:", j); 870 line = true; 871 } 872 tty->print(" [%3.3d]", i); 873 } 874 } 875 if (line) { 876 tty->cr(); 877 } 878 } 879 } 880 } else { 881 tty->print_cr("Active features (full view):"); 882 for (unsigned int k = 0; k < used_lenU; k++) { 883 tty->print_cr(" buffer[%d]:", k); 884 for (unsigned int j = k*sizeof(long); j < (k+1)*sizeof(long); j++) { 885 tty->print(" byte[%d]:", j); 886 for (unsigned int i = j*8; i < (j+1)*8; i++) { 887 bool bit = test_feature_bit(buffer, i, used_lenU*sizeof(long)*8); 888 if (bit) { 889 tty->print(" [%3.3d]", i); 890 } else { 891 tty->print(" "); 892 } 893 } 894 tty->cr(); 895 } 896 } 897 } 898 } 899 ok = true; 900 } else { // No features retrieved if we reach here. Buffer too short or instr not available. 901 if (used_len < 0) { 902 ok = false; 903 if (printVerbose) { 904 tty->print_cr("feature list buffer[%d] too short, required: buffer[%ld]", buf_len, -used_len); 905 } 906 } else { 907 if (printVerbose) { 908 tty->print_cr("feature list could not be retrieved. Running on z900 or z990? Trying to find out..."); 909 } 910 used_len = call_getFeatures(buffer, 0, 0); // Must provide at least two DW buffer elements!!!! 911 912 ok = used_len > 0; 913 if (ok) { 914 if (buffer[1]*10 < buffer[0]) { 915 set_features_z900(); 916 } else { 917 set_features_z990(); 918 } 919 920 if (printVerbose) { 921 tty->print_cr("Note: high-speed long displacement test used %ld iterations.", used_len); 922 tty->print_cr(" Positive displacement loads took %8.8lu microseconds.", buffer[1]); 923 tty->print_cr(" Negative displacement loads took %8.8lu microseconds.", buffer[0]); 924 if (has_long_displacement_fast()) { 925 tty->print_cr(" assuming high-speed long displacement IS available."); 926 } else { 927 tty->print_cr(" assuming high-speed long displacement is NOT available."); 928 } 929 } 930 } else { 931 if (printVerbose) { 932 tty->print_cr("Note: high-speed long displacement test was not successful."); 933 tty->print_cr(" assuming long displacement is NOT available."); 934 } 935 } 936 return; // Do not copy buffer to _features, no test for cipher features. 937 } 938 } 939 940 if (ok) { 941 // Fill features buffer. 942 // Clear work buffer. 943 for (int i = 0; i < buf_len; i++) { 944 _features[i] = buffer[i]; 945 _cipher_features[i] = 0; 946 _msgdigest_features[i] = 0; 947 buffer[i] = 0L; 948 } 949 _nfeatures = used_len; 950 } else { 951 for (int i = 0; i < buf_len; i++) { 952 _features[i] = 0; 953 _cipher_features[i] = 0; 954 _msgdigest_features[i] = 0; 955 buffer[i] = 0L; 956 } 957 _nfeatures = 0; 958 } 959 960 // Extract Crypto Facility details. 961 if (has_Crypto()) { 962 // Get cipher features. 963 used_len = call_getFeatures(buffer, -2, 0); 964 for (int i = 0; i < buf_len; i++) { 965 _cipher_features[i] = buffer[i]; 966 } 967 _ncipher_features = used_len; 968 969 // Get msg digest features. 970 used_len = call_getFeatures(buffer, -3, 0); 971 for (int i = 0; i < buf_len; i++) { 972 _msgdigest_features[i] = buffer[i]; 973 } 974 _nmsgdigest_features = used_len; 975 } 976 977 static int levelProperties[_max_cache_levels]; // All property indications per level. 978 static int levelScope[_max_cache_levels]; // private/shared 979 static const char* levelScopeText[4] = {"No cache ", 980 "CPU private", 981 "shared ", 982 "reserved "}; 983 984 static int levelType[_max_cache_levels]; // D/I/mixed 985 static const char* levelTypeText[4] = {"separate D and I caches", 986 "I cache only ", 987 "D-cache only ", 988 "combined D/I cache "}; 989 990 static unsigned int levelReserved[_max_cache_levels]; // reserved property bits 991 static unsigned int levelLineSize[_max_cache_levels]; 992 static unsigned int levelTotalSize[_max_cache_levels]; 993 static unsigned int levelAssociativity[_max_cache_levels]; 994 995 996 // Extract Cache Layout details. 997 if (has_ExtractCPUAttributes() && printVerbose) { // For information only, as of now. 998 bool lineSize_mismatch; 999 bool print_something; 1000 long functionResult; 1001 unsigned int attributeIndication = 0; // 0..15 1002 unsigned int levelIndication = 0; // 0..8 1003 unsigned int typeIndication = 0; // 0..1 (D-Cache, I-Cache) 1004 int functionCode = calculate_ECAG_functionCode(attributeIndication, levelIndication, typeIndication); 1005 1006 // Get cache topology. 1007 functionResult = call_getFeatures(buffer, -1, functionCode); 1008 1009 for (unsigned int i = 0; i < _max_cache_levels; i++) { 1010 if (functionResult > 0) { 1011 int shiftVal = 8*(_max_cache_levels-(i+1)); 1012 levelProperties[i] = (functionResult & (0xffUL<<shiftVal)) >> shiftVal; 1013 levelReserved[i] = (levelProperties[i] & 0xf0) >> 4; 1014 levelScope[i] = (levelProperties[i] & 0x0c) >> 2; 1015 levelType[i] = (levelProperties[i] & 0x03); 1016 } else { 1017 levelProperties[i] = 0; 1018 levelReserved[i] = 0; 1019 levelScope[i] = 0; 1020 levelType[i] = 0; 1021 } 1022 levelLineSize[i] = 0; 1023 levelTotalSize[i] = 0; 1024 levelAssociativity[i] = 0; 1025 } 1026 1027 tty->cr(); 1028 tty->print_cr("------------------------------------"); 1029 tty->print_cr("--- Cache Topology Information ---"); 1030 tty->print_cr("------------------------------------"); 1031 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) { 1032 tty->print_cr(" Cache Level %d: <scope> %s | <type> %s", 1033 i+1, levelScopeText[levelScope[i]], levelTypeText[levelType[i]]); 1034 } 1035 1036 // Get D-cache details per level. 1037 _Dcache_lineSize = 0; 1038 lineSize_mismatch = false; 1039 print_something = false; 1040 typeIndication = 0; // 0..1 (D-Cache, I-Cache) 1041 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) { 1042 if ((levelType[i] == 0) || (levelType[i] == 2)) { 1043 print_something = true; 1044 1045 // Get cache line size of level i. 1046 attributeIndication = 1; 1047 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication); 1048 levelLineSize[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode); 1049 1050 // Get cache total size of level i. 1051 attributeIndication = 2; 1052 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication); 1053 levelTotalSize[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode); 1054 1055 // Get cache associativity of level i. 1056 attributeIndication = 3; 1057 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication); 1058 levelAssociativity[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode); 1059 1060 _Dcache_lineSize = _Dcache_lineSize == 0 ? levelLineSize[i] : _Dcache_lineSize; 1061 lineSize_mismatch = lineSize_mismatch || (_Dcache_lineSize != levelLineSize[i]); 1062 } else { 1063 levelLineSize[i] = 0; 1064 } 1065 } 1066 1067 if (print_something) { 1068 tty->cr(); 1069 tty->print_cr("------------------------------------"); 1070 tty->print_cr("--- D-Cache Detail Information ---"); 1071 tty->print_cr("------------------------------------"); 1072 if (lineSize_mismatch) { 1073 tty->print_cr("WARNING: D-Cache line size mismatch!"); 1074 } 1075 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) { 1076 if (levelLineSize[i] > 0) { 1077 tty->print_cr(" D-Cache Level %d: line size = %4d, total size = %6dKB, associativity = %2d", 1078 i+1, levelLineSize[i], levelTotalSize[i]/(int)K, levelAssociativity[i]); 1079 } 1080 } 1081 } 1082 1083 // Get I-cache details per level. 1084 _Icache_lineSize = 0; 1085 lineSize_mismatch = false; 1086 print_something = false; 1087 typeIndication = 1; // 0..1 (D-Cache, I-Cache) 1088 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) { 1089 if ((levelType[i] == 0) || (levelType[i] == 1)) { 1090 print_something = true; 1091 1092 // Get cache line size of level i. 1093 attributeIndication = 1; 1094 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication); 1095 levelLineSize[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode); 1096 1097 // Get cache total size of level i. 1098 attributeIndication = 2; 1099 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication); 1100 levelTotalSize[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode); 1101 1102 // Get cache associativity of level i. 1103 attributeIndication = 3; 1104 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication); 1105 levelAssociativity[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode); 1106 1107 _Icache_lineSize = _Icache_lineSize == 0 ? levelLineSize[i] : _Icache_lineSize; 1108 lineSize_mismatch = lineSize_mismatch || (_Icache_lineSize != levelLineSize[i]); 1109 } else { 1110 levelLineSize[i] = 0; 1111 } 1112 } 1113 1114 if (print_something) { 1115 tty->cr(); 1116 tty->print_cr("------------------------------------"); 1117 tty->print_cr("--- I-Cache Detail Information ---"); 1118 tty->print_cr("------------------------------------"); 1119 if (lineSize_mismatch) { 1120 tty->print_cr("WARNING: I-Cache line size mismatch!"); 1121 } 1122 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) { 1123 if (levelLineSize[i] > 0) { 1124 tty->print_cr(" I-Cache Level %d: line size = %4d, total size = %6dKB, associativity = %2d", 1125 i+1, levelLineSize[i], levelTotalSize[i]/(int)K, levelAssociativity[i]); 1126 } 1127 } 1128 } 1129 1130 // Get D/I-cache details per level. 1131 lineSize_mismatch = false; 1132 print_something = false; 1133 typeIndication = 0; // 0..1 (D-Cache, I-Cache) 1134 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) { 1135 if (levelType[i] == 3) { 1136 print_something = true; 1137 1138 // Get cache line size of level i. 1139 attributeIndication = 1; 1140 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication); 1141 levelLineSize[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode); 1142 1143 // Get cache total size of level i. 1144 attributeIndication = 2; 1145 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication); 1146 levelTotalSize[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode); 1147 1148 // Get cache associativity of level i. 1149 attributeIndication = 3; 1150 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication); 1151 levelAssociativity[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode); 1152 1153 _Dcache_lineSize = _Dcache_lineSize == 0 ? levelLineSize[i] : _Dcache_lineSize; 1154 _Icache_lineSize = _Icache_lineSize == 0 ? levelLineSize[i] : _Icache_lineSize; 1155 lineSize_mismatch = lineSize_mismatch || (_Dcache_lineSize != levelLineSize[i]) 1156 || (_Icache_lineSize != levelLineSize[i]); 1157 } else { 1158 levelLineSize[i] = 0; 1159 } 1160 } 1161 1162 if (print_something) { 1163 tty->cr(); 1164 tty->print_cr("--------------------------------------"); 1165 tty->print_cr("--- D/I-Cache Detail Information ---"); 1166 tty->print_cr("--------------------------------------"); 1167 if (lineSize_mismatch) { 1168 tty->print_cr("WARNING: D/I-Cache line size mismatch!"); 1169 } 1170 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) { 1171 if (levelLineSize[i] > 0) { 1172 tty->print_cr(" D/I-Cache Level %d: line size = %4d, total size = %6dKB, associativity = %2d", 1173 i+1, levelLineSize[i], levelTotalSize[i]/(int)K, levelAssociativity[i]); 1174 } 1175 } 1176 } 1177 tty->cr(); 1178 } 1179 return; 1180 } 1181 1182 unsigned long VM_Version::z_SIGILL() { 1183 unsigned long ZeroBuffer = 0; 1184 unsigned long work; 1185 asm( 1186 " LA %[work],%[buffer] \n\t" // Load address of buffer. 1187 " LARL 14,+6 \n\t" // Load address of faulting instruction. 1188 " BCR 15,%[work] \n\t" // Branch into buffer, execute whatever is in there. 1189 : [buffer] "+Q" (ZeroBuffer) /* outputs */ 1190 , [work] "=&a" (work) /* outputs */ 1191 : /* inputs */ 1192 : "cc" /* clobbered */ 1193 ); 1194 return ZeroBuffer; 1195 } 1196 1197 unsigned long VM_Version::z_SIGSEGV() { 1198 unsigned long ZeroBuffer = 0; 1199 unsigned long work; 1200 asm( 1201 " LG %[work],%[buffer] \n\t" // Load zero address. 1202 " STG %[work],0(,%[work])\n\t" // Store to address zero. 1203 : [buffer] "+Q" (ZeroBuffer) /* outputs */ 1204 , [work] "=&a" (work) /* outputs */ 1205 : /* inputs */ 1206 : "cc" /* clobbered */ 1207 ); 1208 return ZeroBuffer; 1209 } 1210