1 /*
2 * Copyright (c) 2016, Oracle and/or its affiliates. All rights reserved.
3 * Copyright (c) 2016 SAP SE. All rights reserved.
4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
5 *
6 * This code is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 only, as
8 * published by the Free Software Foundation.
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
44 #define __ gen()->lir()->
45 #endif
46
47 void LIRItem::load_byte_item() {
48 // Byte loads use same registers as other loads.
49 load_item();
50 }
51
52 void LIRItem::load_nonconstant(int bits) {
53 LIR_Opr r = value()->operand();
54 if (_gen->can_inline_as_constant(value(), bits)) {
55 if (!r->is_constant()) {
56 r = LIR_OprFact::value_type(value()->type());
57 }
58 _result = r;
59 } else {
60 load_item();
61 }
62 }
63
64 inline void load_int_as_long(LIR_List *ll, LIRItem &li, LIR_Opr dst) {
65 LIR_Opr r = li.value()->operand();
66 if (r->is_constant()) {
67 // Constants get loaded with sign extend on this platform.
68 ll->move(li.result(), dst);
69 } else {
70 if (!r->is_register()) {
71 li.load_item_force(dst);
72 }
73 LIR_Opr dst_l = FrameMap::as_long_opr(dst->as_register());
74 ll->convert(Bytecodes::_i2l, li.result(), dst_l); // Convert.
75 }
76 }
77
78 //--------------------------------------------------------------
79 // LIRGenerator
80 //--------------------------------------------------------------
81
82 LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::as_oop_opr(Z_EXC_OOP); }
83 LIR_Opr LIRGenerator::exceptionPcOpr() { return FrameMap::as_opr(Z_EXC_PC); }
84 LIR_Opr LIRGenerator::divInOpr() { return FrameMap::Z_R11_opr; }
85 LIR_Opr LIRGenerator::divOutOpr() { return FrameMap::Z_R11_opr; }
86 LIR_Opr LIRGenerator::remOutOpr() { return FrameMap::Z_R10_opr; }
87 LIR_Opr LIRGenerator::ldivInOpr() { return FrameMap::Z_R11_long_opr; }
88 LIR_Opr LIRGenerator::ldivOutOpr() { return FrameMap::Z_R11_long_opr; }
89 LIR_Opr LIRGenerator::lremOutOpr() { return FrameMap::Z_R10_long_opr; }
90 LIR_Opr LIRGenerator::syncLockOpr() { return new_register(T_INT); }
91 LIR_Opr LIRGenerator::syncTempOpr() { return FrameMap::Z_R13_opr; }
92 LIR_Opr LIRGenerator::getThreadTemp() { return LIR_OprFact::illegalOpr; }
93
94 LIR_Opr LIRGenerator::result_register_for (ValueType* type, bool callee) {
95 LIR_Opr opr;
96 switch (type->tag()) {
97 case intTag: opr = FrameMap::Z_R2_opr; break;
1200
1201 if (index->is_valid()) {
1202 LIR_Opr tmp = new_register(T_LONG);
1203 __ convert(Bytecodes::_i2l, index, tmp);
1204 index = tmp;
1205 }
1206
1207 LIR_Address* a = new LIR_Address(base_op, index, offset, T_BYTE);
1208
1209 BasicTypeList signature(3);
1210 signature.append(T_INT);
1211 signature.append(T_ADDRESS);
1212 signature.append(T_INT);
1213 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1214 const LIR_Opr result_reg = result_register_for (x->type());
1215
1216 LIR_Opr arg1 = cc->at(0);
1217 LIR_Opr arg2 = cc->at(1);
1218 LIR_Opr arg3 = cc->at(2);
1219
1220 // CCallingConventionRequiresIntsAsLongs
1221 crc.load_item_force(arg1); // We skip int->long conversion here, because CRC32 stub doesn't care about high bits.
1222 __ leal(LIR_OprFact::address(a), arg2);
1223 load_int_as_long(gen()->lir(), len, arg3);
1224
1225 __ call_runtime_leaf(StubRoutines::updateBytesCRC32(), LIR_OprFact::illegalOpr, result_reg, cc->args());
1226 __ move(result_reg, result);
1227 break;
1228 }
1229 default: {
1230 ShouldNotReachHere();
1231 }
1232 }
1233 }
1234
1235 void LIRGenerator::do_update_CRC32C(Intrinsic* x) {
1236 Unimplemented();
1237 }
1238
1239 void LIRGenerator::do_FmaIntrinsic(Intrinsic* x) {
1240 assert(x->number_of_arguments() == 3, "wrong type");
1241 assert(UseFMA, "Needs FMA instructions support.");
1242 LIRItem value(x->argument_at(0), this);
1243 LIRItem value1(x->argument_at(1), this);
1244 LIRItem value2(x->argument_at(2), this);
1245
1246 value2.set_destroys_register();
1247
1248 value.load_item();
1249 value1.load_item();
1250 value2.load_item();
1251
1252 LIR_Opr calc_input = value.result();
1253 LIR_Opr calc_input1 = value1.result();
1254 LIR_Opr calc_input2 = value2.result();
1255 LIR_Opr calc_result = rlock_result(x);
1256
1257 switch (x->id()) {
1258 case vmIntrinsics::_fmaD: __ fmad(calc_input, calc_input1, calc_input2, calc_result); break;
1259 case vmIntrinsics::_fmaF: __ fmaf(calc_input, calc_input1, calc_input2, calc_result); break;
1260 default: ShouldNotReachHere();
1261 }
1262 }
1263
1264 void LIRGenerator::do_vectorizedMismatch(Intrinsic* x) {
1265 fatal("vectorizedMismatch intrinsic is not implemented on this platform");
1266 }
1267
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1 /*
2 * Copyright (c) 2016, 2017, Oracle and/or its affiliates. All rights reserved.
3 * Copyright (c) 2016, 2017, SAP SE. All rights reserved.
4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
5 *
6 * This code is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 only, as
8 * published by the Free Software Foundation.
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
44 #define __ gen()->lir()->
45 #endif
46
47 void LIRItem::load_byte_item() {
48 // Byte loads use same registers as other loads.
49 load_item();
50 }
51
52 void LIRItem::load_nonconstant(int bits) {
53 LIR_Opr r = value()->operand();
54 if (_gen->can_inline_as_constant(value(), bits)) {
55 if (!r->is_constant()) {
56 r = LIR_OprFact::value_type(value()->type());
57 }
58 _result = r;
59 } else {
60 load_item();
61 }
62 }
63
64 //--------------------------------------------------------------
65 // LIRGenerator
66 //--------------------------------------------------------------
67
68 LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::as_oop_opr(Z_EXC_OOP); }
69 LIR_Opr LIRGenerator::exceptionPcOpr() { return FrameMap::as_opr(Z_EXC_PC); }
70 LIR_Opr LIRGenerator::divInOpr() { return FrameMap::Z_R11_opr; }
71 LIR_Opr LIRGenerator::divOutOpr() { return FrameMap::Z_R11_opr; }
72 LIR_Opr LIRGenerator::remOutOpr() { return FrameMap::Z_R10_opr; }
73 LIR_Opr LIRGenerator::ldivInOpr() { return FrameMap::Z_R11_long_opr; }
74 LIR_Opr LIRGenerator::ldivOutOpr() { return FrameMap::Z_R11_long_opr; }
75 LIR_Opr LIRGenerator::lremOutOpr() { return FrameMap::Z_R10_long_opr; }
76 LIR_Opr LIRGenerator::syncLockOpr() { return new_register(T_INT); }
77 LIR_Opr LIRGenerator::syncTempOpr() { return FrameMap::Z_R13_opr; }
78 LIR_Opr LIRGenerator::getThreadTemp() { return LIR_OprFact::illegalOpr; }
79
80 LIR_Opr LIRGenerator::result_register_for (ValueType* type, bool callee) {
81 LIR_Opr opr;
82 switch (type->tag()) {
83 case intTag: opr = FrameMap::Z_R2_opr; break;
1186
1187 if (index->is_valid()) {
1188 LIR_Opr tmp = new_register(T_LONG);
1189 __ convert(Bytecodes::_i2l, index, tmp);
1190 index = tmp;
1191 }
1192
1193 LIR_Address* a = new LIR_Address(base_op, index, offset, T_BYTE);
1194
1195 BasicTypeList signature(3);
1196 signature.append(T_INT);
1197 signature.append(T_ADDRESS);
1198 signature.append(T_INT);
1199 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1200 const LIR_Opr result_reg = result_register_for (x->type());
1201
1202 LIR_Opr arg1 = cc->at(0);
1203 LIR_Opr arg2 = cc->at(1);
1204 LIR_Opr arg3 = cc->at(2);
1205
1206 crc.load_item_force(arg1); // We skip int->long conversion here, because CRC32 stub doesn't care about high bits.
1207 __ leal(LIR_OprFact::address(a), arg2);
1208 len.load_item_force(arg3); // We skip int->long conversion here, because CRC32 stub expects int.
1209
1210 __ call_runtime_leaf(StubRoutines::updateBytesCRC32(), LIR_OprFact::illegalOpr, result_reg, cc->args());
1211 __ move(result_reg, result);
1212 break;
1213 }
1214 default: {
1215 ShouldNotReachHere();
1216 }
1217 }
1218 }
1219
1220 void LIRGenerator::do_update_CRC32C(Intrinsic* x) {
1221 assert(UseCRC32CIntrinsics, "or should not be here");
1222 LIR_Opr result = rlock_result(x);
1223
1224 switch (x->id()) {
1225 case vmIntrinsics::_updateBytesCRC32C:
1226 case vmIntrinsics::_updateDirectByteBufferCRC32C: {
1227 bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32C);
1228
1229 LIRItem crc(x->argument_at(0), this);
1230 LIRItem buf(x->argument_at(1), this);
1231 LIRItem off(x->argument_at(2), this);
1232 LIRItem len(x->argument_at(3), this);
1233 buf.load_item();
1234 off.load_nonconstant();
1235
1236 LIR_Opr index = off.result();
1237 int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0;
1238 if (off.result()->is_constant()) {
1239 index = LIR_OprFact::illegalOpr;
1240 offset += off.result()->as_jint();
1241 }
1242 LIR_Opr base_op = buf.result();
1243
1244 if (index->is_valid()) {
1245 LIR_Opr tmp = new_register(T_LONG);
1246 __ convert(Bytecodes::_i2l, index, tmp);
1247 index = tmp;
1248 }
1249
1250 LIR_Address* a = new LIR_Address(base_op, index, offset, T_BYTE);
1251
1252 BasicTypeList signature(3);
1253 signature.append(T_INT);
1254 signature.append(T_ADDRESS);
1255 signature.append(T_INT);
1256 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1257 const LIR_Opr result_reg = result_register_for (x->type());
1258
1259 LIR_Opr arg1 = cc->at(0);
1260 LIR_Opr arg2 = cc->at(1);
1261 LIR_Opr arg3 = cc->at(2);
1262
1263 crc.load_item_force(arg1); // We skip int->long conversion here, because CRC32C stub doesn't care about high bits.
1264 __ leal(LIR_OprFact::address(a), arg2);
1265 len.load_item_force(arg3); // We skip int->long conversion here, because CRC32C stub expects int.
1266
1267 __ call_runtime_leaf(StubRoutines::updateBytesCRC32C(), LIR_OprFact::illegalOpr, result_reg, cc->args());
1268 __ move(result_reg, result);
1269 break;
1270 }
1271 default: {
1272 ShouldNotReachHere();
1273 }
1274 }
1275 }
1276
1277 void LIRGenerator::do_FmaIntrinsic(Intrinsic* x) {
1278 assert(x->number_of_arguments() == 3, "wrong type");
1279 assert(UseFMA, "Needs FMA instructions support.");
1280 LIRItem value(x->argument_at(0), this);
1281 LIRItem value1(x->argument_at(1), this);
1282 LIRItem value2(x->argument_at(2), this);
1283
1284 value2.set_destroys_register();
1285
1286 value.load_item();
1287 value1.load_item();
1288 value2.load_item();
1289
1290 LIR_Opr calc_input = value.result();
1291 LIR_Opr calc_input1 = value1.result();
1292 LIR_Opr calc_input2 = value2.result();
1293 LIR_Opr calc_result = rlock_result(x);
1294
1295 switch (x->id()) {
1296 case vmIntrinsics::_fmaD: __ fmad(calc_input, calc_input1, calc_input2, calc_result); break;
1297 case vmIntrinsics::_fmaF: __ fmaf(calc_input, calc_input1, calc_input2, calc_result); break;
1298 default: ShouldNotReachHere();
1299 }
1300 }
1301
1302 void LIRGenerator::do_vectorizedMismatch(Intrinsic* x) {
1303 fatal("vectorizedMismatch intrinsic is not implemented on this platform");
1304 }
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