--- old/src/cpu/s390/vm/c1_LIRAssembler_s390.cpp	2017-02-24 16:04:54.996502000 +0100
+++ new/src/cpu/s390/vm/c1_LIRAssembler_s390.cpp	2017-02-24 16:04:54.881475000 +0100
@@ -1,6 +1,6 @@
 /*
- * Copyright (c) 2016, Oracle and/or its affiliates. All rights reserved.
- * Copyright (c) 2016 SAP SE. All rights reserved.
+ * Copyright (c) 2016, 2017, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2016, 2017, SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -3044,9 +3044,7 @@
   assert_different_registers(val, crc, res);
 
   __ load_const_optimized(res, StubRoutines::crc_table_addr());
-  __ not_(crc, noreg, false); // ~crc
-  __ update_byte_crc32(crc, val, res);
-  __ not_(res, crc, false); // ~crc
+  __ kernel_crc32_singleByteReg(crc, val, res, true);
 }
 
 #undef __