1 /*
2 * Copyright (c) 2005, 2016, Oracle and/or its affiliates. All rights reserved.
3 * Copyright (c) 2012, 2015 SAP SE. All rights reserved.
4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
5 *
6 * This code is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 only, as
8 * published by the Free Software Foundation.
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
46
47 void LIRItem::load_byte_item() {
48 // Byte loads use same registers as other loads.
49 load_item();
50 }
51
52
53 void LIRItem::load_nonconstant() {
54 LIR_Opr r = value()->operand();
55 if (_gen->can_inline_as_constant(value())) {
56 if (!r->is_constant()) {
57 r = LIR_OprFact::value_type(value()->type());
58 }
59 _result = r;
60 } else {
61 load_item();
62 }
63 }
64
65
66 inline void load_int_as_long(LIR_List *ll, LIRItem &li, LIR_Opr dst) {
67 LIR_Opr r = li.value()->operand();
68 if (r->is_register()) {
69 LIR_Opr dst_l = FrameMap::as_long_opr(dst->as_register());
70 ll->convert(Bytecodes::_i2l, li.result(), dst_l); // Convert.
71 } else {
72 // Constants or memory get loaded with sign extend on this platform.
73 ll->move(li.result(), dst);
74 }
75 }
76
77
78 //--------------------------------------------------------------
79 // LIRGenerator
80 //--------------------------------------------------------------
81
82 LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::R3_oop_opr; }
83 LIR_Opr LIRGenerator::exceptionPcOpr() { return FrameMap::R4_opr; }
84 LIR_Opr LIRGenerator::syncLockOpr() { return FrameMap::R5_opr; } // Need temp effect for MonitorEnterStub.
85 LIR_Opr LIRGenerator::syncTempOpr() { return FrameMap::R4_oop_opr; } // Need temp effect for MonitorEnterStub.
86 LIR_Opr LIRGenerator::getThreadTemp() { return LIR_OprFact::illegalOpr; } // not needed
87
88 LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) {
89 LIR_Opr opr;
90 switch (type->tag()) {
91 case intTag: opr = FrameMap::R3_opr; break;
92 case objectTag: opr = FrameMap::R3_oop_opr; break;
93 case longTag: opr = FrameMap::R3_long_opr; break;
94 case floatTag: opr = FrameMap::F1_opr; break;
95 case doubleTag: opr = FrameMap::F1_double_opr; break;
96
97 case addressTag:
1402 LIR_Opr tmp = new_register(T_LONG);
1403 __ convert(Bytecodes::_i2l, index, tmp);
1404 index = tmp;
1405 __ add(index, LIR_OprFact::intptrConst(offset), index);
1406 a = new LIR_Address(base_op, index, T_BYTE);
1407 } else {
1408 a = new LIR_Address(base_op, offset, T_BYTE);
1409 }
1410
1411 BasicTypeList signature(3);
1412 signature.append(T_INT);
1413 signature.append(T_ADDRESS);
1414 signature.append(T_INT);
1415 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1416 const LIR_Opr result_reg = result_register_for(x->type());
1417
1418 LIR_Opr arg1 = cc->at(0),
1419 arg2 = cc->at(1),
1420 arg3 = cc->at(2);
1421
1422 // CCallingConventionRequiresIntsAsLongs
1423 crc.load_item_force(arg1); // We skip int->long conversion here, because CRC32 stub doesn't care about high bits.
1424 __ leal(LIR_OprFact::address(a), arg2);
1425 load_int_as_long(gen()->lir(), len, arg3);
1426
1427 __ call_runtime_leaf(StubRoutines::updateBytesCRC32(), LIR_OprFact::illegalOpr, result_reg, cc->args());
1428 __ move(result_reg, result);
1429 break;
1430 }
1431 default: {
1432 ShouldNotReachHere();
1433 }
1434 }
1435 }
1436
1437 void LIRGenerator::do_FmaIntrinsic(Intrinsic* x) {
1438 assert(x->number_of_arguments() == 3, "wrong type");
1439 assert(UseFMA, "Needs FMA instructions support.");
1440 LIRItem value(x->argument_at(0), this);
1441 LIRItem value1(x->argument_at(1), this);
1442 LIRItem value2(x->argument_at(2), this);
1443
1444 value.load_item();
1445 value1.load_item();
1446 value2.load_item();
1447
1448 LIR_Opr calc_input = value.result();
1449 LIR_Opr calc_input1 = value1.result();
1450 LIR_Opr calc_input2 = value2.result();
1451 LIR_Opr calc_result = rlock_result(x);
1452
1453 switch (x->id()) {
1454 case vmIntrinsics::_fmaD: __ fmad(calc_input, calc_input1, calc_input2, calc_result); break;
1455 case vmIntrinsics::_fmaF: __ fmaf(calc_input, calc_input1, calc_input2, calc_result); break;
1456 default: ShouldNotReachHere();
1457 }
1458 }
1459
1460 void LIRGenerator::do_vectorizedMismatch(Intrinsic* x) {
1461 fatal("vectorizedMismatch intrinsic is not implemented on this platform");
1462 }
1463
1464 void LIRGenerator::do_update_CRC32C(Intrinsic* x) {
1465 Unimplemented();
1466 }
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1 /*
2 * Copyright (c) 2005, 2017, Oracle and/or its affiliates. All rights reserved.
3 * Copyright (c) 2012, 2017, SAP SE. All rights reserved.
4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
5 *
6 * This code is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 only, as
8 * published by the Free Software Foundation.
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
46
47 void LIRItem::load_byte_item() {
48 // Byte loads use same registers as other loads.
49 load_item();
50 }
51
52
53 void LIRItem::load_nonconstant() {
54 LIR_Opr r = value()->operand();
55 if (_gen->can_inline_as_constant(value())) {
56 if (!r->is_constant()) {
57 r = LIR_OprFact::value_type(value()->type());
58 }
59 _result = r;
60 } else {
61 load_item();
62 }
63 }
64
65
66 //--------------------------------------------------------------
67 // LIRGenerator
68 //--------------------------------------------------------------
69
70 LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::R3_oop_opr; }
71 LIR_Opr LIRGenerator::exceptionPcOpr() { return FrameMap::R4_opr; }
72 LIR_Opr LIRGenerator::syncLockOpr() { return FrameMap::R5_opr; } // Need temp effect for MonitorEnterStub.
73 LIR_Opr LIRGenerator::syncTempOpr() { return FrameMap::R4_oop_opr; } // Need temp effect for MonitorEnterStub.
74 LIR_Opr LIRGenerator::getThreadTemp() { return LIR_OprFact::illegalOpr; } // not needed
75
76 LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) {
77 LIR_Opr opr;
78 switch (type->tag()) {
79 case intTag: opr = FrameMap::R3_opr; break;
80 case objectTag: opr = FrameMap::R3_oop_opr; break;
81 case longTag: opr = FrameMap::R3_long_opr; break;
82 case floatTag: opr = FrameMap::F1_opr; break;
83 case doubleTag: opr = FrameMap::F1_double_opr; break;
84
85 case addressTag:
1390 LIR_Opr tmp = new_register(T_LONG);
1391 __ convert(Bytecodes::_i2l, index, tmp);
1392 index = tmp;
1393 __ add(index, LIR_OprFact::intptrConst(offset), index);
1394 a = new LIR_Address(base_op, index, T_BYTE);
1395 } else {
1396 a = new LIR_Address(base_op, offset, T_BYTE);
1397 }
1398
1399 BasicTypeList signature(3);
1400 signature.append(T_INT);
1401 signature.append(T_ADDRESS);
1402 signature.append(T_INT);
1403 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1404 const LIR_Opr result_reg = result_register_for(x->type());
1405
1406 LIR_Opr arg1 = cc->at(0),
1407 arg2 = cc->at(1),
1408 arg3 = cc->at(2);
1409
1410 crc.load_item_force(arg1); // We skip int->long conversion here, because CRC32 stub doesn't care about high bits.
1411 __ leal(LIR_OprFact::address(a), arg2);
1412 len.load_item_force(arg3); // We skip int->long conversion here, , because CRC32 stub expects int.
1413
1414 __ call_runtime_leaf(StubRoutines::updateBytesCRC32(), LIR_OprFact::illegalOpr, result_reg, cc->args());
1415 __ move(result_reg, result);
1416 break;
1417 }
1418 default: {
1419 ShouldNotReachHere();
1420 }
1421 }
1422 }
1423
1424 void LIRGenerator::do_update_CRC32C(Intrinsic* x) {
1425 assert(UseCRC32CIntrinsics, "or should not be here");
1426 LIR_Opr result = rlock_result(x);
1427
1428 switch (x->id()) {
1429 case vmIntrinsics::_updateBytesCRC32C:
1430 case vmIntrinsics::_updateDirectByteBufferCRC32C: {
1431 bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32C);
1432
1433 LIRItem crc(x->argument_at(0), this);
1434 LIRItem buf(x->argument_at(1), this);
1435 LIRItem off(x->argument_at(2), this);
1436 LIRItem len(x->argument_at(3), this);
1437 buf.load_item();
1438 off.load_nonconstant();
1439
1440 LIR_Opr index = off.result();
1441 int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0;
1442 if (off.result()->is_constant()) {
1443 index = LIR_OprFact::illegalOpr;
1444 offset += off.result()->as_jint();
1445 }
1446 LIR_Opr base_op = buf.result();
1447 LIR_Address* a = NULL;
1448
1449 if (index->is_valid()) {
1450 LIR_Opr tmp = new_register(T_LONG);
1451 __ convert(Bytecodes::_i2l, index, tmp);
1452 index = tmp;
1453 __ add(index, LIR_OprFact::intptrConst(offset), index);
1454 a = new LIR_Address(base_op, index, T_BYTE);
1455 } else {
1456 a = new LIR_Address(base_op, offset, T_BYTE);
1457 }
1458
1459 BasicTypeList signature(3);
1460 signature.append(T_INT);
1461 signature.append(T_ADDRESS);
1462 signature.append(T_INT);
1463 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1464 const LIR_Opr result_reg = result_register_for(x->type());
1465
1466 LIR_Opr arg1 = cc->at(0),
1467 arg2 = cc->at(1),
1468 arg3 = cc->at(2);
1469
1470 crc.load_item_force(arg1); // We skip int->long conversion here, because CRC32 stub doesn't care about high bits.
1471 __ leal(LIR_OprFact::address(a), arg2);
1472 len.load_item_force(arg3); // We skip int->long conversion here, , because CRC32 stub expects int.
1473
1474 __ call_runtime_leaf(StubRoutines::updateBytesCRC32C(), LIR_OprFact::illegalOpr, result_reg, cc->args());
1475 __ move(result_reg, result);
1476 break;
1477 }
1478 default: {
1479 ShouldNotReachHere();
1480 }
1481 }
1482 }
1483
1484 void LIRGenerator::do_FmaIntrinsic(Intrinsic* x) {
1485 assert(x->number_of_arguments() == 3, "wrong type");
1486 assert(UseFMA, "Needs FMA instructions support.");
1487 LIRItem value(x->argument_at(0), this);
1488 LIRItem value1(x->argument_at(1), this);
1489 LIRItem value2(x->argument_at(2), this);
1490
1491 value.load_item();
1492 value1.load_item();
1493 value2.load_item();
1494
1495 LIR_Opr calc_input = value.result();
1496 LIR_Opr calc_input1 = value1.result();
1497 LIR_Opr calc_input2 = value2.result();
1498 LIR_Opr calc_result = rlock_result(x);
1499
1500 switch (x->id()) {
1501 case vmIntrinsics::_fmaD: __ fmad(calc_input, calc_input1, calc_input2, calc_result); break;
1502 case vmIntrinsics::_fmaF: __ fmaf(calc_input, calc_input1, calc_input2, calc_result); break;
1503 default: ShouldNotReachHere();
1504 }
1505 }
1506
1507 void LIRGenerator::do_vectorizedMismatch(Intrinsic* x) {
1508 fatal("vectorizedMismatch intrinsic is not implemented on this platform");
1509 }
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