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src/cpu/ppc/vm/macroAssembler_ppc.cpp
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*** 1,8 ****
/*
! * Copyright (c) 1997, 2016, Oracle and/or its affiliates. All rights reserved.
! * Copyright (c) 2012, 2016 SAP SE. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 only, as
* published by the Free Software Foundation.
--- 1,8 ----
/*
! * Copyright (c) 1997, 2017, Oracle and/or its affiliates. All rights reserved.
! * Copyright (c) 2012, 2017, SAP SE. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 only, as
* published by the Free Software Foundation.
*** 4090,4126 ****
* @param buf register pointing to input byte buffer (byte*)
* @param len register containing number of bytes
* @param table register pointing to CRC table
*/
void MacroAssembler::update_byteLoop_crc32(Register crc, Register buf, Register len, Register table,
! Register data, bool loopAlignment, bool invertCRC) {
assert_different_registers(crc, buf, len, table, data);
Label L_mainLoop, L_done;
const int mainLoop_stepping = 1;
const int mainLoop_alignment = loopAlignment ? 32 : 4; // (InputForNewCode > 4 ? InputForNewCode : 32) : 4;
// Process all bytes in a single-byte loop.
clrldi_(len, len, 32); // Enforce 32 bit. Anything to do?
beq(CCR0, L_done);
- if (invertCRC) {
- nand(crc, crc, crc); // ~c
- }
-
mtctr(len);
align(mainLoop_alignment);
BIND(L_mainLoop);
lbz(data, 0, buf); // Byte from buffer, zero-extended.
addi(buf, buf, mainLoop_stepping); // Advance buffer position.
update_byte_crc32(crc, data, table);
bdnz(L_mainLoop); // Iterate.
- if (invertCRC) {
- nand(crc, crc, crc); // ~c
- }
-
bind(L_done);
}
/**
* Emits code to update CRC-32 with a 4-byte value according to constants in table
--- 4090,4118 ----
* @param buf register pointing to input byte buffer (byte*)
* @param len register containing number of bytes
* @param table register pointing to CRC table
*/
void MacroAssembler::update_byteLoop_crc32(Register crc, Register buf, Register len, Register table,
! Register data, bool loopAlignment) {
assert_different_registers(crc, buf, len, table, data);
Label L_mainLoop, L_done;
const int mainLoop_stepping = 1;
const int mainLoop_alignment = loopAlignment ? 32 : 4; // (InputForNewCode > 4 ? InputForNewCode : 32) : 4;
// Process all bytes in a single-byte loop.
clrldi_(len, len, 32); // Enforce 32 bit. Anything to do?
beq(CCR0, L_done);
mtctr(len);
align(mainLoop_alignment);
BIND(L_mainLoop);
lbz(data, 0, buf); // Byte from buffer, zero-extended.
addi(buf, buf, mainLoop_stepping); // Advance buffer position.
update_byte_crc32(crc, data, table);
bdnz(L_mainLoop); // Iterate.
bind(L_done);
}
/**
* Emits code to update CRC-32 with a 4-byte value according to constants in table
*** 4173,4183 ****
*
* Uses R9..R12 as work register. Must be saved/restored by caller!
*/
void MacroAssembler::kernel_crc32_2word(Register crc, Register buf, Register len, Register table,
Register t0, Register t1, Register t2, Register t3,
! Register tc0, Register tc1, Register tc2, Register tc3) {
assert_different_registers(crc, buf, len, table);
Label L_mainLoop, L_tail;
Register tmp = t0;
Register data = t0;
--- 4165,4176 ----
*
* Uses R9..R12 as work register. Must be saved/restored by caller!
*/
void MacroAssembler::kernel_crc32_2word(Register crc, Register buf, Register len, Register table,
Register t0, Register t1, Register t2, Register t3,
! Register tc0, Register tc1, Register tc2, Register tc3,
! bool invertCRC) {
assert_different_registers(crc, buf, len, table);
Label L_mainLoop, L_tail;
Register tmp = t0;
Register data = t0;
*** 4194,4204 ****
// following aghi(len, -stepping) and aghi(len, +stepping).
assert(tailLoop_stepping == 1, "check tailLoop_stepping!");
BLOCK_COMMENT("kernel_crc32_2word {");
! nand(crc, crc, crc); // ~c
// Check for short (<mainLoop_stepping) buffer.
cmpdi(CCR0, len, complexThreshold);
blt(CCR0, L_tail);
--- 4187,4199 ----
// following aghi(len, -stepping) and aghi(len, +stepping).
assert(tailLoop_stepping == 1, "check tailLoop_stepping!");
BLOCK_COMMENT("kernel_crc32_2word {");
! if (invertCRC) {
! nand(crc, crc, crc); // 1s complement of crc
! }
// Check for short (<mainLoop_stepping) buffer.
cmpdi(CCR0, len, complexThreshold);
blt(CCR0, L_tail);
*** 4215,4225 ****
sub(tmp, len, tmp2); // Remaining bytes for main loop.
cmpdi(CCR0, tmp, mainLoop_stepping);
blt(CCR0, L_tail); // For less than one mainloop_stepping left, do only tail processing
mr(len, tmp); // remaining bytes for main loop (>=mainLoop_stepping is guaranteed).
}
! update_byteLoop_crc32(crc, buf, tmp2, table, data, false, false);
}
srdi(tmp2, len, log_stepping); // #iterations for mainLoop
andi(len, len, mainLoop_stepping-1); // remaining bytes for tailLoop
mtctr(tmp2);
--- 4210,4220 ----
sub(tmp, len, tmp2); // Remaining bytes for main loop.
cmpdi(CCR0, tmp, mainLoop_stepping);
blt(CCR0, L_tail); // For less than one mainloop_stepping left, do only tail processing
mr(len, tmp); // remaining bytes for main loop (>=mainLoop_stepping is guaranteed).
}
! update_byteLoop_crc32(crc, buf, tmp2, table, data, false);
}
srdi(tmp2, len, log_stepping); // #iterations for mainLoop
andi(len, len, mainLoop_stepping-1); // remaining bytes for tailLoop
mtctr(tmp2);
*** 4251,4263 ****
addi(table, table, -reconstructTableOffset);
}
// Process last few (<complexThreshold) bytes of buffer.
BIND(L_tail);
! update_byteLoop_crc32(crc, buf, len, table, data, false, false);
! nand(crc, crc, crc); // ~c
BLOCK_COMMENT("} kernel_crc32_2word");
}
/**
* @param crc register containing existing CRC (32-bit)
--- 4246,4260 ----
addi(table, table, -reconstructTableOffset);
}
// Process last few (<complexThreshold) bytes of buffer.
BIND(L_tail);
! update_byteLoop_crc32(crc, buf, len, table, data, false);
! if (invertCRC) {
! nand(crc, crc, crc); // 1s complement of crc
! }
BLOCK_COMMENT("} kernel_crc32_2word");
}
/**
* @param crc register containing existing CRC (32-bit)
*** 4267,4277 ****
*
* uses R9..R12 as work register. Must be saved/restored by caller!
*/
void MacroAssembler::kernel_crc32_1word(Register crc, Register buf, Register len, Register table,
Register t0, Register t1, Register t2, Register t3,
! Register tc0, Register tc1, Register tc2, Register tc3) {
assert_different_registers(crc, buf, len, table);
Label L_mainLoop, L_tail;
Register tmp = t0;
Register data = t0;
--- 4264,4275 ----
*
* uses R9..R12 as work register. Must be saved/restored by caller!
*/
void MacroAssembler::kernel_crc32_1word(Register crc, Register buf, Register len, Register table,
Register t0, Register t1, Register t2, Register t3,
! Register tc0, Register tc1, Register tc2, Register tc3,
! bool invertCRC) {
assert_different_registers(crc, buf, len, table);
Label L_mainLoop, L_tail;
Register tmp = t0;
Register data = t0;
*** 4288,4298 ****
// following aghi(len, -stepping) and aghi(len, +stepping).
assert(tailLoop_stepping == 1, "check tailLoop_stepping!");
BLOCK_COMMENT("kernel_crc32_1word {");
! nand(crc, crc, crc); // ~c
// Check for short (<mainLoop_stepping) buffer.
cmpdi(CCR0, len, complexThreshold);
blt(CCR0, L_tail);
--- 4286,4298 ----
// following aghi(len, -stepping) and aghi(len, +stepping).
assert(tailLoop_stepping == 1, "check tailLoop_stepping!");
BLOCK_COMMENT("kernel_crc32_1word {");
! if (invertCRC) {
! nand(crc, crc, crc); // 1s complement of crc
! }
// Check for short (<mainLoop_stepping) buffer.
cmpdi(CCR0, len, complexThreshold);
blt(CCR0, L_tail);
*** 4309,4319 ****
sub(tmp, len, tmp2); // Remaining bytes for main loop.
cmpdi(CCR0, tmp, mainLoop_stepping);
blt(CCR0, L_tail); // For less than one mainloop_stepping left, do only tail processing
mr(len, tmp); // remaining bytes for main loop (>=mainLoop_stepping is guaranteed).
}
! update_byteLoop_crc32(crc, buf, tmp2, table, data, false, false);
}
srdi(tmp2, len, log_stepping); // #iterations for mainLoop
andi(len, len, mainLoop_stepping-1); // remaining bytes for tailLoop
mtctr(tmp2);
--- 4309,4319 ----
sub(tmp, len, tmp2); // Remaining bytes for main loop.
cmpdi(CCR0, tmp, mainLoop_stepping);
blt(CCR0, L_tail); // For less than one mainloop_stepping left, do only tail processing
mr(len, tmp); // remaining bytes for main loop (>=mainLoop_stepping is guaranteed).
}
! update_byteLoop_crc32(crc, buf, tmp2, table, data, false);
}
srdi(tmp2, len, log_stepping); // #iterations for mainLoop
andi(len, len, mainLoop_stepping-1); // remaining bytes for tailLoop
mtctr(tmp2);
*** 4344,4356 ****
addi(table, table, -reconstructTableOffset);
}
// Process last few (<complexThreshold) bytes of buffer.
BIND(L_tail);
! update_byteLoop_crc32(crc, buf, len, table, data, false, false);
! nand(crc, crc, crc); // ~c
BLOCK_COMMENT("} kernel_crc32_1word");
}
/**
* @param crc register containing existing CRC (32-bit)
--- 4344,4358 ----
addi(table, table, -reconstructTableOffset);
}
// Process last few (<complexThreshold) bytes of buffer.
BIND(L_tail);
! update_byteLoop_crc32(crc, buf, len, table, data, false);
! if (invertCRC) {
! nand(crc, crc, crc); // 1s complement of crc
! }
BLOCK_COMMENT("} kernel_crc32_1word");
}
/**
* @param crc register containing existing CRC (32-bit)
*** 4359,4378 ****
* @param table register pointing to CRC table
*
* Uses R7_ARG5, R8_ARG6 as work registers.
*/
void MacroAssembler::kernel_crc32_1byte(Register crc, Register buf, Register len, Register table,
! Register t0, Register t1, Register t2, Register t3) {
assert_different_registers(crc, buf, len, table);
Register data = t0; // Holds the current byte to be folded into crc.
BLOCK_COMMENT("kernel_crc32_1byte {");
// Process all bytes in a single-byte loop.
! update_byteLoop_crc32(crc, buf, len, table, data, true, true);
BLOCK_COMMENT("} kernel_crc32_1byte");
}
/**
* @param crc register containing existing CRC (32-bit)
--- 4361,4388 ----
* @param table register pointing to CRC table
*
* Uses R7_ARG5, R8_ARG6 as work registers.
*/
void MacroAssembler::kernel_crc32_1byte(Register crc, Register buf, Register len, Register table,
! Register t0, Register t1, Register t2, Register t3,
! bool invertCRC) {
assert_different_registers(crc, buf, len, table);
Register data = t0; // Holds the current byte to be folded into crc.
BLOCK_COMMENT("kernel_crc32_1byte {");
+ if (invertCRC) {
+ nand(crc, crc, crc); // 1s complement of crc
+ }
+
// Process all bytes in a single-byte loop.
! update_byteLoop_crc32(crc, buf, len, table, data, true);
+ if (invertCRC) {
+ nand(crc, crc, crc); // 1s complement of crc
+ }
BLOCK_COMMENT("} kernel_crc32_1byte");
}
/**
* @param crc register containing existing CRC (32-bit)
*** 4386,4396 ****
* @param t2 volatile register
* @param t3 volatile register
*/
void MacroAssembler::kernel_crc32_1word_vpmsumd(Register crc, Register buf, Register len, Register table,
Register constants, Register barretConstants,
! Register t0, Register t1, Register t2, Register t3, Register t4) {
assert_different_registers(crc, buf, len, table);
Label L_alignedHead, L_tail, L_alignTail, L_start, L_end;
Register prealign = t0;
--- 4396,4407 ----
* @param t2 volatile register
* @param t3 volatile register
*/
void MacroAssembler::kernel_crc32_1word_vpmsumd(Register crc, Register buf, Register len, Register table,
Register constants, Register barretConstants,
! Register t0, Register t1, Register t2, Register t3, Register t4,
! bool invertCRC) {
assert_different_registers(crc, buf, len, table);
Label L_alignedHead, L_tail, L_alignTail, L_start, L_end;
Register prealign = t0;
*** 4404,4429 ****
bge(CCR0, L_start);
Register tc0 = t4;
Register tc1 = constants;
Register tc2 = barretConstants;
! kernel_crc32_1word(crc, buf, len, table,t0, t1, t2, t3, tc0, tc1, tc2, table);
b(L_end);
BIND(L_start);
// 2. ~c
! nand(crc, crc, crc);
// 3. calculate from 0 to first 128bit-aligned address
clrldi_(prealign, buf, 57);
beq(CCR0, L_alignedHead);
subfic(prealign, prealign, 128);
subf(len, prealign, len);
! update_byteLoop_crc32(crc, buf, prealign, table, t2, false, false);
// 4. calculate from first 128bit-aligned address to last 128bit-aligned address
BIND(L_alignedHead);
clrldi(postalign, len, 57);
--- 4415,4442 ----
bge(CCR0, L_start);
Register tc0 = t4;
Register tc1 = constants;
Register tc2 = barretConstants;
! kernel_crc32_1word(crc, buf, len, table,t0, t1, t2, t3, tc0, tc1, tc2, table, invertCRC);
b(L_end);
BIND(L_start);
// 2. ~c
! if (invertCRC) {
! nand(crc, crc, crc); // 1s complement of crc
! }
// 3. calculate from 0 to first 128bit-aligned address
clrldi_(prealign, buf, 57);
beq(CCR0, L_alignedHead);
subfic(prealign, prealign, 128);
subf(len, prealign, len);
! update_byteLoop_crc32(crc, buf, prealign, table, t2, false);
// 4. calculate from first 128bit-aligned address to last 128bit-aligned address
BIND(L_alignedHead);
clrldi(postalign, len, 57);
*** 4434,4449 ****
// 5. calculate remaining
cmpdi(CCR0, postalign, 0);
beq(CCR0, L_tail);
! update_byteLoop_crc32(crc, buf, postalign, table, t2, false, false);
BIND(L_tail);
// 6. ~c
! nand(crc, crc, crc);
BIND(L_end);
BLOCK_COMMENT("} kernel_crc32_1word_vpmsumb");
}
--- 4447,4464 ----
// 5. calculate remaining
cmpdi(CCR0, postalign, 0);
beq(CCR0, L_tail);
! update_byteLoop_crc32(crc, buf, postalign, table, t2, false);
BIND(L_tail);
// 6. ~c
! if (invertCRC) {
! nand(crc, crc, crc); // 1s complement of crc
! }
BIND(L_end);
BLOCK_COMMENT("} kernel_crc32_1word_vpmsumb");
}
*** 4931,4950 ****
offsetInt -= 8; ld(R29, offsetInt, R1_SP);
offsetInt -= 8; ld(R30, offsetInt, R1_SP);
offsetInt -= 8; ld(R31, offsetInt, R1_SP);
}
! void MacroAssembler::kernel_crc32_singleByte(Register crc, Register buf, Register len, Register table, Register tmp) {
assert_different_registers(crc, buf, /* len, not used!! */ table, tmp);
BLOCK_COMMENT("kernel_crc32_singleByte:");
! nand(crc, crc, crc); // ~c
lbz(tmp, 0, buf); // Byte from buffer, zero-extended.
update_byte_crc32(crc, tmp, table);
! nand(crc, crc, crc); // ~c
}
// dest_lo += src1 + src2
// dest_hi += carry1 + carry2
void MacroAssembler::add2_with_carry(Register dest_hi,
--- 4946,4984 ----
offsetInt -= 8; ld(R29, offsetInt, R1_SP);
offsetInt -= 8; ld(R30, offsetInt, R1_SP);
offsetInt -= 8; ld(R31, offsetInt, R1_SP);
}
! void MacroAssembler::kernel_crc32_singleByte(Register crc, Register buf, Register len, Register table, Register tmp, bool invertCRC) {
assert_different_registers(crc, buf, /* len, not used!! */ table, tmp);
BLOCK_COMMENT("kernel_crc32_singleByte:");
! if (invertCRC) {
! nand(crc, crc, crc); // 1s complement of crc
! }
lbz(tmp, 0, buf); // Byte from buffer, zero-extended.
update_byte_crc32(crc, tmp, table);
! if (invertCRC) {
! nand(crc, crc, crc); // 1s complement of crc
! }
! }
!
! void MacroAssembler::kernel_crc32_singleByteReg(Register crc, Register val, Register table, bool invertCRC) {
! assert_different_registers(crc, val, table);
!
! BLOCK_COMMENT("kernel_crc32_singleByteReg:");
! if (invertCRC) {
! nand(crc, crc, crc); // 1s complement of crc
! }
!
! update_byte_crc32(crc, val, table);
!
! if (invertCRC) {
! nand(crc, crc, crc); // 1s complement of crc
! }
}
// dest_lo += src1 + src2
// dest_hi += carry1 + carry2
void MacroAssembler::add2_with_carry(Register dest_hi,
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