1 /*
   2  * Copyright (c) 2016, 2017, Oracle and/or its affiliates. All rights reserved.
   3  * Copyright (c) 2016, 2017, SAP SE. All rights reserved.
   4  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   5  *
   6  * This code is free software; you can redistribute it and/or modify it
   7  * under the terms of the GNU General Public License version 2 only, as
   8  * published by the Free Software Foundation.
   9  *
  10  * This code is distributed in the hope that it will be useful, but WITHOUT
  11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  13  * version 2 for more details (a copy is included in the LICENSE file that
  14  * accompanied this code).
  15  *
  16  * You should have received a copy of the GNU General Public License version
  17  * 2 along with this work; if not, write to the Free Software Foundation,
  18  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  19  *
  20  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  21  * or visit www.oracle.com if you need additional information or have any
  22  * questions.
  23  *
  24  */
  25 
  26 #include "precompiled.hpp"
  27 #include "c1/c1_Compilation.hpp"
  28 #include "c1/c1_FrameMap.hpp"
  29 #include "c1/c1_Instruction.hpp"
  30 #include "c1/c1_LIRAssembler.hpp"
  31 #include "c1/c1_LIRGenerator.hpp"
  32 #include "c1/c1_Runtime1.hpp"
  33 #include "c1/c1_ValueStack.hpp"
  34 #include "ci/ciArray.hpp"
  35 #include "ci/ciObjArrayKlass.hpp"
  36 #include "ci/ciTypeArrayKlass.hpp"
  37 #include "runtime/sharedRuntime.hpp"
  38 #include "runtime/stubRoutines.hpp"
  39 #include "vmreg_s390.inline.hpp"
  40 
  41 #ifdef ASSERT
  42 #define __ gen()->lir(__FILE__, __LINE__)->
  43 #else
  44 #define __ gen()->lir()->
  45 #endif
  46 
  47 void LIRItem::load_byte_item() {
  48   // Byte loads use same registers as other loads.
  49   load_item();
  50 }
  51 
  52 void LIRItem::load_nonconstant(int bits) {
  53   LIR_Opr r = value()->operand();
  54   if (_gen->can_inline_as_constant(value(), bits)) {
  55     if (!r->is_constant()) {
  56       r = LIR_OprFact::value_type(value()->type());
  57     }
  58     _result = r;
  59   } else {
  60     load_item();
  61   }
  62 }
  63 
  64 //--------------------------------------------------------------
  65 //               LIRGenerator
  66 //--------------------------------------------------------------
  67 
  68 LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::as_oop_opr(Z_EXC_OOP); }
  69 LIR_Opr LIRGenerator::exceptionPcOpr()  { return FrameMap::as_opr(Z_EXC_PC); }
  70 LIR_Opr LIRGenerator::divInOpr()        { return FrameMap::Z_R11_opr; }
  71 LIR_Opr LIRGenerator::divOutOpr()       { return FrameMap::Z_R11_opr; }
  72 LIR_Opr LIRGenerator::remOutOpr()       { return FrameMap::Z_R10_opr; }
  73 LIR_Opr LIRGenerator::ldivInOpr()       { return FrameMap::Z_R11_long_opr; }
  74 LIR_Opr LIRGenerator::ldivOutOpr()      { return FrameMap::Z_R11_long_opr; }
  75 LIR_Opr LIRGenerator::lremOutOpr()      { return FrameMap::Z_R10_long_opr; }
  76 LIR_Opr LIRGenerator::syncLockOpr()     { return new_register(T_INT); }
  77 LIR_Opr LIRGenerator::syncTempOpr()     { return FrameMap::Z_R13_opr; }
  78 LIR_Opr LIRGenerator::getThreadTemp()   { return LIR_OprFact::illegalOpr; }
  79 
  80 LIR_Opr LIRGenerator::result_register_for (ValueType* type, bool callee) {
  81   LIR_Opr opr;
  82   switch (type->tag()) {
  83     case intTag:    opr = FrameMap::Z_R2_opr;        break;
  84     case objectTag: opr = FrameMap::Z_R2_oop_opr;    break;
  85     case longTag:   opr = FrameMap::Z_R2_long_opr;   break;
  86     case floatTag:  opr = FrameMap::Z_F0_opr;        break;
  87     case doubleTag: opr = FrameMap::Z_F0_double_opr; break;
  88 
  89     case addressTag:
  90     default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
  91   }
  92 
  93   assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch");
  94   return opr;
  95 }
  96 
  97 LIR_Opr LIRGenerator::rlock_byte(BasicType type) {
  98   return new_register(T_INT);
  99 }
 100 
 101 //--------- Loading items into registers. --------------------------------
 102 
 103 // z/Architecture cannot inline all constants.
 104 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const {
 105   if (v->type()->as_IntConstant() != NULL) {
 106     return Immediate::is_simm16(v->type()->as_IntConstant()->value());
 107   } else if (v->type()->as_LongConstant() != NULL) {
 108     return Immediate::is_simm16(v->type()->as_LongConstant()->value());
 109   } else if (v->type()->as_ObjectConstant() != NULL) {
 110     return v->type()->as_ObjectConstant()->value()->is_null_object();
 111   } else {
 112     return false;
 113   }
 114 }
 115 
 116 bool LIRGenerator::can_inline_as_constant(Value i, int bits) const {
 117   if (i->type()->as_IntConstant() != NULL) {
 118     return Assembler::is_simm(i->type()->as_IntConstant()->value(), bits);
 119   } else if (i->type()->as_LongConstant() != NULL) {
 120     return Assembler::is_simm(i->type()->as_LongConstant()->value(), bits);
 121   } else {
 122     return can_store_as_constant(i, as_BasicType(i->type()));
 123   }
 124 }
 125 
 126 bool LIRGenerator::can_inline_as_constant(LIR_Const* c) const {
 127   if (c->type() == T_INT) {
 128     return Immediate::is_simm20(c->as_jint());
 129   } else   if (c->type() == T_LONG) {
 130     return Immediate::is_simm20(c->as_jlong());
 131   }
 132   return false;
 133 }
 134 
 135 LIR_Opr LIRGenerator::safepoint_poll_register() {
 136   return new_register(longType);
 137 }
 138 
 139 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index,
 140                                             int shift, int disp, BasicType type) {
 141   assert(base->is_register(), "must be");
 142   if (index->is_constant()) {
 143     intptr_t large_disp = ((intx)(index->as_constant_ptr()->as_jint()) << shift) + disp;
 144     if (Displacement::is_validDisp(large_disp)) {
 145       return new LIR_Address(base, large_disp, type);
 146     }
 147     // Index is illegal so replace it with the displacement loaded into a register.
 148     index = new_pointer_register();
 149     __ move(LIR_OprFact::intptrConst(large_disp), index);
 150     return new LIR_Address(base, index, type);
 151   } else {
 152     if (shift > 0) {
 153       LIR_Opr tmp = new_pointer_register();
 154       __ shift_left(index, shift, tmp);
 155       index = tmp;
 156     }
 157     return new LIR_Address(base, index, disp, type);
 158   }
 159 }
 160 
 161 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr,
 162                                               BasicType type, bool needs_card_mark) {
 163   int elem_size = type2aelembytes(type);
 164   int shift = exact_log2(elem_size);
 165   int offset_in_bytes = arrayOopDesc::base_offset_in_bytes(type);
 166 
 167   LIR_Address* addr;
 168   if (index_opr->is_constant()) {
 169     addr = new LIR_Address(array_opr,
 170                            offset_in_bytes + (intx)(index_opr->as_jint()) * elem_size, type);
 171   } else {
 172     if (index_opr->type() == T_INT) {
 173       LIR_Opr tmp = new_register(T_LONG);
 174       __ convert(Bytecodes::_i2l, index_opr, tmp);
 175       index_opr = tmp;
 176     }
 177     if (shift > 0) {
 178       __ shift_left(index_opr, shift, index_opr);
 179     }
 180     addr = new LIR_Address(array_opr,
 181                            index_opr,
 182                            offset_in_bytes, type);
 183   }
 184   if (needs_card_mark) {
 185     // This store will need a precise card mark, so go ahead and
 186     // compute the full adddres instead of computing once for the
 187     // store and again for the card mark.
 188     LIR_Opr tmp = new_pointer_register();
 189     __ leal(LIR_OprFact::address(addr), tmp);
 190     return new LIR_Address(tmp, type);
 191   } else {
 192     return addr;
 193   }
 194 }
 195 
 196 LIR_Opr LIRGenerator::load_immediate(int x, BasicType type) {
 197   LIR_Opr r = LIR_OprFact::illegalOpr;
 198   if (type == T_LONG) {
 199     r = LIR_OprFact::longConst(x);
 200   } else if (type == T_INT) {
 201     r = LIR_OprFact::intConst(x);
 202   } else {
 203     ShouldNotReachHere();
 204   }
 205   return r;
 206 }
 207 
 208 void LIRGenerator::increment_counter(address counter, BasicType type, int step) {
 209   LIR_Opr pointer = new_pointer_register();
 210   __ move(LIR_OprFact::intptrConst(counter), pointer);
 211   LIR_Address* addr = new LIR_Address(pointer, type);
 212   increment_counter(addr, step);
 213 }
 214 
 215 void LIRGenerator::increment_counter(LIR_Address* addr, int step) {
 216   __ add((LIR_Opr)addr, LIR_OprFact::intConst(step), (LIR_Opr)addr);
 217 }
 218 
 219 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
 220   LIR_Opr scratch = FrameMap::Z_R1_opr;
 221   __ load(new LIR_Address(base, disp, T_INT), scratch, info);
 222   __ cmp(condition, scratch, c);
 223 }
 224 
 225 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) {
 226   __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info);
 227 }
 228 
 229 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, LIR_Opr disp, BasicType type, CodeEmitInfo* info) {
 230   __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info);
 231 }
 232 
 233 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, int c, LIR_Opr result, LIR_Opr tmp) {
 234   if (tmp->is_valid()) {
 235     if (is_power_of_2(c + 1)) {
 236       __ move(left, tmp);
 237       __ shift_left(left, log2_intptr(c + 1), left);
 238       __ sub(left, tmp, result);
 239       return true;
 240     } else if (is_power_of_2(c - 1)) {
 241       __ move(left, tmp);
 242       __ shift_left(left, log2_intptr(c - 1), left);
 243       __ add(left, tmp, result);
 244       return true;
 245     }
 246   }
 247   return false;
 248 }
 249 
 250 void LIRGenerator::store_stack_parameter (LIR_Opr item, ByteSize offset_from_sp) {
 251   BasicType type = item->type();
 252   __ store(item, new LIR_Address(FrameMap::Z_SP_opr, in_bytes(offset_from_sp), type));
 253 }
 254 
 255 //----------------------------------------------------------------------
 256 //             visitor functions
 257 //----------------------------------------------------------------------
 258 
 259 void LIRGenerator::do_StoreIndexed(StoreIndexed* x) {
 260   assert(x->is_pinned(),"");
 261   bool needs_range_check = x->compute_needs_range_check();
 262   bool use_length = x->length() != NULL;
 263   bool obj_store = x->elt_type() == T_ARRAY || x->elt_type() == T_OBJECT;
 264   bool needs_store_check = obj_store && (x->value()->as_Constant() == NULL ||
 265                                          !get_jobject_constant(x->value())->is_null_object() ||
 266                                          x->should_profile());
 267 
 268   LIRItem array(x->array(), this);
 269   LIRItem index(x->index(), this);
 270   LIRItem value(x->value(), this);
 271   LIRItem length(this);
 272 
 273   array.load_item();
 274   index.load_nonconstant(20);
 275 
 276   if (use_length && needs_range_check) {
 277     length.set_instruction(x->length());
 278     length.load_item();
 279   }
 280   if (needs_store_check) {
 281     value.load_item();
 282   } else {
 283     value.load_for_store(x->elt_type());
 284   }
 285 
 286   set_no_result(x);
 287 
 288   // The CodeEmitInfo must be duplicated for each different
 289   // LIR-instruction because spilling can occur anywhere between two
 290   // instructions and so the debug information must be different.
 291   CodeEmitInfo* range_check_info = state_for (x);
 292   CodeEmitInfo* null_check_info = NULL;
 293   if (x->needs_null_check()) {
 294     null_check_info = new CodeEmitInfo(range_check_info);
 295   }
 296 
 297   // Emit array address setup early so it schedules better.
 298   LIR_Address* array_addr = emit_array_address(array.result(), index.result(), x->elt_type(), obj_store);
 299   if (value.result()->is_constant() && array_addr->index()->is_valid()) {
 300     // Constants cannot be stored with index register on ZARCH_64 (see LIR_Assembler::const2mem()).
 301     LIR_Opr tmp = new_pointer_register();
 302     __ leal(LIR_OprFact::address(array_addr), tmp);
 303     array_addr = new LIR_Address(tmp, x->elt_type());
 304   }
 305 
 306   if (GenerateRangeChecks && needs_range_check) {
 307     if (use_length) {
 308       __ cmp(lir_cond_belowEqual, length.result(), index.result());
 309       __ branch(lir_cond_belowEqual, T_INT, new RangeCheckStub(range_check_info, index.result()));
 310     } else {
 311       array_range_check(array.result(), index.result(), null_check_info, range_check_info);
 312       // Range_check also does the null check.
 313       null_check_info = NULL;
 314     }
 315   }
 316 
 317   if (GenerateArrayStoreCheck && needs_store_check) {
 318     LIR_Opr tmp1 = new_register(objectType);
 319     LIR_Opr tmp2 = new_register(objectType);
 320     LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
 321 
 322     CodeEmitInfo* store_check_info = new CodeEmitInfo(range_check_info);
 323     __ store_check(value.result(), array.result(), tmp1, tmp2, tmp3, store_check_info, x->profiled_method(), x->profiled_bci());
 324   }
 325 
 326   if (obj_store) {
 327     // Needs GC write barriers.
 328     pre_barrier(LIR_OprFact::address(array_addr), LIR_OprFact::illegalOpr /* pre_val */,
 329                 true /* do_load */, false /* patch */, NULL);
 330     __ move(value.result(), array_addr, null_check_info);
 331     // Seems to be a precise.
 332     post_barrier(LIR_OprFact::address(array_addr), value.result());
 333   } else {
 334     __ move(value.result(), array_addr, null_check_info);
 335   }
 336 }
 337 
 338 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) {
 339   assert(x->is_pinned(),"");
 340   LIRItem obj(x->obj(), this);
 341   obj.load_item();
 342 
 343   set_no_result(x);
 344 
 345   // "lock" stores the address of the monitor stack slot, so this is not an oop.
 346   LIR_Opr lock = new_register(T_INT);
 347 
 348   CodeEmitInfo* info_for_exception = NULL;
 349   if (x->needs_null_check()) {
 350     info_for_exception = state_for (x);
 351   }
 352   // This CodeEmitInfo must not have the xhandlers because here the
 353   // object is already locked (xhandlers expect object to be unlocked).
 354   CodeEmitInfo* info = state_for (x, x->state(), true);
 355   monitor_enter(obj.result(), lock, syncTempOpr(), LIR_OprFact::illegalOpr,
 356                 x->monitor_no(), info_for_exception, info);
 357 }
 358 
 359 void LIRGenerator::do_MonitorExit(MonitorExit* x) {
 360   assert(x->is_pinned(),"");
 361 
 362   LIRItem obj(x->obj(), this);
 363   obj.dont_load_item();
 364 
 365   LIR_Opr lock = new_register(T_INT);
 366   LIR_Opr obj_temp = new_register(T_INT);
 367   set_no_result(x);
 368   monitor_exit(obj_temp, lock, syncTempOpr(), LIR_OprFact::illegalOpr, x->monitor_no());
 369 }
 370 
 371 // _ineg, _lneg, _fneg, _dneg
 372 void LIRGenerator::do_NegateOp(NegateOp* x) {
 373   LIRItem value(x->x(), this);
 374   value.load_item();
 375   LIR_Opr reg = rlock_result(x);
 376   __ negate(value.result(), reg);
 377 }
 378 
 379 // for _fadd, _fmul, _fsub, _fdiv, _frem
 380 //     _dadd, _dmul, _dsub, _ddiv, _drem
 381 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) {
 382   LIRItem left(x->x(),  this);
 383   LIRItem right(x->y(), this);
 384   LIRItem* left_arg  = &left;
 385   LIRItem* right_arg = &right;
 386   assert(!left.is_stack(), "can't both be memory operands");
 387   left.load_item();
 388 
 389   if (right.is_register() || right.is_constant()) {
 390     right.load_item();
 391   } else {
 392     right.dont_load_item();
 393   }
 394 
 395   if ((x->op() == Bytecodes::_frem) || (x->op() == Bytecodes::_drem)) {
 396     address entry;
 397     switch (x->op()) {
 398     case Bytecodes::_frem:
 399       entry = CAST_FROM_FN_PTR(address, SharedRuntime::frem);
 400       break;
 401     case Bytecodes::_drem:
 402       entry = CAST_FROM_FN_PTR(address, SharedRuntime::drem);
 403       break;
 404     default:
 405       ShouldNotReachHere();
 406     }
 407     LIR_Opr result = call_runtime(x->x(), x->y(), entry, x->type(), NULL);
 408     set_result(x, result);
 409   } else {
 410     LIR_Opr reg = rlock(x);
 411     LIR_Opr tmp = LIR_OprFact::illegalOpr;
 412     arithmetic_op_fpu(x->op(), reg, left.result(), right.result(), x->is_strictfp(), tmp);
 413     set_result(x, reg);
 414   }
 415 }
 416 
 417 // for _ladd, _lmul, _lsub, _ldiv, _lrem
 418 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) {
 419   if (x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem) {
 420     // Use shifts if divisior is a power of 2 otherwise use DSGR instruction.
 421     // Instruction: DSGR R1, R2
 422     // input : R1+1: dividend   (R1, R1+1 designate a register pair, R1 must be even)
 423     //         R2:   divisor
 424     //
 425     // output: R1+1: quotient
 426     //         R1:   remainder
 427     //
 428     // Register selection: R1:   Z_R10
 429     //                     R1+1: Z_R11
 430     //                     R2:   to be chosen by register allocator (linear scan)
 431 
 432     // R1, and R1+1 will be destroyed.
 433 
 434     LIRItem right(x->y(), this);
 435     LIRItem left(x->x() , this);   // Visit left second, so that the is_register test is valid.
 436 
 437     // Call state_for before load_item_force because state_for may
 438     // force the evaluation of other instructions that are needed for
 439     // correct debug info. Otherwise the live range of the fix
 440     // register might be too long.
 441     CodeEmitInfo* info = state_for (x);
 442 
 443     LIR_Opr result = rlock_result(x);
 444     LIR_Opr result_reg = result;
 445     LIR_Opr tmp = LIR_OprFact::illegalOpr;
 446     LIR_Opr divisor_opr = right.result();
 447     if (divisor_opr->is_constant() && is_power_of_2(divisor_opr->as_jlong())) {
 448       left.load_item();
 449       right.dont_load_item();
 450     } else {
 451       left.load_item_force(ldivInOpr());
 452       right.load_item();
 453 
 454       // DSGR instruction needs register pair.
 455       if (x->op() == Bytecodes::_ldiv) {
 456         result_reg = ldivOutOpr();
 457         tmp        = lremOutOpr();
 458       } else {
 459         result_reg = lremOutOpr();
 460         tmp        = ldivOutOpr();
 461       }
 462     }
 463 
 464     if (!ImplicitDiv0Checks) {
 465       __ cmp(lir_cond_equal, right.result(), LIR_OprFact::longConst(0));
 466       __ branch(lir_cond_equal, T_LONG, new DivByZeroStub(info));
 467       // Idiv/irem cannot trap (passing info would generate an assertion).
 468       info = NULL;
 469     }
 470 
 471     if (x->op() == Bytecodes::_lrem) {
 472       __ irem(left.result(), right.result(), result_reg, tmp, info);
 473     } else if (x->op() == Bytecodes::_ldiv) {
 474       __ idiv(left.result(), right.result(), result_reg, tmp, info);
 475     } else {
 476       ShouldNotReachHere();
 477     }
 478 
 479     if (result_reg != result) {
 480       __ move(result_reg, result);
 481     }
 482   } else {
 483     LIRItem left(x->x(), this);
 484     LIRItem right(x->y(), this);
 485 
 486     left.load_item();
 487     right.load_nonconstant(32);
 488     rlock_result(x);
 489     arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), NULL);
 490   }
 491 }
 492 
 493 // for: _iadd, _imul, _isub, _idiv, _irem
 494 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) {
 495   if (x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem) {
 496     // Use shifts if divisior is a power of 2 otherwise use DSGFR instruction.
 497     // Instruction: DSGFR R1, R2
 498     // input : R1+1: dividend   (R1, R1+1 designate a register pair, R1 must be even)
 499     //         R2:   divisor
 500     //
 501     // output: R1+1: quotient
 502     //         R1:   remainder
 503     //
 504     // Register selection: R1:   Z_R10
 505     //                     R1+1: Z_R11
 506     //                     R2:   To be chosen by register allocator (linear scan).
 507 
 508     // R1, and R1+1 will be destroyed.
 509 
 510     LIRItem right(x->y(), this);
 511     LIRItem left(x->x() , this);   // Visit left second, so that the is_register test is valid.
 512 
 513     // Call state_for before load_item_force because state_for may
 514     // force the evaluation of other instructions that are needed for
 515     // correct debug info. Otherwise the live range of the fix
 516     // register might be too long.
 517     CodeEmitInfo* info = state_for (x);
 518 
 519     LIR_Opr result = rlock_result(x);
 520     LIR_Opr result_reg = result;
 521     LIR_Opr tmp = LIR_OprFact::illegalOpr;
 522     LIR_Opr divisor_opr = right.result();
 523     if (divisor_opr->is_constant() && is_power_of_2(divisor_opr->as_jint())) {
 524       left.load_item();
 525       right.dont_load_item();
 526     } else {
 527       left.load_item_force(divInOpr());
 528       right.load_item();
 529 
 530       // DSGFR instruction needs register pair.
 531       if (x->op() == Bytecodes::_idiv) {
 532         result_reg = divOutOpr();
 533         tmp        = remOutOpr();
 534       } else {
 535         result_reg = remOutOpr();
 536         tmp        = divOutOpr();
 537       }
 538     }
 539 
 540     if (!ImplicitDiv0Checks) {
 541       __ cmp(lir_cond_equal, right.result(), LIR_OprFact::intConst(0));
 542       __ branch(lir_cond_equal, T_INT, new DivByZeroStub(info));
 543       // Idiv/irem cannot trap (passing info would generate an assertion).
 544       info = NULL;
 545     }
 546 
 547     if (x->op() == Bytecodes::_irem) {
 548       __ irem(left.result(), right.result(), result_reg, tmp, info);
 549     } else if (x->op() == Bytecodes::_idiv) {
 550       __ idiv(left.result(), right.result(), result_reg, tmp, info);
 551     } else {
 552       ShouldNotReachHere();
 553     }
 554 
 555     if (result_reg != result) {
 556       __ move(result_reg, result);
 557     }
 558   } else {
 559     LIRItem left(x->x(),  this);
 560     LIRItem right(x->y(), this);
 561     LIRItem* left_arg = &left;
 562     LIRItem* right_arg = &right;
 563     if (x->is_commutative() && left.is_stack() && right.is_register()) {
 564       // swap them if left is real stack (or cached) and right is real register(not cached)
 565       left_arg = &right;
 566       right_arg = &left;
 567     }
 568 
 569     left_arg->load_item();
 570 
 571     // Do not need to load right, as we can handle stack and constants.
 572     if (x->op() == Bytecodes::_imul) {
 573       bool use_tmp = false;
 574       if (right_arg->is_constant()) {
 575         int iconst = right_arg->get_jint_constant();
 576         if (is_power_of_2(iconst - 1) || is_power_of_2(iconst + 1)) {
 577           use_tmp = true;
 578         }
 579       }
 580       right_arg->dont_load_item();
 581       LIR_Opr tmp = LIR_OprFact::illegalOpr;
 582       if (use_tmp) {
 583         tmp = new_register(T_INT);
 584       }
 585       rlock_result(x);
 586 
 587       arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
 588     } else {
 589       right_arg->dont_load_item();
 590       rlock_result(x);
 591       LIR_Opr tmp = LIR_OprFact::illegalOpr;
 592       arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
 593     }
 594   }
 595 }
 596 
 597 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) {
 598   // If an operand with use count 1 is the left operand, then it is
 599   // likely that no move for 2-operand-LIR-form is necessary.
 600   if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) {
 601     x->swap_operands();
 602   }
 603 
 604   ValueTag tag = x->type()->tag();
 605   assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters");
 606   switch (tag) {
 607     case floatTag:
 608     case doubleTag: do_ArithmeticOp_FPU(x);  return;
 609     case longTag:   do_ArithmeticOp_Long(x); return;
 610     case intTag:    do_ArithmeticOp_Int(x);  return;
 611   }
 612   ShouldNotReachHere();
 613 }
 614 
 615 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr
 616 void LIRGenerator::do_ShiftOp(ShiftOp* x) {
 617   // count must always be in rcx
 618   LIRItem value(x->x(), this);
 619   LIRItem count(x->y(), this);
 620 
 621   ValueTag elemType = x->type()->tag();
 622   bool must_load_count = !count.is_constant();
 623   if (must_load_count) {
 624     count.load_item();
 625   } else {
 626     count.dont_load_item();
 627   }
 628   value.load_item();
 629   LIR_Opr reg = rlock_result(x);
 630 
 631   shift_op(x->op(), reg, value.result(), count.result(), LIR_OprFact::illegalOpr);
 632 }
 633 
 634 // _iand, _land, _ior, _lor, _ixor, _lxor
 635 void LIRGenerator::do_LogicOp(LogicOp* x) {
 636   // IF an operand with use count 1 is the left operand, then it is
 637   // likely that no move for 2-operand-LIR-form is necessary.
 638   if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) {
 639     x->swap_operands();
 640   }
 641 
 642   LIRItem left(x->x(), this);
 643   LIRItem right(x->y(), this);
 644 
 645   left.load_item();
 646   right.load_nonconstant(32);
 647   LIR_Opr reg = rlock_result(x);
 648 
 649   logic_op(x->op(), reg, left.result(), right.result());
 650 }
 651 
 652 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg
 653 void LIRGenerator::do_CompareOp(CompareOp* x) {
 654   LIRItem left(x->x(), this);
 655   LIRItem right(x->y(), this);
 656   left.load_item();
 657   right.load_item();
 658   LIR_Opr reg = rlock_result(x);
 659   if (x->x()->type()->is_float_kind()) {
 660     Bytecodes::Code code = x->op();
 661     __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl));
 662   } else if (x->x()->type()->tag() == longTag) {
 663     __ lcmp2int(left.result(), right.result(), reg);
 664   } else {
 665     ShouldNotReachHere();
 666   }
 667 }
 668 
 669 void LIRGenerator::do_CompareAndSwap(Intrinsic* x, ValueType* type) {
 670   assert(x->number_of_arguments() == 4, "wrong type");
 671   LIRItem obj   (x->argument_at(0), this);  // object
 672   LIRItem offset(x->argument_at(1), this);  // offset of field
 673   LIRItem cmp   (x->argument_at(2), this);  // Value to compare with field.
 674   LIRItem val   (x->argument_at(3), this);  // Replace field with val if matches cmp.
 675 
 676   // Get address of field.
 677   obj.load_item();
 678   offset.load_nonconstant(20);
 679   cmp.load_item();
 680   val.load_item();
 681 
 682   LIR_Opr addr = new_pointer_register();
 683   LIR_Address* a;
 684   if (offset.result()->is_constant()) {
 685     assert(Immediate::is_simm20(offset.result()->as_jlong()), "should have been loaded into register");
 686     a = new LIR_Address(obj.result(),
 687                         offset.result()->as_jlong(),
 688                         as_BasicType(type));
 689   } else {
 690     a = new LIR_Address(obj.result(),
 691                         offset.result(),
 692                         0,
 693                         as_BasicType(type));
 694   }
 695   __ leal(LIR_OprFact::address(a), addr);
 696 
 697   if (type == objectType) {  // Write-barrier needed for Object fields.
 698     pre_barrier(addr, LIR_OprFact::illegalOpr /* pre_val */,
 699                 true /* do_load */, false /* patch */, NULL);
 700   }
 701 
 702   LIR_Opr ill = LIR_OprFact::illegalOpr;  // for convenience
 703   if (type == objectType) {
 704     __ cas_obj(addr, cmp.result(), val.result(), new_register(T_OBJECT), new_register(T_OBJECT));
 705   } else if (type == intType) {
 706     __ cas_int(addr, cmp.result(), val.result(), ill, ill);
 707   } else if (type == longType) {
 708     __ cas_long(addr, cmp.result(), val.result(), ill, ill);
 709   } else {
 710     ShouldNotReachHere();
 711   }
 712   // Generate conditional move of boolean result.
 713   LIR_Opr result = rlock_result(x);
 714   __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0),
 715            result, as_BasicType(type));
 716   if (type == objectType) {  // Write-barrier needed for Object fields.
 717     // Precise card mark since could either be object or array
 718     post_barrier(addr, val.result());
 719   }
 720 }
 721 
 722 
 723 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) {
 724   switch (x->id()) {
 725     case vmIntrinsics::_dabs:
 726     case vmIntrinsics::_dsqrt: {
 727       assert(x->number_of_arguments() == 1, "wrong type");
 728       LIRItem value(x->argument_at(0), this);
 729       value.load_item();
 730       LIR_Opr dst = rlock_result(x);
 731 
 732       switch (x->id()) {
 733       case vmIntrinsics::_dsqrt: {
 734         __ sqrt(value.result(), dst, LIR_OprFact::illegalOpr);
 735         break;
 736       }
 737       case vmIntrinsics::_dabs: {
 738         __ abs(value.result(), dst, LIR_OprFact::illegalOpr);
 739         break;
 740       }
 741       }
 742       break;
 743     }
 744     case vmIntrinsics::_dlog10: // fall through
 745     case vmIntrinsics::_dlog: // fall through
 746     case vmIntrinsics::_dsin: // fall through
 747     case vmIntrinsics::_dtan: // fall through
 748     case vmIntrinsics::_dcos: // fall through
 749     case vmIntrinsics::_dexp: {
 750       assert(x->number_of_arguments() == 1, "wrong type");
 751 
 752       address runtime_entry = NULL;
 753       switch (x->id()) {
 754       case vmIntrinsics::_dsin:
 755         runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dsin);
 756         break;
 757       case vmIntrinsics::_dcos:
 758         runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dcos);
 759         break;
 760       case vmIntrinsics::_dtan:
 761         runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dtan);
 762         break;
 763       case vmIntrinsics::_dlog:
 764         runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dlog);
 765         break;
 766       case vmIntrinsics::_dlog10:
 767         runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dlog10);
 768         break;
 769       case vmIntrinsics::_dexp:
 770         runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dexp);
 771         break;
 772       default:
 773         ShouldNotReachHere();
 774       }
 775 
 776       LIR_Opr result = call_runtime(x->argument_at(0), runtime_entry, x->type(), NULL);
 777       set_result(x, result);
 778       break;
 779     }
 780     case vmIntrinsics::_dpow: {
 781       assert(x->number_of_arguments() == 2, "wrong type");
 782       address runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dpow);
 783       LIR_Opr result = call_runtime(x->argument_at(0), x->argument_at(1), runtime_entry, x->type(), NULL);
 784       set_result(x, result);
 785       break;
 786     }
 787   }
 788 }
 789 
 790 void LIRGenerator::do_ArrayCopy(Intrinsic* x) {
 791   assert(x->number_of_arguments() == 5, "wrong type");
 792 
 793   // Copy stubs possibly call C code, e.g. G1 barriers, so we need to reserve room
 794   // for the C ABI (see frame::z_abi_160).
 795   BasicTypeArray sig; // Empty signature is precise enough.
 796   frame_map()->c_calling_convention(&sig);
 797 
 798   // Make all state_for calls early since they can emit code.
 799   CodeEmitInfo* info = state_for (x, x->state());
 800 
 801   LIRItem src(x->argument_at(0), this);
 802   LIRItem src_pos(x->argument_at(1), this);
 803   LIRItem dst(x->argument_at(2), this);
 804   LIRItem dst_pos(x->argument_at(3), this);
 805   LIRItem length(x->argument_at(4), this);
 806 
 807   // Operands for arraycopy must use fixed registers, otherwise
 808   // LinearScan will fail allocation (because arraycopy always needs a
 809   // call).
 810 
 811   src.load_item_force     (FrameMap::as_oop_opr(Z_ARG1));
 812   src_pos.load_item_force (FrameMap::as_opr(Z_ARG2));
 813   dst.load_item_force     (FrameMap::as_oop_opr(Z_ARG3));
 814   dst_pos.load_item_force (FrameMap::as_opr(Z_ARG4));
 815   length.load_item_force  (FrameMap::as_opr(Z_ARG5));
 816 
 817   LIR_Opr tmp =            FrameMap::as_opr(Z_R7);
 818 
 819   set_no_result(x);
 820 
 821   int flags;
 822   ciArrayKlass* expected_type;
 823   arraycopy_helper(x, &flags, &expected_type);
 824 
 825   __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(),
 826                length.result(), tmp, expected_type, flags, info); // does add_safepoint
 827 }
 828 
 829 // _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f
 830 // _i2b, _i2c, _i2s
 831 void LIRGenerator::do_Convert(Convert* x) {
 832   LIRItem value(x->value(), this);
 833 
 834   value.load_item();
 835   LIR_Opr reg = rlock_result(x);
 836   __ convert(x->op(), value.result(), reg);
 837 }
 838 
 839 void LIRGenerator::do_NewInstance(NewInstance* x) {
 840   print_if_not_loaded(x);
 841 
 842   // This instruction can be deoptimized in the slow path : use
 843   // Z_R2 as result register.
 844   const LIR_Opr reg = result_register_for (x->type());
 845 
 846   CodeEmitInfo* info = state_for (x, x->state());
 847   LIR_Opr tmp1 = FrameMap::Z_R12_oop_opr;
 848   LIR_Opr tmp2 = FrameMap::Z_R13_oop_opr;
 849   LIR_Opr tmp3 = reg;
 850   LIR_Opr tmp4 = LIR_OprFact::illegalOpr;
 851   LIR_Opr klass_reg = FrameMap::Z_R11_metadata_opr;
 852   new_instance(reg, x->klass(), x->is_unresolved(), tmp1, tmp2, tmp3, tmp4, klass_reg, info);
 853   LIR_Opr result = rlock_result(x);
 854   __ move(reg, result);
 855 }
 856 
 857 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) {
 858   CodeEmitInfo* info = state_for (x, x->state());
 859 
 860   LIRItem length(x->length(), this);
 861   length.load_item();
 862 
 863   LIR_Opr reg = result_register_for (x->type());
 864   LIR_Opr tmp1 = FrameMap::Z_R12_oop_opr;
 865   LIR_Opr tmp2 = FrameMap::Z_R13_oop_opr;
 866   LIR_Opr tmp3 = reg;
 867   LIR_Opr tmp4 = LIR_OprFact::illegalOpr;
 868   LIR_Opr klass_reg = FrameMap::Z_R11_metadata_opr;
 869   LIR_Opr len = length.result();
 870   BasicType elem_type = x->elt_type();
 871 
 872   __ metadata2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg);
 873 
 874   CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info);
 875   __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path);
 876 
 877   LIR_Opr result = rlock_result(x);
 878   __ move(reg, result);
 879 }
 880 
 881 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) {
 882   // Evaluate state_for early since it may emit code.
 883   CodeEmitInfo* info = state_for (x, x->state());
 884   // In case of patching (i.e., object class is not yet loaded), we need to reexecute the instruction
 885   // and therefore provide the state before the parameters have been consumed.
 886   CodeEmitInfo* patching_info = NULL;
 887   if (!x->klass()->is_loaded() || PatchALot) {
 888     patching_info = state_for (x, x->state_before());
 889   }
 890 
 891   LIRItem length(x->length(), this);
 892   length.load_item();
 893 
 894   const LIR_Opr reg = result_register_for (x->type());
 895   LIR_Opr tmp1 = FrameMap::Z_R12_oop_opr;
 896   LIR_Opr tmp2 = FrameMap::Z_R13_oop_opr;
 897   LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
 898   LIR_Opr tmp4 = LIR_OprFact::illegalOpr;
 899   LIR_Opr klass_reg = FrameMap::Z_R11_metadata_opr;
 900   LIR_Opr len = length.result();
 901 
 902   CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info);
 903   ciKlass* obj = ciObjArrayKlass::make(x->klass());
 904   if (obj == ciEnv::unloaded_ciobjarrayklass()) {
 905     BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error");
 906   }
 907   klass2reg_with_patching(klass_reg, obj, patching_info);
 908   __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path);
 909 
 910   LIR_Opr result = rlock_result(x);
 911   __ move(reg, result);
 912 }
 913 
 914 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) {
 915   Values* dims = x->dims();
 916   int i = dims->length();
 917   LIRItemList* items = new LIRItemList(i, i, NULL);
 918   while (i-- > 0) {
 919     LIRItem* size = new LIRItem(dims->at(i), this);
 920     items->at_put(i, size);
 921   }
 922 
 923   // Evaluate state_for early since it may emit code.
 924   CodeEmitInfo* patching_info = NULL;
 925   if (!x->klass()->is_loaded() || PatchALot) {
 926     patching_info = state_for (x, x->state_before());
 927 
 928     // Cannot re-use same xhandlers for multiple CodeEmitInfos, so
 929     // clone all handlers (NOTE: Usually this is handled transparently
 930     // by the CodeEmitInfo cloning logic in CodeStub constructors but
 931     // is done explicitly here because a stub isn't being used).
 932     x->set_exception_handlers(new XHandlers(x->exception_handlers()));
 933   }
 934   CodeEmitInfo* info = state_for (x, x->state());
 935 
 936   i = dims->length();
 937   while (--i >= 0) {
 938     LIRItem* size = items->at(i);
 939     size->load_nonconstant(32);
 940     // FrameMap::_reserved_argument_area_size includes the dimensions varargs, because
 941     // it's initialized to hir()->max_stack() when the FrameMap is created.
 942     store_stack_parameter(size->result(), in_ByteSize(i*sizeof(jint) + FrameMap::first_available_sp_in_frame));
 943   }
 944 
 945   LIR_Opr klass_reg = FrameMap::Z_R3_metadata_opr;
 946   klass2reg_with_patching(klass_reg, x->klass(), patching_info);
 947 
 948   LIR_Opr rank = FrameMap::Z_R4_opr;
 949   __ move(LIR_OprFact::intConst(x->rank()), rank);
 950   LIR_Opr varargs = FrameMap::Z_R5_opr;
 951   __ leal(LIR_OprFact::address(new LIR_Address(FrameMap::Z_SP_opr, FrameMap::first_available_sp_in_frame, T_INT)),
 952           varargs);
 953   LIR_OprList* args = new LIR_OprList(3);
 954   args->append(klass_reg);
 955   args->append(rank);
 956   args->append(varargs);
 957   LIR_Opr reg = result_register_for (x->type());
 958   __ call_runtime(Runtime1::entry_for (Runtime1::new_multi_array_id),
 959                   LIR_OprFact::illegalOpr,
 960                   reg, args, info);
 961 
 962   LIR_Opr result = rlock_result(x);
 963   __ move(reg, result);
 964 }
 965 
 966 void LIRGenerator::do_BlockBegin(BlockBegin* x) {
 967   // Nothing to do.
 968 }
 969 
 970 void LIRGenerator::do_CheckCast(CheckCast* x) {
 971   LIRItem obj(x->obj(), this);
 972 
 973   CodeEmitInfo* patching_info = NULL;
 974   if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check())) {
 975     // Must do this before locking the destination register as an oop register,
 976     // and before the obj is loaded (the latter is for deoptimization).
 977     patching_info = state_for (x, x->state_before());
 978   }
 979   obj.load_item();
 980 
 981   // info for exceptions
 982   CodeEmitInfo* info_for_exception = state_for (x);
 983 
 984   CodeStub* stub;
 985   if (x->is_incompatible_class_change_check()) {
 986     assert(patching_info == NULL, "can't patch this");
 987     stub = new SimpleExceptionStub(Runtime1::throw_incompatible_class_change_error_id, LIR_OprFact::illegalOpr, info_for_exception);
 988   } else {
 989     stub = new SimpleExceptionStub(Runtime1::throw_class_cast_exception_id, obj.result(), info_for_exception);
 990   }
 991   LIR_Opr reg = rlock_result(x);
 992   LIR_Opr tmp1 = new_register(objectType);
 993   LIR_Opr tmp2 = new_register(objectType);
 994   LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
 995   __ checkcast(reg, obj.result(), x->klass(),
 996                tmp1, tmp2, tmp3,
 997                x->direct_compare(), info_for_exception, patching_info, stub,
 998                x->profiled_method(), x->profiled_bci());
 999 }
1000 
1001 
1002 void LIRGenerator::do_InstanceOf(InstanceOf* x) {
1003   LIRItem obj(x->obj(), this);
1004   CodeEmitInfo* patching_info = NULL;
1005   if (!x->klass()->is_loaded() || PatchALot) {
1006     patching_info = state_for (x, x->state_before());
1007   }
1008   // Ensure the result register is not the input register because the
1009   // result is initialized before the patching safepoint.
1010   obj.load_item();
1011   LIR_Opr out_reg = rlock_result(x);
1012   LIR_Opr tmp1 = new_register(objectType);
1013   LIR_Opr tmp2 = new_register(objectType);
1014   LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
1015   __ instanceof(out_reg, obj.result(), x->klass(), tmp1, tmp2, tmp3,
1016                 x->direct_compare(), patching_info,
1017                 x->profiled_method(), x->profiled_bci());
1018 }
1019 
1020 
1021 void LIRGenerator::do_If (If* x) {
1022   assert(x->number_of_sux() == 2, "inconsistency");
1023   ValueTag tag = x->x()->type()->tag();
1024   bool is_safepoint = x->is_safepoint();
1025 
1026   If::Condition cond = x->cond();
1027 
1028   LIRItem xitem(x->x(), this);
1029   LIRItem yitem(x->y(), this);
1030   LIRItem* xin = &xitem;
1031   LIRItem* yin = &yitem;
1032 
1033   if (tag == longTag) {
1034     // For longs, only conditions "eql", "neq", "lss", "geq" are valid;
1035     // mirror for other conditions.
1036     if (cond == If::gtr || cond == If::leq) {
1037       cond = Instruction::mirror(cond);
1038       xin = &yitem;
1039       yin = &xitem;
1040     }
1041     xin->set_destroys_register();
1042   }
1043   xin->load_item();
1044   // TODO: don't load long constants != 0L
1045   if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 && (cond == If::eql || cond == If::neq)) {
1046     // inline long zero
1047     yin->dont_load_item();
1048   } else if (tag == longTag || tag == floatTag || tag == doubleTag) {
1049     // Longs cannot handle constants at right side.
1050     yin->load_item();
1051   } else {
1052     yin->dont_load_item();
1053   }
1054 
1055   // Add safepoint before generating condition code so it can be recomputed.
1056   if (x->is_safepoint()) {
1057     // Increment backedge counter if needed.
1058     increment_backedge_counter(state_for (x, x->state_before()), x->profiled_bci());
1059     // Use safepoint_poll_register() instead of LIR_OprFact::illegalOpr.
1060     __ safepoint(safepoint_poll_register(), state_for (x, x->state_before()));
1061   }
1062   set_no_result(x);
1063 
1064   LIR_Opr left = xin->result();
1065   LIR_Opr right = yin->result();
1066   __ cmp(lir_cond(cond), left, right);
1067   // Generate branch profiling. Profiling code doesn't kill flags.
1068   profile_branch(x, cond);
1069   move_to_phi(x->state());
1070   if (x->x()->type()->is_float_kind()) {
1071     __ branch(lir_cond(cond), right->type(), x->tsux(), x->usux());
1072   } else {
1073     __ branch(lir_cond(cond), right->type(), x->tsux());
1074   }
1075   assert(x->default_sux() == x->fsux(), "wrong destination above");
1076   __ jump(x->default_sux());
1077 }
1078 
1079 LIR_Opr LIRGenerator::getThreadPointer() {
1080   return FrameMap::as_pointer_opr(Z_thread);
1081 }
1082 
1083 void LIRGenerator::trace_block_entry(BlockBegin* block) {
1084   __ move(LIR_OprFact::intConst(block->block_id()), FrameMap::Z_R2_opr);
1085   LIR_OprList* args = new LIR_OprList(1);
1086   args->append(FrameMap::Z_R2_opr);
1087   address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry);
1088   __ call_runtime_leaf(func, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, args);
1089 }
1090 
1091 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address,
1092                                         CodeEmitInfo* info) {
1093   __ store(value, address, info);
1094 }
1095 
1096 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result,
1097                                        CodeEmitInfo* info) {
1098   __ load(address, result, info);
1099 }
1100 
1101 
1102 void LIRGenerator::put_Object_unsafe(LIR_Opr src, LIR_Opr offset, LIR_Opr data,
1103                                      BasicType type, bool is_volatile) {
1104   LIR_Address* addr = new LIR_Address(src, offset, type);
1105   bool is_obj = (type == T_ARRAY || type == T_OBJECT);
1106   if (is_obj) {
1107     // Do the pre-write barrier, if any.
1108     pre_barrier(LIR_OprFact::address(addr), LIR_OprFact::illegalOpr /* pre_val */,
1109                 true /* do_load */, false /* patch */, NULL);
1110     __ move(data, addr);
1111     assert(src->is_register(), "must be register");
1112     // Seems to be a precise address.
1113     post_barrier(LIR_OprFact::address(addr), data);
1114   } else {
1115     __ move(data, addr);
1116   }
1117 }
1118 
1119 
1120 void LIRGenerator::get_Object_unsafe(LIR_Opr dst, LIR_Opr src, LIR_Opr offset,
1121                                      BasicType type, bool is_volatile) {
1122   LIR_Address* addr = new LIR_Address(src, offset, type);
1123   __ load(addr, dst);
1124 }
1125 
1126 void LIRGenerator::do_UnsafeGetAndSetObject(UnsafeGetAndSetObject* x) {
1127   BasicType type = x->basic_type();
1128   assert (x->is_add() && type != T_ARRAY && type != T_OBJECT, "not supported");
1129   LIRItem src(x->object(), this);
1130   LIRItem off(x->offset(), this);
1131   LIRItem value(x->value(), this);
1132 
1133   src.load_item();
1134   value.load_item();
1135   off.load_nonconstant(20);
1136 
1137   LIR_Opr dst = rlock_result(x, type);
1138   LIR_Opr data = value.result();
1139   LIR_Opr offset = off.result();
1140 
1141   LIR_Address* addr;
1142   if (offset->is_constant()) {
1143     assert(Immediate::is_simm20(offset->as_jlong()), "should have been loaded into register");
1144     addr = new LIR_Address(src.result(), offset->as_jlong(), type);
1145   } else {
1146     addr = new LIR_Address(src.result(), offset, type);
1147   }
1148 
1149   __ xadd(LIR_OprFact::address(addr), data, dst, LIR_OprFact::illegalOpr);
1150 }
1151 
1152 void LIRGenerator::do_update_CRC32(Intrinsic* x) {
1153   assert(UseCRC32Intrinsics, "or should not be here");
1154   LIR_Opr result = rlock_result(x);
1155 
1156   switch (x->id()) {
1157     case vmIntrinsics::_updateCRC32: {
1158       LIRItem crc(x->argument_at(0), this);
1159       LIRItem val(x->argument_at(1), this);
1160       // Registers destroyed by update_crc32.
1161       crc.set_destroys_register();
1162       val.set_destroys_register();
1163       crc.load_item();
1164       val.load_item();
1165       __ update_crc32(crc.result(), val.result(), result);
1166       break;
1167     }
1168     case vmIntrinsics::_updateBytesCRC32:
1169     case vmIntrinsics::_updateByteBufferCRC32: {
1170       bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32);
1171 
1172       LIRItem crc(x->argument_at(0), this);
1173       LIRItem buf(x->argument_at(1), this);
1174       LIRItem off(x->argument_at(2), this);
1175       LIRItem len(x->argument_at(3), this);
1176       buf.load_item();
1177       off.load_nonconstant();
1178 
1179       LIR_Opr index = off.result();
1180       int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0;
1181       if (off.result()->is_constant()) {
1182         index = LIR_OprFact::illegalOpr;
1183         offset += off.result()->as_jint();
1184       }
1185       LIR_Opr base_op = buf.result();
1186 
1187       if (index->is_valid()) {
1188         LIR_Opr tmp = new_register(T_LONG);
1189         __ convert(Bytecodes::_i2l, index, tmp);
1190         index = tmp;
1191       }
1192 
1193       LIR_Address* a = new LIR_Address(base_op, index, offset, T_BYTE);
1194 
1195       BasicTypeList signature(3);
1196       signature.append(T_INT);
1197       signature.append(T_ADDRESS);
1198       signature.append(T_INT);
1199       CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1200       const LIR_Opr result_reg = result_register_for (x->type());
1201 
1202       LIR_Opr arg1 = cc->at(0);
1203       LIR_Opr arg2 = cc->at(1);
1204       LIR_Opr arg3 = cc->at(2);
1205 
1206       crc.load_item_force(arg1); // We skip int->long conversion here, because CRC32 stub doesn't care about high bits.
1207       __ leal(LIR_OprFact::address(a), arg2);
1208       len.load_item_force(arg3); // We skip int->long conversion here, because CRC32 stub expects int.
1209 
1210       __ call_runtime_leaf(StubRoutines::updateBytesCRC32(), LIR_OprFact::illegalOpr, result_reg, cc->args());
1211       __ move(result_reg, result);
1212       break;
1213     }
1214     default: {
1215       ShouldNotReachHere();
1216     }
1217   }
1218 }
1219 
1220 void LIRGenerator::do_update_CRC32C(Intrinsic* x) {
1221   assert(UseCRC32CIntrinsics, "or should not be here");
1222   LIR_Opr result = rlock_result(x);
1223 
1224   switch (x->id()) {
1225     case vmIntrinsics::_updateBytesCRC32C:
1226     case vmIntrinsics::_updateDirectByteBufferCRC32C: {
1227       bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32C);
1228 
1229       LIRItem crc(x->argument_at(0), this);
1230       LIRItem buf(x->argument_at(1), this);
1231       LIRItem off(x->argument_at(2), this);
1232       LIRItem end(x->argument_at(3), this);
1233       buf.load_item();
1234       off.load_nonconstant();
1235       end.load_nonconstant();
1236 
1237       // len = end - off
1238       LIR_Opr len  = end.result();
1239       LIR_Opr tmpA = new_register(T_INT);
1240       LIR_Opr tmpB = new_register(T_INT);
1241       __ move(end.result(), tmpA);
1242       __ move(off.result(), tmpB);
1243       __ sub(tmpA, tmpB, tmpA);
1244       len = tmpA;
1245 
1246       LIR_Opr index = off.result();
1247       int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0;
1248       if (off.result()->is_constant()) {
1249         index = LIR_OprFact::illegalOpr;
1250         offset += off.result()->as_jint();
1251       }
1252       LIR_Opr base_op = buf.result();
1253 
1254       if (index->is_valid()) {
1255         LIR_Opr tmp = new_register(T_LONG);
1256         __ convert(Bytecodes::_i2l, index, tmp);
1257         index = tmp;
1258       }
1259 
1260       LIR_Address* a = new LIR_Address(base_op, index, offset, T_BYTE);
1261 
1262       BasicTypeList signature(3);
1263       signature.append(T_INT);
1264       signature.append(T_ADDRESS);
1265       signature.append(T_INT);
1266       CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1267       const LIR_Opr result_reg = result_register_for (x->type());
1268 
1269       LIR_Opr arg1 = cc->at(0);
1270       LIR_Opr arg2 = cc->at(1);
1271       LIR_Opr arg3 = cc->at(2);
1272 
1273       crc.load_item_force(arg1); // We skip int->long conversion here, because CRC32C stub doesn't care about high bits.
1274       __ leal(LIR_OprFact::address(a), arg2);
1275       __ move(len, cc->at(2));   // We skip int->long conversion here, because CRC32C stub expects int.
1276 
1277       __ call_runtime_leaf(StubRoutines::updateBytesCRC32C(), LIR_OprFact::illegalOpr, result_reg, cc->args());
1278       __ move(result_reg, result);
1279       break;
1280     }
1281     default: {
1282       ShouldNotReachHere();
1283     }
1284   }
1285 }
1286 
1287 void LIRGenerator::do_FmaIntrinsic(Intrinsic* x) {
1288   assert(x->number_of_arguments() == 3, "wrong type");
1289   assert(UseFMA, "Needs FMA instructions support.");
1290   LIRItem value(x->argument_at(0), this);
1291   LIRItem value1(x->argument_at(1), this);
1292   LIRItem value2(x->argument_at(2), this);
1293 
1294   value2.set_destroys_register();
1295 
1296   value.load_item();
1297   value1.load_item();
1298   value2.load_item();
1299 
1300   LIR_Opr calc_input = value.result();
1301   LIR_Opr calc_input1 = value1.result();
1302   LIR_Opr calc_input2 = value2.result();
1303   LIR_Opr calc_result = rlock_result(x);
1304 
1305   switch (x->id()) {
1306   case vmIntrinsics::_fmaD:   __ fmad(calc_input, calc_input1, calc_input2, calc_result); break;
1307   case vmIntrinsics::_fmaF:   __ fmaf(calc_input, calc_input1, calc_input2, calc_result); break;
1308   default:                    ShouldNotReachHere();
1309   }
1310 }
1311 
1312 void LIRGenerator::do_vectorizedMismatch(Intrinsic* x) {
1313   fatal("vectorizedMismatch intrinsic is not implemented on this platform");
1314 }