1 /*
2 * Copyright (c) 2016, 2017, Oracle and/or its affiliates. All rights reserved.
3 * Copyright (c) 2016 SAP SE. All rights reserved.
4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
5 *
6 * This code is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 only, as
8 * published by the Free Software Foundation.
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #include "precompiled.hpp"
27 #include "asm/assembler.inline.hpp"
28 #include "compiler/disassembler.hpp"
29 #include "code/compiledIC.hpp"
30 #include "memory/resourceArea.hpp"
31 #include "prims/jvm.h"
32 #include "runtime/java.hpp"
33 #include "runtime/stubCodeGenerator.hpp"
34 #include "vm_version_s390.hpp"
35
36 # include <sys/sysinfo.h>
37
38 bool VM_Version::_is_determine_features_test_running = false;
39
40 unsigned long VM_Version::_features[_features_buffer_len] = {0, 0, 0, 0};
41 unsigned long VM_Version::_cipher_features[_features_buffer_len] = {0, 0, 0, 0};
42 unsigned long VM_Version::_msgdigest_features[_features_buffer_len] = {0, 0, 0, 0};
43 unsigned int VM_Version::_nfeatures = 0;
44 unsigned int VM_Version::_ncipher_features = 0;
45 unsigned int VM_Version::_nmsgdigest_features = 0;
46 unsigned int VM_Version::_Dcache_lineSize = 256;
47 unsigned int VM_Version::_Icache_lineSize = 256;
48
49 static const char* z_gen[] = {" ", "G1", "G2", "G3", "G4", "G5", "G6", "G7" };
50 static const char* z_machine[] = {" ", "2064", "2084", "2094", "2097", "2817", " ", "2964" };
51 static const char* z_name[] = {" ", "z900", "z990", "z9 EC", "z10 EC", "z196 EC", "ec12", "z13" };
52
53 void VM_Version::initialize() {
54 determine_features(); // Get processor capabilities.
55 set_features_string(); // Set a descriptive feature indication.
56
57 if (Verbose) {
58 print_features();
59 }
60
61 intx cache_line_size = Dcache_lineSize(0);
62
63 MaxVectorSize = 8;
64
65 if (has_PrefetchRaw()) {
66 if (FLAG_IS_DEFAULT(AllocatePrefetchStyle)) { // not preset
67 // 0 = no prefetch.
68 // 1 = Prefetch instructions for each allocation.
69 // 2 = Use TLAB watermark to gate allocation prefetch.
70 AllocatePrefetchStyle = 1;
71 }
72
73 if (AllocatePrefetchStyle > 0) { // Prefetching turned on at all?
74 // Distance to prefetch ahead of allocation pointer.
75 if (FLAG_IS_DEFAULT(AllocatePrefetchDistance) || (AllocatePrefetchDistance < 0)) { // not preset
76 AllocatePrefetchDistance = 0;
77 }
78
79 // Number of lines to prefetch ahead of allocation pointer.
80 if (FLAG_IS_DEFAULT(AllocatePrefetchLines) || (AllocatePrefetchLines <= 0)) { // not preset
81 AllocatePrefetchLines = 3;
82 }
83
84 // Step size in bytes of sequential prefetch instructions.
85 if (FLAG_IS_DEFAULT(AllocatePrefetchStepSize) || (AllocatePrefetchStepSize <= 0)) { // not preset
86 FLAG_SET_DEFAULT(AllocatePrefetchStepSize, cache_line_size);
87 } else if (AllocatePrefetchStepSize < cache_line_size) {
88 FLAG_SET_DEFAULT(AllocatePrefetchStepSize, cache_line_size);
89 } else {
90 FLAG_SET_DEFAULT(AllocatePrefetchStepSize, cache_line_size);
91 }
92 } else {
93 FLAG_SET_DEFAULT(AllocatePrefetchStyle, 0);
94 AllocatePrefetchDistance = 0;
95 AllocatePrefetchLines = 0;
96 // Can't be zero. Will SIGFPE during constraints checking.
97 FLAG_SET_DEFAULT(AllocatePrefetchStepSize, cache_line_size);
98 }
99
100 } else {
101 FLAG_SET_DEFAULT(AllocatePrefetchStyle, 0);
102 AllocatePrefetchDistance = 0;
103 AllocatePrefetchLines = 0;
104 // Can't be zero. Will SIGFPE during constraints checking.
105 FLAG_SET_DEFAULT(AllocatePrefetchStepSize, cache_line_size);
106 }
107
108 // TODO:
109 // On z/Architecture, cache line size is significantly large (256 bytes). Do we really need
110 // to keep contended members that far apart? Performance tests are required.
111 if (FLAG_IS_DEFAULT(ContendedPaddingWidth) && (cache_line_size > ContendedPaddingWidth)) {
112 ContendedPaddingWidth = cache_line_size;
113 }
114
115 // On z/Architecture, the CRC32/CRC32C intrinsics are implemented "by hand".
116 // TODO: Provide implementation based on the vector instructions available from z13.
117 // Note: The CHECKSUM instruction, which has been there since the very beginning
118 // (of z/Architecture), computes "some kind of" a checksum.
119 // It has nothing to do with the CRC32 algorithm.
120 if (FLAG_IS_DEFAULT(UseCRC32Intrinsics)) {
121 FLAG_SET_DEFAULT(UseCRC32Intrinsics, true);
122 }
123 if (FLAG_IS_DEFAULT(UseCRC32CIntrinsics)) {
124 FLAG_SET_DEFAULT(UseCRC32CIntrinsics, true);
125 }
126
127 // TODO: Provide implementation.
128 if (UseAdler32Intrinsics) {
129 warning("Adler32Intrinsics not available on this CPU.");
130 FLAG_SET_DEFAULT(UseAdler32Intrinsics, false);
131 }
132
133 // On z/Architecture, we take UseAES as the general switch to enable/disable the AES intrinsics.
134 // The specific, and yet to be defined, switches UseAESxxxIntrinsics will then be set
135 // depending on the actual machine capabilities.
136 // Explicitly setting them via CmdLine option takes precedence, of course.
137 // TODO: UseAESIntrinsics must be made keylength specific.
138 // As of March 2015 and Java8, only AES128 is supported by the Java Cryptographic Extensions.
139 // Therefore, UseAESIntrinsics is of minimal use at the moment.
140 if (FLAG_IS_DEFAULT(UseAES) && has_Crypto_AES()) {
141 FLAG_SET_DEFAULT(UseAES, true);
142 }
143 if (UseAES && !has_Crypto_AES()) {
144 warning("AES instructions are not available on this CPU");
145 FLAG_SET_DEFAULT(UseAES, false);
146 }
147 if (UseAES) {
148 if (FLAG_IS_DEFAULT(UseAESIntrinsics)) {
149 FLAG_SET_DEFAULT(UseAESIntrinsics, true);
150 }
151 }
152 if (UseAESIntrinsics && !has_Crypto_AES()) {
153 warning("AES intrinsics are not available on this CPU");
154 FLAG_SET_DEFAULT(UseAESIntrinsics, false);
155 }
156
157 // TODO: implement AES/CTR intrinsics
158 if (UseAESCTRIntrinsics) {
159 warning("AES/CTR intrinsics are not available on this CPU");
160 FLAG_SET_DEFAULT(UseAESCTRIntrinsics, false);
161 }
162
163 // TODO: implement GHASH intrinsics
164 if (UseGHASHIntrinsics) {
165 warning("GHASH intrinsics are not available on this CPU");
166 FLAG_SET_DEFAULT(UseGHASHIntrinsics, false);
167 }
168
169 if (FLAG_IS_DEFAULT(UseFMA)) {
170 FLAG_SET_DEFAULT(UseFMA, true);
171 }
172
173 // On z/Architecture, we take UseSHA as the general switch to enable/disable the SHA intrinsics.
174 // The specific switches UseSHAxxxIntrinsics will then be set depending on the actual
175 // machine capabilities.
176 // Explicitly setting them via CmdLine option takes precedence, of course.
177 if (FLAG_IS_DEFAULT(UseSHA) && has_Crypto_SHA()) {
178 FLAG_SET_DEFAULT(UseSHA, true);
179 }
180 if (UseSHA && !has_Crypto_SHA()) {
181 warning("SHA instructions are not available on this CPU");
182 FLAG_SET_DEFAULT(UseSHA, false);
183 }
184 if (UseSHA && has_Crypto_SHA1()) {
185 if (FLAG_IS_DEFAULT(UseSHA1Intrinsics)) {
186 FLAG_SET_DEFAULT(UseSHA1Intrinsics, true);
187 }
188 } else if (UseSHA1Intrinsics) {
189 warning("Intrinsics for SHA-1 crypto hash functions not available on this CPU.");
190 FLAG_SET_DEFAULT(UseSHA1Intrinsics, false);
191 }
192 if (UseSHA && has_Crypto_SHA256()) {
193 if (FLAG_IS_DEFAULT(UseSHA256Intrinsics)) {
194 FLAG_SET_DEFAULT(UseSHA256Intrinsics, true);
195 }
196 } else if (UseSHA256Intrinsics) {
197 warning("Intrinsics for SHA-224 and SHA-256 crypto hash functions not available on this CPU.");
198 FLAG_SET_DEFAULT(UseSHA256Intrinsics, false);
199 }
200 if (UseSHA && has_Crypto_SHA512()) {
201 if (FLAG_IS_DEFAULT(UseSHA512Intrinsics)) {
202 FLAG_SET_DEFAULT(UseSHA512Intrinsics, true);
203 }
204 } else if (UseSHA512Intrinsics) {
205 warning("Intrinsics for SHA-384 and SHA-512 crypto hash functions not available on this CPU.");
206 FLAG_SET_DEFAULT(UseSHA512Intrinsics, false);
207 }
208
209 if (FLAG_IS_DEFAULT(UseMultiplyToLenIntrinsic)) {
210 FLAG_SET_DEFAULT(UseMultiplyToLenIntrinsic, true);
211 }
212 if (FLAG_IS_DEFAULT(UseMontgomeryMultiplyIntrinsic)) {
213 FLAG_SET_DEFAULT(UseMontgomeryMultiplyIntrinsic, true);
214 }
215 if (FLAG_IS_DEFAULT(UseMontgomerySquareIntrinsic)) {
216 FLAG_SET_DEFAULT(UseMontgomerySquareIntrinsic, true);
217 }
218 if (FLAG_IS_DEFAULT(UsePopCountInstruction)) {
219 FLAG_SET_DEFAULT(UsePopCountInstruction, true);
220 }
221
222 // z/Architecture supports 8-byte compare-exchange operations
223 // (see Atomic::cmpxchg and StubGenerator::generate_atomic_cmpxchg_ptr)
224 // and 'atomic long memory ops' (see Unsafe_GetLongVolatile).
225 _supports_cx8 = true;
226
227 _supports_atomic_getadd4 = VM_Version::has_LoadAndALUAtomicV1();
228 _supports_atomic_getadd8 = VM_Version::has_LoadAndALUAtomicV1();
229
230 // z/Architecture supports unaligned memory accesses.
231 // Performance penalty is negligible. An additional tick or so
232 // is lost if the accessed data spans a cache line boundary.
233 // Unaligned accesses are not atomic, of course.
234 if (FLAG_IS_DEFAULT(UseUnalignedAccesses)) {
235 FLAG_SET_DEFAULT(UseUnalignedAccesses, true);
236 }
237 }
238
239
240 void VM_Version::set_features_string() {
241
242 unsigned int ambiguity = 0;
243 if (is_z13()) {
244 _features_string = "System z G7-z13 (LDISP_fast, ExtImm, PCrel Load/Store, CmpB, Cond Load/Store, Interlocked Update, TxM, VectorInstr)";
245 ambiguity++;
246 }
247 if (is_ec12()) {
248 _features_string = "System z G6-EC12 (LDISP_fast, ExtImm, PCrel Load/Store, CmpB, Cond Load/Store, Interlocked Update, TxM)";
249 ambiguity++;
250 }
251 if (is_z196()) {
252 _features_string = "System z G5-z196 (LDISP_fast, ExtImm, PCrel Load/Store, CmpB, Cond Load/Store, Interlocked Update)";
253 ambiguity++;
254 }
255 if (is_z10()) {
256 _features_string = "System z G4-z10 (LDISP_fast, ExtImm, PCrel Load/Store, CmpB)";
257 ambiguity++;
258 }
259 if (is_z9()) {
260 _features_string = "System z G3-z9 (LDISP_fast, ExtImm), out-of-support as of 2016-04-01";
261 ambiguity++;
262 }
263 if (is_z990()) {
264 _features_string = "System z G2-z990 (LDISP_fast), out-of-support as of 2014-07-01";
265 ambiguity++;
266 }
267 if (is_z900()) {
268 _features_string = "System z G1-z900 (LDISP), out-of-support as of 2014-07-01";
269 ambiguity++;
270 }
271
272 if (ambiguity == 0) {
273 _features_string = "z/Architecture (unknown generation)";
274 } else if (ambiguity > 1) {
275 tty->print_cr("*** WARNING *** Ambiguous z/Architecture detection, ambiguity = %d", ambiguity);
276 tty->print_cr(" oldest detected generation is %s", _features_string);
277 _features_string = "z/Architecture (ambiguous detection)";
278 }
279
280 if (has_Crypto_AES()) {
281 char buf[256];
282 assert(strlen(_features_string) + 4 + 3*4 + 1 < sizeof(buf), "increase buffer size");
283 jio_snprintf(buf, sizeof(buf), "%s aes%s%s%s", // String 'aes' must be surrounded by spaces so that jtreg tests recognize it.
284 _features_string,
285 has_Crypto_AES128() ? " 128" : "",
286 has_Crypto_AES192() ? " 192" : "",
287 has_Crypto_AES256() ? " 256" : "");
288 _features_string = os::strdup(buf);
289 }
290
291 if (has_Crypto_SHA()) {
292 char buf[256];
293 assert(strlen(_features_string) + 4 + 2 + 2*4 + 6 + 1 < sizeof(buf), "increase buffer size");
294 // String 'sha1' etc must be surrounded by spaces so that jtreg tests recognize it.
295 jio_snprintf(buf, sizeof(buf), "%s %s%s%s%s",
296 _features_string,
297 has_Crypto_SHA1() ? " sha1" : "",
298 has_Crypto_SHA256() ? " sha256" : "",
299 has_Crypto_SHA512() ? " sha512" : "",
300 has_Crypto_GHASH() ? " ghash" : "");
301 if (has_Crypto_AES()) { os::free((void *)_features_string); }
302 _features_string = os::strdup(buf);
303 }
304 }
305
306 // featureBuffer - bit array indicating availability of various features
307 // featureNum - bit index of feature to be tested
308 // Featurenum < 0 requests test for any nonzero bit in featureBuffer.
309 // bufLen - length of featureBuffer in bits
310 bool VM_Version::test_feature_bit(unsigned long* featureBuffer, int featureNum, unsigned int bufLen) {
311 assert(bufLen > 0, "buffer len must be positive");
312 assert((bufLen & 0x0007) == 0, "unaligned buffer len");
313 assert(((intptr_t)featureBuffer&0x0007) == 0, "unaligned feature buffer");
314 if (featureNum < 0) {
315 // Any bit set at all?
316 bool anyBit = false;
317 for (size_t i = 0; i < bufLen/(8*sizeof(long)); i++) {
318 anyBit = anyBit || (featureBuffer[i] != 0);
319 }
320 return anyBit;
321 } else {
322 assert((unsigned int)featureNum < bufLen, "feature index out of range");
323 unsigned char* byteBuffer = (unsigned char*)featureBuffer;
324 int byteIndex = featureNum/(8*sizeof(char));
325 int bitIndex = featureNum%(8*sizeof(char));
326 // Indexed bit set?
327 return (byteBuffer[byteIndex] & (1U<<(7-bitIndex))) != 0;
328 }
329 }
330
331 void VM_Version::print_features_internal(const char* text, bool print_anyway) {
332 tty->print_cr("%s %s", text, features_string());
333 tty->print("%s", text);
334 for (unsigned int i = 0; i < _nfeatures; i++) {
335 tty->print(" 0x%16.16lx", _features[i]);
336 }
337 tty->cr();
338
339 if (Verbose || print_anyway) {
340 // z900
341 if (has_long_displacement() ) tty->print_cr("available: %s", "LongDispFacility");
342 // z990
343 if (has_long_displacement_fast() ) tty->print_cr("available: %s", "LongDispFacilityHighPerf");
344 if (has_ETF2() && has_ETF3() ) tty->print_cr("available: %s", "ETF2 and ETF3");
345 if (has_Crypto() ) tty->print_cr("available: %s", "CryptoFacility");
346 // z9
347 if (has_extended_immediate() ) tty->print_cr("available: %s", "ExtImmedFacility");
348 if (has_StoreFacilityListExtended()) tty->print_cr("available: %s", "StoreFacilityListExtended");
349 if (has_StoreClockFast() ) tty->print_cr("available: %s", "StoreClockFast");
350 if (has_ETF2Enhancements() ) tty->print_cr("available: %s", "ETF2 Enhancements");
351 if (has_ETF3Enhancements() ) tty->print_cr("available: %s", "ETF3 Enhancements");
352 if (has_HFPUnnormalized() ) tty->print_cr("available: %s", "HFPUnnormalizedFacility");
353 if (has_HFPMultiplyAndAdd() ) tty->print_cr("available: %s", "HFPMultiplyAndAddFacility");
354 // z10
355 if (has_ParsingEnhancements() ) tty->print_cr("available: %s", "Parsing Enhancements");
356 if (has_ExtractCPUtime() ) tty->print_cr("available: %s", "ExtractCPUTime");
357 if (has_CompareSwapStore() ) tty->print_cr("available: %s", "CompareSwapStore");
358 if (has_GnrlInstrExtensions() ) tty->print_cr("available: %s", "General Instruction Extensions");
359 if (has_CompareBranch() ) tty->print_cr(" available: %s", "Compare and Branch");
360 if (has_CompareTrap() ) tty->print_cr(" available: %s", "Compare and Trap");
361 if (has_RelativeLoadStore() ) tty->print_cr(" available: %s", "Relative Load/Store");
362 if (has_MultiplySingleImm32() ) tty->print_cr(" available: %s", "MultiplySingleImm32");
363 if (has_Prefetch() ) tty->print_cr(" available: %s", "Prefetch");
364 if (has_MoveImmToMem() ) tty->print_cr(" available: %s", "Direct Moves Immediate to Memory");
365 if (has_MemWithImmALUOps() ) tty->print_cr(" available: %s", "Direct ALU Ops Memory .op. Immediate");
366 if (has_ExtractCPUAttributes() ) tty->print_cr(" available: %s", "Extract CPU Atributes");
367 if (has_ExecuteExtensions() ) tty->print_cr("available: %s", "ExecuteExtensions");
368 if (has_FPSupportEnhancements() ) tty->print_cr("available: %s", "FPSupportEnhancements");
369 if (has_DecimalFloatingPoint() ) tty->print_cr("available: %s", "DecimalFloatingPoint");
370 // z196
371 if (has_DistinctOpnds() ) tty->print_cr("available: %s", "Distinct Operands");
372 if (has_InterlockedAccessV1() ) tty->print_cr(" available: %s", "InterlockedAccess V1 (fast)");
373 if (has_PopCount() ) tty->print_cr(" available: %s", "PopCount");
374 if (has_LoadStoreConditional() ) tty->print_cr(" available: %s", "LoadStoreConditional");
375 if (has_HighWordInstr() ) tty->print_cr(" available: %s", "HighWord Instructions");
376 if (has_FastSync() ) tty->print_cr(" available: %s", "FastSync (bcr 14,0)");
377 if (has_AtomicMemWithImmALUOps() ) tty->print_cr("available: %s", "Atomic Direct ALU Ops Memory .op. Immediate");
378 if (has_FPExtensions() ) tty->print_cr("available: %s", "Floatingpoint Extensions");
379 if (has_CryptoExt3() ) tty->print_cr("available: %s", "Crypto Extensions 3");
380 if (has_CryptoExt4() ) tty->print_cr("available: %s", "Crypto Extensions 4");
381 // EC12
382 if (has_MiscInstrExt() ) tty->print_cr("available: %s", "Miscelaneous Instruction Extensions");
383 if (has_ExecutionHint() ) tty->print_cr(" available: %s", "Execution Hints (branch prediction)");
384 if (has_ProcessorAssist() ) tty->print_cr(" available: %s", "Processor Assists");
385 if (has_LoadAndTrap() ) tty->print_cr(" available: %s", "Load and Trap");
386 if (has_TxMem() ) tty->print_cr("available: %s", "Transactional Memory");
387 if (has_InterlockedAccessV2() ) tty->print_cr(" available: %s", "InterlockedAccess V2 (fast)");
388 if (has_DFPZonedConversion() ) tty->print_cr(" available: %s", "DFP Zoned Conversions");
389 // z13
390 if (has_LoadStoreConditional2() ) tty->print_cr("available: %s", "Load/Store Conditional 2");
391 if (has_CryptoExt5() ) tty->print_cr("available: %s", "Crypto Extensions 5");
392 if (has_DFPPackedConversion() ) tty->print_cr("available: %s", "DFP Packed Conversions");
393 if (has_VectorFacility() ) tty->print_cr("available: %s", "Vector Facility");
394 // test switches
395 if (has_TestFeature1Impl() ) tty->print_cr("available: %s", "TestFeature1Impl");
396 if (has_TestFeature2Impl() ) tty->print_cr("available: %s", "TestFeature2Impl");
397 if (has_TestFeature4Impl() ) tty->print_cr("available: %s", "TestFeature4Impl");
398 if (has_TestFeature8Impl() ) tty->print_cr("available: %s", "TestFeature8Impl");
399
400 if (has_Crypto()) {
401 tty->cr();
402 tty->print_cr("detailed availability of %s capabilities:", "CryptoFacility");
403 if (test_feature_bit(&_cipher_features[0], -1, 2*Cipher::_featureBits)) {
404 tty->cr();
405 tty->print_cr(" available: %s", "Message Cipher Functions");
406 }
407 if (test_feature_bit(&_cipher_features[0], -1, (int)Cipher::_featureBits)) {
408 tty->print_cr(" available Crypto Features of KM (Cipher Message):");
409 for (unsigned int i = 0; i < Cipher::_featureBits; i++) {
410 if (test_feature_bit(&_cipher_features[0], i, (int)Cipher::_featureBits)) {
411 switch (i) {
412 case Cipher::_Query: tty->print_cr(" available: KM Query"); break;
413 case Cipher::_DEA: tty->print_cr(" available: KM DEA"); break;
414 case Cipher::_TDEA128: tty->print_cr(" available: KM TDEA-128"); break;
415 case Cipher::_TDEA192: tty->print_cr(" available: KM TDEA-192"); break;
416 case Cipher::_EncryptedDEA: tty->print_cr(" available: KM Encrypted DEA"); break;
417 case Cipher::_EncryptedDEA128: tty->print_cr(" available: KM Encrypted DEA-128"); break;
418 case Cipher::_EncryptedDEA192: tty->print_cr(" available: KM Encrypted DEA-192"); break;
419 case Cipher::_AES128: tty->print_cr(" available: KM AES-128"); break;
420 case Cipher::_AES192: tty->print_cr(" available: KM AES-192"); break;
421 case Cipher::_AES256: tty->print_cr(" available: KM AES-256"); break;
422 case Cipher::_EnccryptedAES128: tty->print_cr(" available: KM Encrypted-AES-128"); break;
423 case Cipher::_EnccryptedAES192: tty->print_cr(" available: KM Encrypted-AES-192"); break;
424 case Cipher::_EnccryptedAES256: tty->print_cr(" available: KM Encrypted-AES-256"); break;
425 case Cipher::_XTSAES128: tty->print_cr(" available: KM XTS-AES-128"); break;
426 case Cipher::_XTSAES256: tty->print_cr(" available: KM XTS-AES-256"); break;
427 case Cipher::_EncryptedXTSAES128: tty->print_cr(" available: KM XTS-Encrypted-AES-128"); break;
428 case Cipher::_EncryptedXTSAES256: tty->print_cr(" available: KM XTS-Encrypted-AES-256"); break;
429 default: tty->print_cr(" available: unknown KM code %d", i); break;
430 }
431 }
432 }
433 }
434 if (test_feature_bit(&_cipher_features[2], -1, (int)Cipher::_featureBits)) {
435 tty->print_cr(" available Crypto Features of KMC (Cipher Message with Chaining):");
436 for (unsigned int i = 0; i < Cipher::_featureBits; i++) {
437 if (test_feature_bit(&_cipher_features[2], i, (int)Cipher::_featureBits)) {
438 switch (i) {
439 case Cipher::_Query: tty->print_cr(" available: KMC Query"); break;
440 case Cipher::_DEA: tty->print_cr(" available: KMC DEA"); break;
441 case Cipher::_TDEA128: tty->print_cr(" available: KMC TDEA-128"); break;
442 case Cipher::_TDEA192: tty->print_cr(" available: KMC TDEA-192"); break;
443 case Cipher::_EncryptedDEA: tty->print_cr(" available: KMC Encrypted DEA"); break;
444 case Cipher::_EncryptedDEA128: tty->print_cr(" available: KMC Encrypted DEA-128"); break;
445 case Cipher::_EncryptedDEA192: tty->print_cr(" available: KMC Encrypted DEA-192"); break;
446 case Cipher::_AES128: tty->print_cr(" available: KMC AES-128"); break;
447 case Cipher::_AES192: tty->print_cr(" available: KMC AES-192"); break;
448 case Cipher::_AES256: tty->print_cr(" available: KMC AES-256"); break;
449 case Cipher::_EnccryptedAES128: tty->print_cr(" available: KMC Encrypted-AES-128"); break;
450 case Cipher::_EnccryptedAES192: tty->print_cr(" available: KMC Encrypted-AES-192"); break;
451 case Cipher::_EnccryptedAES256: tty->print_cr(" available: KMC Encrypted-AES-256"); break;
452 case Cipher::_PRNG: tty->print_cr(" available: KMC PRNG"); break;
453 default: tty->print_cr(" available: unknown KMC code %d", i); break;
454 }
455 }
456 }
457 }
458
459 if (test_feature_bit(&_msgdigest_features[0], -1, 2*MsgDigest::_featureBits)) {
460 tty->cr();
461 tty->print_cr(" available: %s", "Message Digest Functions for SHA");
462 }
463 if (test_feature_bit(&_msgdigest_features[0], -1, (int)MsgDigest::_featureBits)) {
464 tty->print_cr(" available Features of KIMD (Msg Digest):");
465 for (unsigned int i = 0; i < MsgDigest::_featureBits; i++) {
466 if (test_feature_bit(&_msgdigest_features[0], i, (int)MsgDigest::_featureBits)) {
467 switch (i) {
468 case MsgDigest::_Query: tty->print_cr(" available: KIMD Query"); break;
469 case MsgDigest::_SHA1: tty->print_cr(" available: KIMD SHA-1"); break;
470 case MsgDigest::_SHA256: tty->print_cr(" available: KIMD SHA-256"); break;
471 case MsgDigest::_SHA512: tty->print_cr(" available: KIMD SHA-512"); break;
472 case MsgDigest::_GHASH: tty->print_cr(" available: KIMD GHASH"); break;
473 default: tty->print_cr(" available: unknown code %d", i); break;
474 }
475 }
476 }
477 }
478 if (test_feature_bit(&_msgdigest_features[2], -1, (int)MsgDigest::_featureBits)) {
479 tty->print_cr(" available Features of KLMD (Msg Digest):");
480 for (unsigned int i = 0; i < MsgDigest::_featureBits; i++) {
481 if (test_feature_bit(&_msgdigest_features[2], i, (int)MsgDigest::_featureBits)) {
482 switch (i) {
483 case MsgDigest::_Query: tty->print_cr(" available: KLMD Query"); break;
484 case MsgDigest::_SHA1: tty->print_cr(" available: KLMD SHA-1"); break;
485 case MsgDigest::_SHA256: tty->print_cr(" available: KLMD SHA-256"); break;
486 case MsgDigest::_SHA512: tty->print_cr(" available: KLMD SHA-512"); break;
487 default: tty->print_cr(" available: unknown code %d", i); break;
488 }
489 }
490 }
491 }
492 }
493 if (ContendedPaddingWidth > 0) {
494 tty->cr();
495 tty->print_cr("ContendedPaddingWidth " INTX_FORMAT, ContendedPaddingWidth);
496 }
497 }
498 }
499
500 void VM_Version::print_features() {
501 print_features_internal("Version:");
502 }
503
504 void VM_Version::reset_features(bool reset) {
505 if (reset) {
506 for (unsigned int i = 0; i < _features_buffer_len; i++) {
507 VM_Version::_features[i] = 0;
508 }
509 }
510 }
511
512 void VM_Version::set_features_z900(bool reset) {
513 reset_features(reset);
514
515 set_has_long_displacement();
516 set_has_ETF2();
517 }
518
519 void VM_Version::set_features_z990(bool reset) {
520 reset_features(reset);
521
522 set_features_z900(false);
523 set_has_ETF3();
524 set_has_long_displacement_fast();
525 set_has_HFPMultiplyAndAdd();
526 }
527
528 void VM_Version::set_features_z9(bool reset) {
529 reset_features(reset);
530
531 set_features_z990(false);
532 set_has_StoreFacilityListExtended();
533 // set_has_Crypto(); // Do not set, crypto features must be retrieved separately.
534 set_has_ETF2Enhancements();
535 set_has_ETF3Enhancements();
536 set_has_extended_immediate();
537 set_has_StoreClockFast();
538 set_has_HFPUnnormalized();
539 }
540
541 void VM_Version::set_features_z10(bool reset) {
542 reset_features(reset);
543
544 set_features_z9(false);
545 set_has_CompareSwapStore();
546 set_has_RelativeLoadStore();
547 set_has_CompareBranch();
548 set_has_CompareTrap();
549 set_has_MultiplySingleImm32();
550 set_has_Prefetch();
551 set_has_MoveImmToMem();
552 set_has_MemWithImmALUOps();
553 set_has_ExecuteExtensions();
554 set_has_FPSupportEnhancements();
555 set_has_DecimalFloatingPoint();
556 set_has_ExtractCPUtime();
557 set_has_CryptoExt3();
558 }
559
560 void VM_Version::set_features_z196(bool reset) {
561 reset_features(reset);
562
563 set_features_z10(false);
564 set_has_InterlockedAccessV1();
565 set_has_PopCount();
566 set_has_LoadStoreConditional();
567 set_has_HighWordInstr();
568 set_has_FastSync();
569 set_has_FPExtensions();
570 set_has_DistinctOpnds();
571 set_has_CryptoExt4();
572 }
573
574 void VM_Version::set_features_ec12(bool reset) {
575 reset_features(reset);
576
577 set_features_z196(false);
578 set_has_MiscInstrExt();
579 set_has_InterlockedAccessV2();
580 set_has_LoadAndALUAtomicV2();
581 set_has_TxMem();
582 }
583
584 void VM_Version::set_features_z13(bool reset) {
585 reset_features(reset);
586
587 set_features_ec12(false);
588 set_has_LoadStoreConditional2();
589 set_has_CryptoExt5();
590 set_has_VectorFacility();
591 }
592
593 void VM_Version::set_features_from(const char* march) {
594 bool err = false;
595 bool prt = false;
596
597 if ((march != NULL) && (march[0] != '\0')) {
598 const int buf_len = 16;
599 const int hdr_len = 5;
600 char buf[buf_len];
601 if (strlen(march) >= hdr_len) {
602 memcpy(buf, march, hdr_len);
603 buf[hdr_len] = '\00';
604 } else {
605 buf[0] = '\00';
606 }
607
608 if (!strcmp(march, "z900")) {
609 set_features_z900();
610 } else if (!strcmp(march, "z990")) {
611 set_features_z990();
612 } else if (!strcmp(march, "z9")) {
613 set_features_z9();
614 } else if (!strcmp(march, "z10")) {
615 set_features_z10();
616 } else if (!strcmp(march, "z196")) {
617 set_features_z196();
618 } else if (!strcmp(march, "ec12")) {
619 set_features_ec12();
620 } else if (!strcmp(march, "z13")) {
621 set_features_z13();
622 } else if (!strcmp(buf, "ztest")) {
623 assert(!has_TestFeaturesImpl(), "possible facility list flag conflict");
624 if (strlen(march) > hdr_len) {
625 int itest = 0;
626 if ((strlen(march)-hdr_len) >= buf_len) err = true;
627 if (!err) {
628 memcpy(buf, &march[hdr_len], strlen(march)-hdr_len);
629 buf[strlen(march)-hdr_len] = '\00';
630 for (size_t i = 0; !err && (i < strlen(buf)); i++) {
631 itest = itest*10 + buf[i]-'0';
632 err = err || ((buf[i]-'0') < 0) || ((buf[i]-'0') > 9) || (itest > 15);
633 }
634 }
635 if (!err) {
636 prt = true;
637 if (itest & 0x01) { set_has_TestFeature1Impl(); }
638 if (itest & 0x02) { set_has_TestFeature2Impl(); }
639 if (itest & 0x04) { set_has_TestFeature4Impl(); }
640 if (itest & 0x08) { set_has_TestFeature8Impl(); }
641 }
642 } else {
643 prt = true;
644 set_has_TestFeature1Impl();
645 set_has_TestFeature2Impl();
646 set_has_TestFeature4Impl();
647 set_has_TestFeature8Impl();
648 }
649 } else {
650 err = true;
651 }
652 if (!err) {
653 set_features_string();
654 if (prt || PrintAssembly) {
655 print_features_internal("CPU Version as set by cmdline option:", prt);
656 }
657 } else {
658 tty->print_cr("***Warning: Unsupported ProcessorArchitecture: %s, internal settings left undisturbed.", march);
659 }
660 }
661
662 }
663
664 static long (*getFeatures)(unsigned long*, int, int) = NULL;
665
666 void VM_Version::set_getFeatures(address entryPoint) {
667 if (getFeatures == NULL) {
668 getFeatures = (long(*)(unsigned long*, int, int))entryPoint;
669 }
670 }
671
672 long VM_Version::call_getFeatures(unsigned long* buffer, int buflen, int functionCode) {
673 VM_Version::_is_determine_features_test_running = true;
674 long functionResult = (*getFeatures)(buffer, buflen, functionCode);
675 VM_Version::_is_determine_features_test_running = false;
676 return functionResult;
677 }
678
679 // Helper function for "extract cache attribute" instruction.
680 int VM_Version::calculate_ECAG_functionCode(unsigned int attributeIndication,
681 unsigned int levelIndication,
682 unsigned int typeIndication) {
683 return (attributeIndication<<4) | (levelIndication<<1) | typeIndication;
684 }
685
686 void VM_Version::determine_features() {
687
688 const int cbuf_size = _code_buffer_len;
689 const int buf_len = _features_buffer_len;
690
691 // Allocate code buffer space for the detection code.
692 ResourceMark rm;
693 CodeBuffer cbuf("determine CPU features", cbuf_size, 0);
694 MacroAssembler* a = new MacroAssembler(&cbuf);
695
696 // Emit code.
697 set_getFeatures(a->pc());
698 address code = a->pc();
699
700 // Try STFLE. Possible INVOP will cause defaults to be used.
701 Label getFEATURES;
702 Label getCPUFEATURES; // fcode = -1 (cache)
703 Label getCIPHERFEATURES; // fcode = -2 (cipher)
704 Label getMSGDIGESTFEATURES; // fcode = -3 (SHA)
705 Label checkLongDispFast;
706 Label noLongDisp;
707 Label posDisp, negDisp;
708 Label errRTN;
709 a->z_ltgfr(Z_R0, Z_ARG2); // Buf len to r0 and test.
710 a->z_brl(getFEATURES); // negative -> Get machine features.
711 a->z_brz(checkLongDispFast); // zero -> Check for high-speed Long Displacement Facility.
712 a->z_aghi(Z_R0, -1);
713 a->z_stfle(0, Z_ARG1);
714 a->z_lg(Z_R1, 0, Z_ARG1); // Get first DW of facility list.
715 a->z_lgr(Z_RET, Z_R0); // Calculate rtn value for success.
716 a->z_la(Z_RET, 1, Z_RET);
717 a->z_brnz(errRTN); // Instr failed if non-zero CC.
718 a->z_ltgr(Z_R1, Z_R1); // Instr failed if first DW == 0.
719 a->z_bcr(Assembler::bcondNotZero, Z_R14); // Successful return.
720
721 a->bind(errRTN);
722 a->z_lngr(Z_RET, Z_RET);
723 a->z_ltgr(Z_R1, Z_R1);
724 a->z_bcr(Assembler::bcondNotZero, Z_R14); // Return "buffer too small".
725 a->z_xgr(Z_RET, Z_RET);
726 a->z_br(Z_R14); // Return "operation aborted".
727
728 a->bind(getFEATURES);
729 a->z_cghi(Z_R0, -1); // -1: Extract CPU attributes, currently: cache layout only.
730 a->z_bre(getCPUFEATURES);
731 a->z_cghi(Z_R0, -2); // -2: Extract detailed crypto capabilities (cipher instructions).
732 a->z_bre(getCIPHERFEATURES);
733 a->z_cghi(Z_R0, -3); // -3: Extract detailed crypto capabilities (msg digest instructions).
734 a->z_bre(getMSGDIGESTFEATURES);
735
736 a->z_xgr(Z_RET, Z_RET); // Not a valid function code.
737 a->z_br(Z_R14); // Return "operation aborted".
738
739 // Try KIMD/KLMD query function to get details about msg digest (secure hash, SHA) instructions.
740 a->bind(getMSGDIGESTFEATURES);
741 a->z_lghi(Z_R0,(int)MsgDigest::_Query); // query function code
742 a->z_lgr(Z_R1,Z_R2); // param block addr, 2*16 bytes min size
743 a->z_kimd(Z_R2,Z_R2); // Get available KIMD functions (bit pattern in param blk).
744 a->z_la(Z_R1,16,Z_R1); // next param block addr
745 a->z_klmd(Z_R2,Z_R2); // Get available KLMD functions (bit pattern in param blk).
746 a->z_lghi(Z_RET,4);
747 a->z_br(Z_R14);
748
749 // Try KM/KMC query function to get details about crypto instructions.
750 a->bind(getCIPHERFEATURES);
751 a->z_lghi(Z_R0,(int)Cipher::_Query); // query function code
752 a->z_lgr(Z_R1,Z_R2); // param block addr, 2*16 bytes min size (KIMD/KLMD output)
753 a->z_km(Z_R2,Z_R2); // get available KM functions
754 a->z_la(Z_R1,16,Z_R1); // next param block addr
755 a->z_kmc(Z_R2,Z_R2); // get available KMC functions
756 a->z_lghi(Z_RET,4);
757 a->z_br(Z_R14);
758
759 // Use EXTRACT CPU ATTRIBUTE instruction to get information about cache layout.
760 a->bind(getCPUFEATURES);
761 a->z_xgr(Z_R0,Z_R0); // as recommended in instruction documentation
762 a->z_ecag(Z_RET,Z_R0,0,Z_ARG3); // Extract information as requested by Z_ARG1 contents.
763 a->z_br(Z_R14);
764
765 // Check the performance of the Long Displacement Facility, i.e. find out if we are running on z900 or newer.
766 a->bind(checkLongDispFast);
767 a->z_llill(Z_R0, 0xffff); // preset #iterations
768 a->z_larl(Z_R1, posDisp);
769 a->z_stck(0, Z_ARG1); // Get begin timestamp.
770
771 a->bind(posDisp); // Positive disp loop.
772 a->z_lg(Z_ARG2, 0, Z_ARG1);
773 a->z_bctgr(Z_R0, Z_R1);
774
775 a->z_stck(0, Z_ARG1); // Get end timestamp.
776 a->z_sg(Z_ARG2, 0, Z_R0, Z_ARG1); // Calculate elapsed time.
777 a->z_lcgr(Z_ARG2, Z_ARG2);
778 a->z_srlg(Z_ARG2, Z_ARG2, 12); // LSB: now microseconds
779 a->z_stg(Z_ARG2, 8, Z_ARG1); // Store difference in buffer[1].
780
781 a->z_llill(Z_R0, 0xffff); // preset #iterations
782 a->z_larl(Z_R1, negDisp);
783 a->z_xgr(Z_ARG2, Z_ARG2); // Clear to detect absence of LongDisp facility.
784 a->z_stck(0, Z_ARG1); // Get begin timestamp.
785 a->z_la(Z_ARG1, 8, Z_ARG1);
786
787 a->bind(negDisp); // Negative disp loop.
788 a->z_lg(Z_ARG2, -8, Z_ARG1);
789 a->z_bctgr(Z_R0, Z_R1);
790
791 a->z_aghi(Z_ARG1, -8);
792 a->z_stck(0, Z_ARG1); // Get end timestamp.
793 a->z_ltgr(Z_ARG2, Z_ARG2); // Check for absence of LongDisp facility.
794 a->z_brz(noLongDisp);
795 a->z_sg(Z_ARG2, 0, Z_R0, Z_ARG1); // Calc elapsed time.
796 a->z_lcgr(Z_ARG2, Z_ARG2);
797 a->z_srlg(Z_ARG2, Z_ARG2, 12); // LSB: now microseconds
798 a->z_stg(Z_ARG2, 0, Z_ARG1); // store difference in buffer[0]
799
800 a->z_llill(Z_RET,0xffff);
801 a->z_br(Z_R14);
802
803 a->bind(noLongDisp);
804 a->z_lghi(Z_RET,-1);
805 a->z_br(Z_R14);
806
807 address code_end = a->pc();
808 a->flush();
809
810 // Print the detection code.
811 bool printVerbose = Verbose || PrintAssembly || PrintStubCode;
812 if (printVerbose) {
813 ttyLocker ttyl;
814 tty->print_cr("Decoding CPU feature detection stub at " INTPTR_FORMAT " before execution:", p2i(code));
815 tty->print_cr("Stub length is %ld bytes, codebuffer reserves %d bytes, %ld bytes spare.",
816 code_end-code, cbuf_size, cbuf_size-(code_end-code));
817
818 // Use existing decode function. This enables the [Code] format which is needed to DecodeErrorFile.
819 Disassembler::decode((u_char*)code, (u_char*)code_end, tty);
820 }
821
822 // Prepare for detection code execution and clear work buffer.
823 _nfeatures = 0;
824 _ncipher_features = 0;
825 unsigned long buffer[buf_len];
826
827 for (int i = 0; i < buf_len; i++) {
828 buffer[i] = 0L;
829 }
830
831 // execute code
832 // Illegal instructions will be replaced by 0 in signal handler.
833 // In case of problems, call_getFeatures will return a not-positive result.
834 long used_len = call_getFeatures(buffer, buf_len, 0);
835
836 bool ok;
837 if (used_len == 1) {
838 ok = true;
839 } else if (used_len > 1) {
840 unsigned int used_lenU = (unsigned int)used_len;
841 ok = true;
842 for (unsigned int i = 1; i < used_lenU; i++) {
843 ok = ok && (buffer[i] == 0L);
844 }
845 if (printVerbose && !ok) {
846 bool compact = false;
847 tty->print_cr("Note: feature list has %d (i.e. more than one) array elements.", used_lenU);
848 if (compact) {
849 tty->print("non-zero feature list elements:");
850 for (unsigned int i = 0; i < used_lenU; i++) {
851 tty->print(" [%d]: 0x%16.16lx", i, buffer[i]);
852 }
853 tty->cr();
854 } else {
855 for (unsigned int i = 0; i < used_lenU; i++) {
856 tty->print_cr("non-zero feature list[%d]: 0x%16.16lx", i, buffer[i]);
857 }
858 }
859
860 if (compact) {
861 tty->print_cr("Active features (compact view):");
862 for (unsigned int k = 0; k < used_lenU; k++) {
863 tty->print_cr(" buffer[%d]:", k);
864 for (unsigned int j = k*sizeof(long); j < (k+1)*sizeof(long); j++) {
865 bool line = false;
866 for (unsigned int i = j*8; i < (j+1)*8; i++) {
867 bool bit = test_feature_bit(buffer, i, used_lenU*sizeof(long)*8);
868 if (bit) {
869 if (!line) {
870 tty->print(" byte[%d]:", j);
871 line = true;
872 }
873 tty->print(" [%3.3d]", i);
874 }
875 }
876 if (line) {
877 tty->cr();
878 }
879 }
880 }
881 } else {
882 tty->print_cr("Active features (full view):");
883 for (unsigned int k = 0; k < used_lenU; k++) {
884 tty->print_cr(" buffer[%d]:", k);
885 for (unsigned int j = k*sizeof(long); j < (k+1)*sizeof(long); j++) {
886 tty->print(" byte[%d]:", j);
887 for (unsigned int i = j*8; i < (j+1)*8; i++) {
888 bool bit = test_feature_bit(buffer, i, used_lenU*sizeof(long)*8);
889 if (bit) {
890 tty->print(" [%3.3d]", i);
891 } else {
892 tty->print(" ");
893 }
894 }
895 tty->cr();
896 }
897 }
898 }
899 }
900 ok = true;
901 } else { // No features retrieved if we reach here. Buffer too short or instr not available.
902 if (used_len < 0) {
903 ok = false;
904 if (printVerbose) {
905 tty->print_cr("feature list buffer[%d] too short, required: buffer[%ld]", buf_len, -used_len);
906 }
907 } else {
908 if (printVerbose) {
909 tty->print_cr("feature list could not be retrieved. Running on z900 or z990? Trying to find out...");
910 }
911 used_len = call_getFeatures(buffer, 0, 0); // Must provide at least two DW buffer elements!!!!
912
913 ok = used_len > 0;
914 if (ok) {
915 if (buffer[1]*10 < buffer[0]) {
916 set_features_z900();
917 } else {
918 set_features_z990();
919 }
920
921 if (printVerbose) {
922 tty->print_cr("Note: high-speed long displacement test used %ld iterations.", used_len);
923 tty->print_cr(" Positive displacement loads took %8.8lu microseconds.", buffer[1]);
924 tty->print_cr(" Negative displacement loads took %8.8lu microseconds.", buffer[0]);
925 if (has_long_displacement_fast()) {
926 tty->print_cr(" assuming high-speed long displacement IS available.");
927 } else {
928 tty->print_cr(" assuming high-speed long displacement is NOT available.");
929 }
930 }
931 } else {
932 if (printVerbose) {
933 tty->print_cr("Note: high-speed long displacement test was not successful.");
934 tty->print_cr(" assuming long displacement is NOT available.");
935 }
936 }
937 return; // Do not copy buffer to _features, no test for cipher features.
938 }
939 }
940
941 if (ok) {
942 // Fill features buffer.
943 // Clear work buffer.
944 for (int i = 0; i < buf_len; i++) {
945 _features[i] = buffer[i];
946 _cipher_features[i] = 0;
947 _msgdigest_features[i] = 0;
948 buffer[i] = 0L;
949 }
950 _nfeatures = used_len;
951 } else {
952 for (int i = 0; i < buf_len; i++) {
953 _features[i] = 0;
954 _cipher_features[i] = 0;
955 _msgdigest_features[i] = 0;
956 buffer[i] = 0L;
957 }
958 _nfeatures = 0;
959 }
960
961 // Extract Crypto Facility details.
962 if (has_Crypto()) {
963 // Get cipher features.
964 used_len = call_getFeatures(buffer, -2, 0);
965 for (int i = 0; i < buf_len; i++) {
966 _cipher_features[i] = buffer[i];
967 }
968 _ncipher_features = used_len;
969
970 // Get msg digest features.
971 used_len = call_getFeatures(buffer, -3, 0);
972 for (int i = 0; i < buf_len; i++) {
973 _msgdigest_features[i] = buffer[i];
974 }
975 _nmsgdigest_features = used_len;
976 }
977
978 static int levelProperties[_max_cache_levels]; // All property indications per level.
979 static int levelScope[_max_cache_levels]; // private/shared
980 static const char* levelScopeText[4] = {"No cache ",
981 "CPU private",
982 "shared ",
983 "reserved "};
984
985 static int levelType[_max_cache_levels]; // D/I/mixed
986 static const char* levelTypeText[4] = {"separate D and I caches",
987 "I cache only ",
988 "D-cache only ",
989 "combined D/I cache "};
990
991 static unsigned int levelReserved[_max_cache_levels]; // reserved property bits
992 static unsigned int levelLineSize[_max_cache_levels];
993 static unsigned int levelTotalSize[_max_cache_levels];
994 static unsigned int levelAssociativity[_max_cache_levels];
995
996
997 // Extract Cache Layout details.
998 if (has_ExtractCPUAttributes() && printVerbose) { // For information only, as of now.
999 bool lineSize_mismatch;
1000 bool print_something;
1001 long functionResult;
1002 unsigned int attributeIndication = 0; // 0..15
1003 unsigned int levelIndication = 0; // 0..8
1004 unsigned int typeIndication = 0; // 0..1 (D-Cache, I-Cache)
1005 int functionCode = calculate_ECAG_functionCode(attributeIndication, levelIndication, typeIndication);
1006
1007 // Get cache topology.
1008 functionResult = call_getFeatures(buffer, -1, functionCode);
1009
1010 for (unsigned int i = 0; i < _max_cache_levels; i++) {
1011 if (functionResult > 0) {
1012 int shiftVal = 8*(_max_cache_levels-(i+1));
1013 levelProperties[i] = (functionResult & (0xffUL<<shiftVal)) >> shiftVal;
1014 levelReserved[i] = (levelProperties[i] & 0xf0) >> 4;
1015 levelScope[i] = (levelProperties[i] & 0x0c) >> 2;
1016 levelType[i] = (levelProperties[i] & 0x03);
1017 } else {
1018 levelProperties[i] = 0;
1019 levelReserved[i] = 0;
1020 levelScope[i] = 0;
1021 levelType[i] = 0;
1022 }
1023 levelLineSize[i] = 0;
1024 levelTotalSize[i] = 0;
1025 levelAssociativity[i] = 0;
1026 }
1027
1028 tty->cr();
1029 tty->print_cr("------------------------------------");
1030 tty->print_cr("--- Cache Topology Information ---");
1031 tty->print_cr("------------------------------------");
1032 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) {
1033 tty->print_cr(" Cache Level %d: <scope> %s | <type> %s",
1034 i+1, levelScopeText[levelScope[i]], levelTypeText[levelType[i]]);
1035 }
1036
1037 // Get D-cache details per level.
1038 _Dcache_lineSize = 0;
1039 lineSize_mismatch = false;
1040 print_something = false;
1041 typeIndication = 0; // 0..1 (D-Cache, I-Cache)
1042 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) {
1043 if ((levelType[i] == 0) || (levelType[i] == 2)) {
1044 print_something = true;
1045
1046 // Get cache line size of level i.
1047 attributeIndication = 1;
1048 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication);
1049 levelLineSize[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode);
1050
1051 // Get cache total size of level i.
1052 attributeIndication = 2;
1053 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication);
1054 levelTotalSize[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode);
1055
1056 // Get cache associativity of level i.
1057 attributeIndication = 3;
1058 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication);
1059 levelAssociativity[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode);
1060
1061 _Dcache_lineSize = _Dcache_lineSize == 0 ? levelLineSize[i] : _Dcache_lineSize;
1062 lineSize_mismatch = lineSize_mismatch || (_Dcache_lineSize != levelLineSize[i]);
1063 } else {
1064 levelLineSize[i] = 0;
1065 }
1066 }
1067
1068 if (print_something) {
1069 tty->cr();
1070 tty->print_cr("------------------------------------");
1071 tty->print_cr("--- D-Cache Detail Information ---");
1072 tty->print_cr("------------------------------------");
1073 if (lineSize_mismatch) {
1074 tty->print_cr("WARNING: D-Cache line size mismatch!");
1075 }
1076 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) {
1077 if (levelLineSize[i] > 0) {
1078 tty->print_cr(" D-Cache Level %d: line size = %4d, total size = %6dKB, associativity = %2d",
1079 i+1, levelLineSize[i], levelTotalSize[i]/(int)K, levelAssociativity[i]);
1080 }
1081 }
1082 }
1083
1084 // Get I-cache details per level.
1085 _Icache_lineSize = 0;
1086 lineSize_mismatch = false;
1087 print_something = false;
1088 typeIndication = 1; // 0..1 (D-Cache, I-Cache)
1089 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) {
1090 if ((levelType[i] == 0) || (levelType[i] == 1)) {
1091 print_something = true;
1092
1093 // Get cache line size of level i.
1094 attributeIndication = 1;
1095 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication);
1096 levelLineSize[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode);
1097
1098 // Get cache total size of level i.
1099 attributeIndication = 2;
1100 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication);
1101 levelTotalSize[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode);
1102
1103 // Get cache associativity of level i.
1104 attributeIndication = 3;
1105 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication);
1106 levelAssociativity[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode);
1107
1108 _Icache_lineSize = _Icache_lineSize == 0 ? levelLineSize[i] : _Icache_lineSize;
1109 lineSize_mismatch = lineSize_mismatch || (_Icache_lineSize != levelLineSize[i]);
1110 } else {
1111 levelLineSize[i] = 0;
1112 }
1113 }
1114
1115 if (print_something) {
1116 tty->cr();
1117 tty->print_cr("------------------------------------");
1118 tty->print_cr("--- I-Cache Detail Information ---");
1119 tty->print_cr("------------------------------------");
1120 if (lineSize_mismatch) {
1121 tty->print_cr("WARNING: I-Cache line size mismatch!");
1122 }
1123 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) {
1124 if (levelLineSize[i] > 0) {
1125 tty->print_cr(" I-Cache Level %d: line size = %4d, total size = %6dKB, associativity = %2d",
1126 i+1, levelLineSize[i], levelTotalSize[i]/(int)K, levelAssociativity[i]);
1127 }
1128 }
1129 }
1130
1131 // Get D/I-cache details per level.
1132 lineSize_mismatch = false;
1133 print_something = false;
1134 typeIndication = 0; // 0..1 (D-Cache, I-Cache)
1135 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) {
1136 if (levelType[i] == 3) {
1137 print_something = true;
1138
1139 // Get cache line size of level i.
1140 attributeIndication = 1;
1141 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication);
1142 levelLineSize[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode);
1143
1144 // Get cache total size of level i.
1145 attributeIndication = 2;
1146 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication);
1147 levelTotalSize[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode);
1148
1149 // Get cache associativity of level i.
1150 attributeIndication = 3;
1151 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication);
1152 levelAssociativity[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode);
1153
1154 _Dcache_lineSize = _Dcache_lineSize == 0 ? levelLineSize[i] : _Dcache_lineSize;
1155 _Icache_lineSize = _Icache_lineSize == 0 ? levelLineSize[i] : _Icache_lineSize;
1156 lineSize_mismatch = lineSize_mismatch || (_Dcache_lineSize != levelLineSize[i])
1157 || (_Icache_lineSize != levelLineSize[i]);
1158 } else {
1159 levelLineSize[i] = 0;
1160 }
1161 }
1162
1163 if (print_something) {
1164 tty->cr();
1165 tty->print_cr("--------------------------------------");
1166 tty->print_cr("--- D/I-Cache Detail Information ---");
1167 tty->print_cr("--------------------------------------");
1168 if (lineSize_mismatch) {
1169 tty->print_cr("WARNING: D/I-Cache line size mismatch!");
1170 }
1171 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) {
1172 if (levelLineSize[i] > 0) {
1173 tty->print_cr(" D/I-Cache Level %d: line size = %4d, total size = %6dKB, associativity = %2d",
1174 i+1, levelLineSize[i], levelTotalSize[i]/(int)K, levelAssociativity[i]);
1175 }
1176 }
1177 }
1178 tty->cr();
1179 }
1180 return;
1181 }
1182
1183 unsigned long VM_Version::z_SIGILL() {
1184 unsigned long ZeroBuffer = 0;
1185 unsigned long work;
1186 asm(
1187 " LA %[work],%[buffer] \n\t" // Load address of buffer.
1188 " LARL 14,+6 \n\t" // Load address of faulting instruction.
1189 " BCR 15,%[work] \n\t" // Branch into buffer, execute whatever is in there.
1190 : [buffer] "+Q" (ZeroBuffer) /* outputs */
1191 , [work] "=&a" (work) /* outputs */
1192 : /* inputs */
1193 : "cc" /* clobbered */
1194 );
1195 return ZeroBuffer;
1196 }
1197
1198 unsigned long VM_Version::z_SIGSEGV() {
1199 unsigned long ZeroBuffer = 0;
1200 unsigned long work;
1201 asm(
1202 " LG %[work],%[buffer] \n\t" // Load zero address.
1203 " STG %[work],0(,%[work])\n\t" // Store to address zero.
1204 : [buffer] "+Q" (ZeroBuffer) /* outputs */
1205 , [work] "=&a" (work) /* outputs */
1206 : /* inputs */
1207 : "cc" /* clobbered */
1208 );
1209 return ZeroBuffer;
1210 }
1211