1 /* 2 * Copyright (c) 1997, 2019, Oracle and/or its affiliates. All rights reserved. 3 * Copyright (c) 2012, 2019 SAP SE. All rights reserved. 4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 5 * 6 * This code is free software; you can redistribute it and/or modify it 7 * under the terms of the GNU General Public License version 2 only, as 8 * published by the Free Software Foundation. 9 * 10 * This code is distributed in the hope that it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 13 * version 2 for more details (a copy is included in the LICENSE file that 14 * accompanied this code). 15 * 16 * You should have received a copy of the GNU General Public License version 17 * 2 along with this work; if not, write to the Free Software Foundation, 18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 19 * 20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 21 * or visit www.oracle.com if you need additional information or have any 22 * questions. 23 * 24 */ 25 26 #include "precompiled.hpp" 27 #include "jvm.h" 28 #include "asm/assembler.inline.hpp" 29 #include "asm/macroAssembler.inline.hpp" 30 #include "compiler/disassembler.hpp" 31 #include "memory/resourceArea.hpp" 32 #include "runtime/java.hpp" 33 #include "runtime/os.hpp" 34 #include "runtime/stubCodeGenerator.hpp" 35 #include "runtime/vm_version.hpp" 36 #include "utilities/align.hpp" 37 #include "utilities/defaultStream.hpp" 38 #include "utilities/globalDefinitions.hpp" 39 40 #include <sys/sysinfo.h> 41 #if defined(_AIX) 42 #include <libperfstat.h> 43 #endif 44 45 #if defined(LINUX) && defined(VM_LITTLE_ENDIAN) 46 #include <sys/auxv.h> 47 48 #ifndef PPC_FEATURE2_HTM_NOSC 49 #define PPC_FEATURE2_HTM_NOSC (1 << 24) 50 #endif 51 #endif 52 53 bool VM_Version::_is_determine_features_test_running = false; 54 uint64_t VM_Version::_dscr_val = 0; 55 56 #define MSG(flag) \ 57 if (flag && !FLAG_IS_DEFAULT(flag)) \ 58 jio_fprintf(defaultStream::error_stream(), \ 59 "warning: -XX:+" #flag " requires -XX:+UseSIGTRAP\n" \ 60 " -XX:+" #flag " will be disabled!\n"); 61 62 void VM_Version::initialize() { 63 64 // Test which instructions are supported and measure cache line size. 65 determine_features(); 66 67 // If PowerArchitecturePPC64 hasn't been specified explicitly determine from features. 68 if (FLAG_IS_DEFAULT(PowerArchitecturePPC64)) { 69 if (VM_Version::has_darn()) { 70 FLAG_SET_ERGO(PowerArchitecturePPC64, 9); 71 } else if (VM_Version::has_lqarx()) { 72 FLAG_SET_ERGO(PowerArchitecturePPC64, 8); 73 } else if (VM_Version::has_popcntw()) { 74 FLAG_SET_ERGO(PowerArchitecturePPC64, 7); 75 } else if (VM_Version::has_cmpb()) { 76 FLAG_SET_ERGO(PowerArchitecturePPC64, 6); 77 } else if (VM_Version::has_popcntb()) { 78 FLAG_SET_ERGO(PowerArchitecturePPC64, 5); 79 } else { 80 FLAG_SET_ERGO(PowerArchitecturePPC64, 0); 81 } 82 } 83 84 bool PowerArchitecturePPC64_ok = false; 85 switch (PowerArchitecturePPC64) { 86 case 9: if (!VM_Version::has_darn() ) break; 87 case 8: if (!VM_Version::has_lqarx() ) break; 88 case 7: if (!VM_Version::has_popcntw()) break; 89 case 6: if (!VM_Version::has_cmpb() ) break; 90 case 5: if (!VM_Version::has_popcntb()) break; 91 case 0: PowerArchitecturePPC64_ok = true; break; 92 default: break; 93 } 94 guarantee(PowerArchitecturePPC64_ok, "PowerArchitecturePPC64 cannot be set to " 95 UINTX_FORMAT " on this machine", PowerArchitecturePPC64); 96 97 // Power 8: Configure Data Stream Control Register. 98 if (PowerArchitecturePPC64 >= 8 && has_mfdscr()) { 99 config_dscr(); 100 } 101 102 if (!UseSIGTRAP) { 103 MSG(TrapBasedICMissChecks); 104 MSG(TrapBasedNotEntrantChecks); 105 MSG(TrapBasedNullChecks); 106 FLAG_SET_ERGO(TrapBasedNotEntrantChecks, false); 107 FLAG_SET_ERGO(TrapBasedNullChecks, false); 108 FLAG_SET_ERGO(TrapBasedICMissChecks, false); 109 } 110 111 #ifdef COMPILER2 112 if (!UseSIGTRAP) { 113 MSG(TrapBasedRangeChecks); 114 FLAG_SET_ERGO(TrapBasedRangeChecks, false); 115 } 116 117 // On Power6 test for section size. 118 if (PowerArchitecturePPC64 == 6) { 119 determine_section_size(); 120 // TODO: PPC port } else { 121 // TODO: PPC port PdScheduling::power6SectorSize = 0x20; 122 } 123 124 if (PowerArchitecturePPC64 >= 8) { 125 if (FLAG_IS_DEFAULT(SuperwordUseVSX)) { 126 FLAG_SET_ERGO(SuperwordUseVSX, true); 127 } 128 } else { 129 if (SuperwordUseVSX) { 130 warning("SuperwordUseVSX specified, but needs at least Power8."); 131 FLAG_SET_DEFAULT(SuperwordUseVSX, false); 132 } 133 } 134 MaxVectorSize = SuperwordUseVSX ? 16 : 8; 135 136 if (PowerArchitecturePPC64 >= 9) { 137 if (FLAG_IS_DEFAULT(UseCountTrailingZerosInstructionsPPC64)) { 138 FLAG_SET_ERGO(UseCountTrailingZerosInstructionsPPC64, true); 139 } 140 if (FLAG_IS_DEFAULT(UseCharacterCompareIntrinsics)) { 141 FLAG_SET_ERGO(UseCharacterCompareIntrinsics, true); 142 } 143 } else { 144 if (UseCountTrailingZerosInstructionsPPC64) { 145 warning("UseCountTrailingZerosInstructionsPPC64 specified, but needs at least Power9."); 146 FLAG_SET_DEFAULT(UseCountTrailingZerosInstructionsPPC64, false); 147 } 148 if (UseCharacterCompareIntrinsics) { 149 warning("UseCharacterCompareIntrinsics specified, but needs at least Power9."); 150 FLAG_SET_DEFAULT(UseCharacterCompareIntrinsics, false); 151 } 152 } 153 #endif 154 155 // Create and print feature-string. 156 char buf[(num_features+1) * 16]; // Max 16 chars per feature. 157 jio_snprintf(buf, sizeof(buf), 158 "ppc64%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s", 159 (has_fsqrt() ? " fsqrt" : ""), 160 (has_isel() ? " isel" : ""), 161 (has_lxarxeh() ? " lxarxeh" : ""), 162 (has_cmpb() ? " cmpb" : ""), 163 (has_popcntb() ? " popcntb" : ""), 164 (has_popcntw() ? " popcntw" : ""), 165 (has_fcfids() ? " fcfids" : ""), 166 (has_vand() ? " vand" : ""), 167 (has_lqarx() ? " lqarx" : ""), 168 (has_vcipher() ? " aes" : ""), 169 (has_vpmsumb() ? " vpmsumb" : ""), 170 (has_mfdscr() ? " mfdscr" : ""), 171 (has_vsx() ? " vsx" : ""), 172 (has_ldbrx() ? " ldbrx" : ""), 173 (has_stdbrx() ? " stdbrx" : ""), 174 (has_vshasig() ? " sha" : ""), 175 (has_tm() ? " rtm" : ""), 176 (has_darn() ? " darn" : "") 177 // Make sure number of %s matches num_features! 178 ); 179 _features_string = os::strdup(buf); 180 if (Verbose) { 181 print_features(); 182 } 183 184 // PPC64 supports 8-byte compare-exchange operations (see Atomic::cmpxchg) 185 // and 'atomic long memory ops' (see Unsafe_GetLongVolatile). 186 _supports_cx8 = true; 187 188 // Used by C1. 189 _supports_atomic_getset4 = true; 190 _supports_atomic_getadd4 = true; 191 _supports_atomic_getset8 = true; 192 _supports_atomic_getadd8 = true; 193 194 UseSSE = 0; // Only on x86 and x64 195 196 intx cache_line_size = L1_data_cache_line_size(); 197 198 if (FLAG_IS_DEFAULT(AllocatePrefetchStyle)) AllocatePrefetchStyle = 1; 199 200 if (AllocatePrefetchStyle == 4) { 201 AllocatePrefetchStepSize = cache_line_size; // Need exact value. 202 if (FLAG_IS_DEFAULT(AllocatePrefetchLines)) AllocatePrefetchLines = 12; // Use larger blocks by default. 203 if (AllocatePrefetchDistance < 0) AllocatePrefetchDistance = 2*cache_line_size; // Default is not defined? 204 } else { 205 if (cache_line_size > AllocatePrefetchStepSize) AllocatePrefetchStepSize = cache_line_size; 206 if (FLAG_IS_DEFAULT(AllocatePrefetchLines)) AllocatePrefetchLines = 3; // Optimistic value. 207 if (AllocatePrefetchDistance < 0) AllocatePrefetchDistance = 3*cache_line_size; // Default is not defined? 208 } 209 210 assert(AllocatePrefetchLines > 0, "invalid value"); 211 if (AllocatePrefetchLines < 1) { // Set valid value in product VM. 212 AllocatePrefetchLines = 1; // Conservative value. 213 } 214 215 if (AllocatePrefetchStyle == 3 && AllocatePrefetchDistance < cache_line_size) { 216 AllocatePrefetchStyle = 1; // Fall back if inappropriate. 217 } 218 219 assert(AllocatePrefetchStyle >= 0, "AllocatePrefetchStyle should be positive"); 220 221 // If running on Power8 or newer hardware, the implementation uses the available vector instructions. 222 // In all other cases, the implementation uses only generally available instructions. 223 if (!UseCRC32Intrinsics) { 224 if (FLAG_IS_DEFAULT(UseCRC32Intrinsics)) { 225 FLAG_SET_DEFAULT(UseCRC32Intrinsics, true); 226 } 227 } 228 229 // Implementation does not use any of the vector instructions available with Power8. 230 // Their exploitation is still pending (aka "work in progress"). 231 if (!UseCRC32CIntrinsics) { 232 if (FLAG_IS_DEFAULT(UseCRC32CIntrinsics)) { 233 FLAG_SET_DEFAULT(UseCRC32CIntrinsics, true); 234 } 235 } 236 237 // TODO: Provide implementation. 238 if (UseAdler32Intrinsics) { 239 warning("Adler32Intrinsics not available on this CPU."); 240 FLAG_SET_DEFAULT(UseAdler32Intrinsics, false); 241 } 242 243 // The AES intrinsic stubs require AES instruction support. 244 if (has_vcipher()) { 245 if (FLAG_IS_DEFAULT(UseAES)) { 246 UseAES = true; 247 } 248 } else if (UseAES) { 249 if (!FLAG_IS_DEFAULT(UseAES)) 250 warning("AES instructions are not available on this CPU"); 251 FLAG_SET_DEFAULT(UseAES, false); 252 } 253 254 if (UseAES && has_vcipher()) { 255 if (FLAG_IS_DEFAULT(UseAESIntrinsics)) { 256 UseAESIntrinsics = true; 257 } 258 } else if (UseAESIntrinsics) { 259 if (!FLAG_IS_DEFAULT(UseAESIntrinsics)) 260 warning("AES intrinsics are not available on this CPU"); 261 FLAG_SET_DEFAULT(UseAESIntrinsics, false); 262 } 263 264 if (UseAESCTRIntrinsics) { 265 warning("AES/CTR intrinsics are not available on this CPU"); 266 FLAG_SET_DEFAULT(UseAESCTRIntrinsics, false); 267 } 268 269 if (UseGHASHIntrinsics) { 270 warning("GHASH intrinsics are not available on this CPU"); 271 FLAG_SET_DEFAULT(UseGHASHIntrinsics, false); 272 } 273 274 if (FLAG_IS_DEFAULT(UseFMA)) { 275 FLAG_SET_DEFAULT(UseFMA, true); 276 } 277 278 if (has_vshasig()) { 279 if (FLAG_IS_DEFAULT(UseSHA)) { 280 UseSHA = true; 281 } 282 } else if (UseSHA) { 283 if (!FLAG_IS_DEFAULT(UseSHA)) 284 warning("SHA instructions are not available on this CPU"); 285 FLAG_SET_DEFAULT(UseSHA, false); 286 } 287 288 if (UseSHA1Intrinsics) { 289 warning("Intrinsics for SHA-1 crypto hash functions not available on this CPU."); 290 FLAG_SET_DEFAULT(UseSHA1Intrinsics, false); 291 } 292 293 if (UseSHA && has_vshasig()) { 294 if (FLAG_IS_DEFAULT(UseSHA256Intrinsics)) { 295 FLAG_SET_DEFAULT(UseSHA256Intrinsics, true); 296 } 297 } else if (UseSHA256Intrinsics) { 298 warning("Intrinsics for SHA-224 and SHA-256 crypto hash functions not available on this CPU."); 299 FLAG_SET_DEFAULT(UseSHA256Intrinsics, false); 300 } 301 302 if (UseSHA && has_vshasig()) { 303 if (FLAG_IS_DEFAULT(UseSHA512Intrinsics)) { 304 FLAG_SET_DEFAULT(UseSHA512Intrinsics, true); 305 } 306 } else if (UseSHA512Intrinsics) { 307 warning("Intrinsics for SHA-384 and SHA-512 crypto hash functions not available on this CPU."); 308 FLAG_SET_DEFAULT(UseSHA512Intrinsics, false); 309 } 310 311 if (!(UseSHA1Intrinsics || UseSHA256Intrinsics || UseSHA512Intrinsics)) { 312 FLAG_SET_DEFAULT(UseSHA, false); 313 } 314 315 #ifdef COMPILER2 316 if (FLAG_IS_DEFAULT(UseSquareToLenIntrinsic)) { 317 UseSquareToLenIntrinsic = true; 318 } 319 if (FLAG_IS_DEFAULT(UseMulAddIntrinsic)) { 320 UseMulAddIntrinsic = true; 321 } 322 if (FLAG_IS_DEFAULT(UseMultiplyToLenIntrinsic)) { 323 UseMultiplyToLenIntrinsic = true; 324 } 325 if (FLAG_IS_DEFAULT(UseMontgomeryMultiplyIntrinsic)) { 326 UseMontgomeryMultiplyIntrinsic = true; 327 } 328 if (FLAG_IS_DEFAULT(UseMontgomerySquareIntrinsic)) { 329 UseMontgomerySquareIntrinsic = true; 330 } 331 #endif 332 333 if (UseVectorizedMismatchIntrinsic) { 334 warning("UseVectorizedMismatchIntrinsic specified, but not available on this CPU."); 335 FLAG_SET_DEFAULT(UseVectorizedMismatchIntrinsic, false); 336 } 337 338 339 // Adjust RTM (Restricted Transactional Memory) flags. 340 if (UseRTMLocking) { 341 // If CPU or OS do not support TM: 342 // Can't continue because UseRTMLocking affects UseBiasedLocking flag 343 // setting during arguments processing. See use_biased_locking(). 344 // VM_Version_init() is executed after UseBiasedLocking is used 345 // in Thread::allocate(). 346 if (PowerArchitecturePPC64 < 8) { 347 vm_exit_during_initialization("RTM instructions are not available on this CPU."); 348 } 349 350 if (!has_tm()) { 351 vm_exit_during_initialization("RTM is not supported on this OS version."); 352 } 353 } 354 355 if (UseRTMLocking) { 356 #if INCLUDE_RTM_OPT 357 if (!FLAG_IS_CMDLINE(UseRTMLocking)) { 358 // RTM locking should be used only for applications with 359 // high lock contention. For now we do not use it by default. 360 vm_exit_during_initialization("UseRTMLocking flag should be only set on command line"); 361 } 362 #else 363 // Only C2 does RTM locking optimization. 364 // Can't continue because UseRTMLocking affects UseBiasedLocking flag 365 // setting during arguments processing. See use_biased_locking(). 366 vm_exit_during_initialization("RTM locking optimization is not supported in this VM"); 367 #endif 368 } else { // !UseRTMLocking 369 if (UseRTMForStackLocks) { 370 if (!FLAG_IS_DEFAULT(UseRTMForStackLocks)) { 371 warning("UseRTMForStackLocks flag should be off when UseRTMLocking flag is off"); 372 } 373 FLAG_SET_DEFAULT(UseRTMForStackLocks, false); 374 } 375 if (UseRTMDeopt) { 376 FLAG_SET_DEFAULT(UseRTMDeopt, false); 377 } 378 #ifdef COMPILER2 379 if (PrintPreciseRTMLockingStatistics) { 380 FLAG_SET_DEFAULT(PrintPreciseRTMLockingStatistics, false); 381 } 382 #endif 383 } 384 385 // This machine allows unaligned memory accesses 386 if (FLAG_IS_DEFAULT(UseUnalignedAccesses)) { 387 FLAG_SET_DEFAULT(UseUnalignedAccesses, true); 388 } 389 390 check_virtualizations(); 391 } 392 393 void VM_Version::check_virtualizations() { 394 #if defined(_AIX) 395 int rc = 0; 396 perfstat_partition_total_t pinfo; 397 rc = perfstat_partition_total(NULL, &pinfo, sizeof(perfstat_partition_total_t), 1); 398 if (rc == 1) { 399 Abstract_VM_Version::_detected_virtualization = PowerVM; 400 } 401 #else 402 const char* info_file = "/proc/ppc64/lparcfg"; 403 // system_type=...qemu indicates PowerKVM 404 // e.g. system_type=IBM pSeries (emulated by qemu) 405 char line[500]; 406 FILE* fp = fopen(info_file, "r"); 407 if (fp == NULL) { 408 return; 409 } 410 const char* system_type="system_type="; // in case this line contains qemu, it is KVM 411 const char* num_lpars="NumLpars="; // in case of non-KVM : if this line is found it is PowerVM 412 bool num_lpars_found = false; 413 414 while (fgets(line, sizeof(line), fp) != NULL) { 415 if (strncmp(line, system_type, strlen(system_type)) == 0) { 416 if (strstr(line, "qemu") != 0) { 417 Abstract_VM_Version::_detected_virtualization = PowerKVM; 418 fclose(fp); 419 return; 420 } 421 } 422 if (strncmp(line, num_lpars, strlen(num_lpars)) == 0) { 423 num_lpars_found = true; 424 } 425 } 426 if (num_lpars_found) { 427 Abstract_VM_Version::_detected_virtualization = PowerVM; 428 } else { 429 Abstract_VM_Version::_detected_virtualization = PowerFullPartitionMode; 430 } 431 fclose(fp); 432 #endif 433 } 434 435 void VM_Version::print_platform_virtualization_info(outputStream* st) { 436 #if defined(_AIX) 437 // more info about perfstat API see 438 // https://www.ibm.com/support/knowledgecenter/en/ssw_aix_72/com.ibm.aix.prftools/idprftools_perfstat_glob_partition.htm 439 int rc = 0; 440 perfstat_partition_total_t pinfo; 441 memset(&pinfo, 0, sizeof(perfstat_partition_total_t)); 442 rc = perfstat_partition_total(NULL, &pinfo, sizeof(perfstat_partition_total_t), 1); 443 if (rc != 1) { 444 return; 445 } else { 446 st->print_cr("Virtualization type : PowerVM"); 447 } 448 // CPU information 449 perfstat_cpu_total_t cpuinfo; 450 memset(&cpuinfo, 0, sizeof(perfstat_cpu_total_t)); 451 rc = perfstat_cpu_total(NULL, &cpuinfo, sizeof(perfstat_cpu_total_t), 1); 452 if (rc != 1) { 453 return; 454 } 455 456 st->print_cr("Processor description : %s", cpuinfo.description); 457 st->print_cr("Processor speed : %llu Hz", cpuinfo.processorHZ); 458 459 st->print_cr("LPAR partition name : %s", pinfo.name); 460 st->print_cr("LPAR partition number : %u", pinfo.lpar_id); 461 st->print_cr("LPAR partition type : %s", pinfo.type.b.shared_enabled ? "shared" : "dedicated"); 462 st->print_cr("LPAR mode : %s", pinfo.type.b.donate_enabled ? "donating" : pinfo.type.b.capped ? "capped" : "uncapped"); 463 st->print_cr("LPAR partition group ID : %u", pinfo.group_id); 464 st->print_cr("LPAR shared pool ID : %u", pinfo.pool_id); 465 466 st->print_cr("AMS (active memory sharing) : %s", pinfo.type.b.ams_capable ? "capable" : "not capable"); 467 st->print_cr("AMS (active memory sharing) : %s", pinfo.type.b.ams_enabled ? "on" : "off"); 468 st->print_cr("AME (active memory expansion) : %s", pinfo.type.b.ame_enabled ? "on" : "off"); 469 470 if (pinfo.type.b.ame_enabled) { 471 st->print_cr("AME true memory in bytes : %llu", pinfo.true_memory); 472 st->print_cr("AME expanded memory in bytes : %llu", pinfo.expanded_memory); 473 } 474 475 st->print_cr("SMT : %s", pinfo.type.b.smt_capable ? "capable" : "not capable"); 476 st->print_cr("SMT : %s", pinfo.type.b.smt_enabled ? "on" : "off"); 477 int ocpus = pinfo.online_cpus > 0 ? pinfo.online_cpus : 1; 478 st->print_cr("LPAR threads : %d", cpuinfo.ncpus/ocpus); 479 st->print_cr("LPAR online virtual cpus : %d", pinfo.online_cpus); 480 st->print_cr("LPAR logical cpus : %d", cpuinfo.ncpus); 481 st->print_cr("LPAR maximum virtual cpus : %u", pinfo.max_cpus); 482 st->print_cr("LPAR minimum virtual cpus : %u", pinfo.min_cpus); 483 st->print_cr("LPAR entitled capacity : %4.2f", (double) (pinfo.entitled_proc_capacity/100.0)); 484 st->print_cr("LPAR online memory : %llu MB", pinfo.online_memory); 485 st->print_cr("LPAR maximum memory : %llu MB", pinfo.max_memory); 486 st->print_cr("LPAR minimum memory : %llu MB", pinfo.min_memory); 487 #else 488 const char* info_file = "/proc/ppc64/lparcfg"; 489 const char* kw[] = { "system_type=", // qemu indicates PowerKVM 490 "partition_entitled_capacity=", // entitled processor capacity percentage 491 "partition_max_entitled_capacity=", 492 "capacity_weight=", // partition CPU weight 493 "partition_active_processors=", 494 "partition_potential_processors=", 495 "entitled_proc_capacity_available=", 496 "capped=", // 0 - uncapped, 1 - vcpus capped at entitled processor capacity percentage 497 "shared_processor_mode=", // (non)dedicated partition 498 "system_potential_processors=", 499 "pool=", // CPU-pool number 500 "pool_capacity=", 501 "NumLpars=", // on non-KVM machines, NumLpars is not found for full partition mode machines 502 NULL }; 503 if (!print_matching_lines_from_file(info_file, st, kw)) { 504 st->print_cr(" <%s Not Available>", info_file); 505 } 506 #endif 507 } 508 509 bool VM_Version::use_biased_locking() { 510 #if INCLUDE_RTM_OPT 511 // RTM locking is most useful when there is high lock contention and 512 // low data contention. With high lock contention the lock is usually 513 // inflated and biased locking is not suitable for that case. 514 // RTM locking code requires that biased locking is off. 515 // Note: we can't switch off UseBiasedLocking in get_processor_features() 516 // because it is used by Thread::allocate() which is called before 517 // VM_Version::initialize(). 518 if (UseRTMLocking && UseBiasedLocking) { 519 if (FLAG_IS_DEFAULT(UseBiasedLocking)) { 520 FLAG_SET_DEFAULT(UseBiasedLocking, false); 521 } else { 522 warning("Biased locking is not supported with RTM locking; ignoring UseBiasedLocking flag." ); 523 UseBiasedLocking = false; 524 } 525 } 526 #endif 527 return UseBiasedLocking; 528 } 529 530 void VM_Version::print_features() { 531 tty->print_cr("Version: %s L1_data_cache_line_size=%d", features_string(), L1_data_cache_line_size()); 532 } 533 534 #ifdef COMPILER2 535 // Determine section size on power6: If section size is 8 instructions, 536 // there should be a difference between the two testloops of ~15 %. If 537 // no difference is detected the section is assumed to be 32 instructions. 538 void VM_Version::determine_section_size() { 539 540 int unroll = 80; 541 542 const int code_size = (2* unroll * 32 + 100)*BytesPerInstWord; 543 544 // Allocate space for the code. 545 ResourceMark rm; 546 CodeBuffer cb("detect_section_size", code_size, 0); 547 MacroAssembler* a = new MacroAssembler(&cb); 548 549 uint32_t *code = (uint32_t *)a->pc(); 550 // Emit code. 551 void (*test1)() = (void(*)())(void *)a->function_entry(); 552 553 Label l1; 554 555 a->li(R4, 1); 556 a->sldi(R4, R4, 28); 557 a->b(l1); 558 a->align(CodeEntryAlignment); 559 560 a->bind(l1); 561 562 for (int i = 0; i < unroll; i++) { 563 // Schleife 1 564 // ------- sector 0 ------------ 565 // ;; 0 566 a->nop(); // 1 567 a->fpnop0(); // 2 568 a->fpnop1(); // 3 569 a->addi(R4,R4, -1); // 4 570 571 // ;; 1 572 a->nop(); // 5 573 a->fmr(F6, F6); // 6 574 a->fmr(F7, F7); // 7 575 a->endgroup(); // 8 576 // ------- sector 8 ------------ 577 578 // ;; 2 579 a->nop(); // 9 580 a->nop(); // 10 581 a->fmr(F8, F8); // 11 582 a->fmr(F9, F9); // 12 583 584 // ;; 3 585 a->nop(); // 13 586 a->fmr(F10, F10); // 14 587 a->fmr(F11, F11); // 15 588 a->endgroup(); // 16 589 // -------- sector 16 ------------- 590 591 // ;; 4 592 a->nop(); // 17 593 a->nop(); // 18 594 a->fmr(F15, F15); // 19 595 a->fmr(F16, F16); // 20 596 597 // ;; 5 598 a->nop(); // 21 599 a->fmr(F17, F17); // 22 600 a->fmr(F18, F18); // 23 601 a->endgroup(); // 24 602 // ------- sector 24 ------------ 603 604 // ;; 6 605 a->nop(); // 25 606 a->nop(); // 26 607 a->fmr(F19, F19); // 27 608 a->fmr(F20, F20); // 28 609 610 // ;; 7 611 a->nop(); // 29 612 a->fmr(F21, F21); // 30 613 a->fmr(F22, F22); // 31 614 a->brnop0(); // 32 615 616 // ------- sector 32 ------------ 617 } 618 619 // ;; 8 620 a->cmpdi(CCR0, R4, unroll); // 33 621 a->bge(CCR0, l1); // 34 622 a->blr(); 623 624 // Emit code. 625 void (*test2)() = (void(*)())(void *)a->function_entry(); 626 // uint32_t *code = (uint32_t *)a->pc(); 627 628 Label l2; 629 630 a->li(R4, 1); 631 a->sldi(R4, R4, 28); 632 a->b(l2); 633 a->align(CodeEntryAlignment); 634 635 a->bind(l2); 636 637 for (int i = 0; i < unroll; i++) { 638 // Schleife 2 639 // ------- sector 0 ------------ 640 // ;; 0 641 a->brnop0(); // 1 642 a->nop(); // 2 643 //a->cmpdi(CCR0, R4, unroll); 644 a->fpnop0(); // 3 645 a->fpnop1(); // 4 646 a->addi(R4,R4, -1); // 5 647 648 // ;; 1 649 650 a->nop(); // 6 651 a->fmr(F6, F6); // 7 652 a->fmr(F7, F7); // 8 653 // ------- sector 8 --------------- 654 655 // ;; 2 656 a->endgroup(); // 9 657 658 // ;; 3 659 a->nop(); // 10 660 a->nop(); // 11 661 a->fmr(F8, F8); // 12 662 663 // ;; 4 664 a->fmr(F9, F9); // 13 665 a->nop(); // 14 666 a->fmr(F10, F10); // 15 667 668 // ;; 5 669 a->fmr(F11, F11); // 16 670 // -------- sector 16 ------------- 671 672 // ;; 6 673 a->endgroup(); // 17 674 675 // ;; 7 676 a->nop(); // 18 677 a->nop(); // 19 678 a->fmr(F15, F15); // 20 679 680 // ;; 8 681 a->fmr(F16, F16); // 21 682 a->nop(); // 22 683 a->fmr(F17, F17); // 23 684 685 // ;; 9 686 a->fmr(F18, F18); // 24 687 // -------- sector 24 ------------- 688 689 // ;; 10 690 a->endgroup(); // 25 691 692 // ;; 11 693 a->nop(); // 26 694 a->nop(); // 27 695 a->fmr(F19, F19); // 28 696 697 // ;; 12 698 a->fmr(F20, F20); // 29 699 a->nop(); // 30 700 a->fmr(F21, F21); // 31 701 702 // ;; 13 703 a->fmr(F22, F22); // 32 704 } 705 706 // -------- sector 32 ------------- 707 // ;; 14 708 a->cmpdi(CCR0, R4, unroll); // 33 709 a->bge(CCR0, l2); // 34 710 711 a->blr(); 712 uint32_t *code_end = (uint32_t *)a->pc(); 713 a->flush(); 714 715 cb.insts()->set_end((u_char*)code_end); 716 717 double loop1_seconds,loop2_seconds, rel_diff; 718 uint64_t start1, stop1; 719 720 start1 = os::current_thread_cpu_time(false); 721 (*test1)(); 722 stop1 = os::current_thread_cpu_time(false); 723 loop1_seconds = (stop1- start1) / (1000 *1000 *1000.0); 724 725 726 start1 = os::current_thread_cpu_time(false); 727 (*test2)(); 728 stop1 = os::current_thread_cpu_time(false); 729 730 loop2_seconds = (stop1 - start1) / (1000 *1000 *1000.0); 731 732 rel_diff = (loop2_seconds - loop1_seconds) / loop1_seconds *100; 733 734 if (PrintAssembly || PrintStubCode) { 735 ttyLocker ttyl; 736 tty->print_cr("Decoding section size detection stub at " INTPTR_FORMAT " before execution:", p2i(code)); 737 // Use existing decode function. This enables the [MachCode] format which is needed to DecodeErrorFile. 738 Disassembler::decode(&cb, (u_char*)code, (u_char*)code_end, tty); 739 tty->print_cr("Time loop1 :%f", loop1_seconds); 740 tty->print_cr("Time loop2 :%f", loop2_seconds); 741 tty->print_cr("(time2 - time1) / time1 = %f %%", rel_diff); 742 743 if (rel_diff > 12.0) { 744 tty->print_cr("Section Size 8 Instructions"); 745 } else{ 746 tty->print_cr("Section Size 32 Instructions or Power5"); 747 } 748 } 749 750 #if 0 // TODO: PPC port 751 // Set sector size (if not set explicitly). 752 if (FLAG_IS_DEFAULT(Power6SectorSize128PPC64)) { 753 if (rel_diff > 12.0) { 754 PdScheduling::power6SectorSize = 0x20; 755 } else { 756 PdScheduling::power6SectorSize = 0x80; 757 } 758 } else if (Power6SectorSize128PPC64) { 759 PdScheduling::power6SectorSize = 0x80; 760 } else { 761 PdScheduling::power6SectorSize = 0x20; 762 } 763 #endif 764 if (UsePower6SchedulerPPC64) Unimplemented(); 765 } 766 #endif // COMPILER2 767 768 void VM_Version::determine_features() { 769 #if defined(ABI_ELFv2) 770 // 1 InstWord per call for the blr instruction. 771 const int code_size = (num_features+1+2*1)*BytesPerInstWord; 772 #else 773 // 7 InstWords for each call (function descriptor + blr instruction). 774 const int code_size = (num_features+1+2*7)*BytesPerInstWord; 775 #endif 776 int features = 0; 777 778 // create test area 779 enum { BUFFER_SIZE = 2*4*K }; // Needs to be >=2* max cache line size (cache line size can't exceed min page size). 780 char test_area[BUFFER_SIZE]; 781 char *mid_of_test_area = &test_area[BUFFER_SIZE>>1]; 782 783 // Allocate space for the code. 784 ResourceMark rm; 785 CodeBuffer cb("detect_cpu_features", code_size, 0); 786 MacroAssembler* a = new MacroAssembler(&cb); 787 788 // Must be set to true so we can generate the test code. 789 _features = VM_Version::all_features_m; 790 791 // Emit code. 792 void (*test)(address addr, uint64_t offset)=(void(*)(address addr, uint64_t offset))(void *)a->function_entry(); 793 uint32_t *code = (uint32_t *)a->pc(); 794 // Don't use R0 in ldarx. 795 // Keep R3_ARG1 unmodified, it contains &field (see below). 796 // Keep R4_ARG2 unmodified, it contains offset = 0 (see below). 797 a->fsqrt(F3, F4); // code[0] -> fsqrt_m 798 a->fsqrts(F3, F4); // code[1] -> fsqrts_m 799 a->isel(R7, R5, R6, 0); // code[2] -> isel_m 800 a->ldarx_unchecked(R7, R3_ARG1, R4_ARG2, 1); // code[3] -> lxarx_m 801 a->cmpb(R7, R5, R6); // code[4] -> cmpb 802 a->popcntb(R7, R5); // code[5] -> popcntb 803 a->popcntw(R7, R5); // code[6] -> popcntw 804 a->fcfids(F3, F4); // code[7] -> fcfids 805 a->vand(VR0, VR0, VR0); // code[8] -> vand 806 // arg0 of lqarx must be an even register, (arg1 + arg2) must be a multiple of 16 807 a->lqarx_unchecked(R6, R3_ARG1, R4_ARG2, 1); // code[9] -> lqarx_m 808 a->vcipher(VR0, VR1, VR2); // code[10] -> vcipher 809 a->vpmsumb(VR0, VR1, VR2); // code[11] -> vpmsumb 810 a->mfdscr(R0); // code[12] -> mfdscr 811 a->lxvd2x(VSR0, R3_ARG1); // code[13] -> vsx 812 a->ldbrx(R7, R3_ARG1, R4_ARG2); // code[14] -> ldbrx 813 a->stdbrx(R7, R3_ARG1, R4_ARG2); // code[15] -> stdbrx 814 a->vshasigmaw(VR0, VR1, 1, 0xF); // code[16] -> vshasig 815 // rtm is determined by OS 816 a->darn(R7); // code[17] -> darn 817 a->blr(); 818 819 // Emit function to set one cache line to zero. Emit function descriptor and get pointer to it. 820 void (*zero_cacheline_func_ptr)(char*) = (void(*)(char*))(void *)a->function_entry(); 821 a->dcbz(R3_ARG1); // R3_ARG1 = addr 822 a->blr(); 823 824 uint32_t *code_end = (uint32_t *)a->pc(); 825 a->flush(); 826 _features = VM_Version::unknown_m; 827 828 // Print the detection code. 829 if (PrintAssembly) { 830 ttyLocker ttyl; 831 tty->print_cr("Decoding cpu-feature detection stub at " INTPTR_FORMAT " before execution:", p2i(code)); 832 Disassembler::decode((u_char*)code, (u_char*)code_end, tty); 833 } 834 835 // Measure cache line size. 836 memset(test_area, 0xFF, BUFFER_SIZE); // Fill test area with 0xFF. 837 (*zero_cacheline_func_ptr)(mid_of_test_area); // Call function which executes dcbz to the middle. 838 int count = 0; // count zeroed bytes 839 for (int i = 0; i < BUFFER_SIZE; i++) if (test_area[i] == 0) count++; 840 guarantee(is_power_of_2(count), "cache line size needs to be a power of 2"); 841 _L1_data_cache_line_size = count; 842 843 // Execute code. Illegal instructions will be replaced by 0 in the signal handler. 844 VM_Version::_is_determine_features_test_running = true; 845 // We must align the first argument to 16 bytes because of the lqarx check. 846 (*test)(align_up((address)mid_of_test_area, 16), 0); 847 VM_Version::_is_determine_features_test_running = false; 848 849 // determine which instructions are legal. 850 int feature_cntr = 0; 851 if (code[feature_cntr++]) features |= fsqrt_m; 852 if (code[feature_cntr++]) features |= fsqrts_m; 853 if (code[feature_cntr++]) features |= isel_m; 854 if (code[feature_cntr++]) features |= lxarxeh_m; 855 if (code[feature_cntr++]) features |= cmpb_m; 856 if (code[feature_cntr++]) features |= popcntb_m; 857 if (code[feature_cntr++]) features |= popcntw_m; 858 if (code[feature_cntr++]) features |= fcfids_m; 859 if (code[feature_cntr++]) features |= vand_m; 860 if (code[feature_cntr++]) features |= lqarx_m; 861 if (code[feature_cntr++]) features |= vcipher_m; 862 if (code[feature_cntr++]) features |= vpmsumb_m; 863 if (code[feature_cntr++]) features |= mfdscr_m; 864 if (code[feature_cntr++]) features |= vsx_m; 865 if (code[feature_cntr++]) features |= ldbrx_m; 866 if (code[feature_cntr++]) features |= stdbrx_m; 867 if (code[feature_cntr++]) features |= vshasig_m; 868 // feature rtm_m is determined by OS 869 if (code[feature_cntr++]) features |= darn_m; 870 871 // Print the detection code. 872 if (PrintAssembly) { 873 ttyLocker ttyl; 874 tty->print_cr("Decoding cpu-feature detection stub at " INTPTR_FORMAT " after execution:", p2i(code)); 875 Disassembler::decode((u_char*)code, (u_char*)code_end, tty); 876 } 877 878 _features = features; 879 880 #ifdef AIX 881 // To enable it on AIX it's necessary POWER8 or above and at least AIX 7.2. 882 // Actually, this is supported since AIX 7.1.. Unfortunately, this first 883 // contained bugs, so that it can only be enabled after AIX 7.1.3.30. 884 // The Java property os.version, which is used in RTM tests to decide 885 // whether the feature is available, only knows major and minor versions. 886 // We don't want to change this property, as user code might depend on it. 887 // So the tests can not check on subversion 3.30, and we only enable RTM 888 // with AIX 7.2. 889 if (has_lqarx()) { // POWER8 or above 890 if (os::Aix::os_version() >= 0x07020000) { // At least AIX 7.2. 891 _features |= rtm_m; 892 } 893 } 894 #endif 895 #if defined(LINUX) && defined(VM_LITTLE_ENDIAN) 896 unsigned long auxv = getauxval(AT_HWCAP2); 897 898 if (auxv & PPC_FEATURE2_HTM_NOSC) { 899 if (auxv & PPC_FEATURE2_HAS_HTM) { 900 // TM on POWER8 and POWER9 in compat mode (VM) is supported by the JVM. 901 // TM on POWER9 DD2.1 NV (baremetal) is not supported by the JVM (TM on 902 // POWER9 DD2.1 NV has a few issues that need a couple of firmware 903 // and kernel workarounds, so there is a new mode only supported 904 // on non-virtualized P9 machines called HTM with no Suspend Mode). 905 // TM on POWER9 D2.2+ NV is not supported at all by Linux. 906 _features |= rtm_m; 907 } 908 } 909 #endif 910 } 911 912 // Power 8: Configure Data Stream Control Register. 913 void VM_Version::config_dscr() { 914 // 7 InstWords for each call (function descriptor + blr instruction). 915 const int code_size = (2+2*7)*BytesPerInstWord; 916 917 // Allocate space for the code. 918 ResourceMark rm; 919 CodeBuffer cb("config_dscr", code_size, 0); 920 MacroAssembler* a = new MacroAssembler(&cb); 921 922 // Emit code. 923 uint64_t (*get_dscr)() = (uint64_t(*)())(void *)a->function_entry(); 924 uint32_t *code = (uint32_t *)a->pc(); 925 a->mfdscr(R3); 926 a->blr(); 927 928 void (*set_dscr)(long) = (void(*)(long))(void *)a->function_entry(); 929 a->mtdscr(R3); 930 a->blr(); 931 932 uint32_t *code_end = (uint32_t *)a->pc(); 933 a->flush(); 934 935 // Print the detection code. 936 if (PrintAssembly) { 937 ttyLocker ttyl; 938 tty->print_cr("Decoding dscr configuration stub at " INTPTR_FORMAT " before execution:", p2i(code)); 939 Disassembler::decode((u_char*)code, (u_char*)code_end, tty); 940 } 941 942 // Apply the configuration if needed. 943 _dscr_val = (*get_dscr)(); 944 if (Verbose) { 945 tty->print_cr("dscr value was 0x%lx" , _dscr_val); 946 } 947 bool change_requested = false; 948 if (DSCR_PPC64 != (uintx)-1) { 949 _dscr_val = DSCR_PPC64; 950 change_requested = true; 951 } 952 if (DSCR_DPFD_PPC64 <= 7) { 953 uint64_t mask = 0x7; 954 if ((_dscr_val & mask) != DSCR_DPFD_PPC64) { 955 _dscr_val = (_dscr_val & ~mask) | (DSCR_DPFD_PPC64); 956 change_requested = true; 957 } 958 } 959 if (DSCR_URG_PPC64 <= 7) { 960 uint64_t mask = 0x7 << 6; 961 if ((_dscr_val & mask) != DSCR_DPFD_PPC64 << 6) { 962 _dscr_val = (_dscr_val & ~mask) | (DSCR_URG_PPC64 << 6); 963 change_requested = true; 964 } 965 } 966 if (change_requested) { 967 (*set_dscr)(_dscr_val); 968 if (Verbose) { 969 tty->print_cr("dscr was set to 0x%lx" , (*get_dscr)()); 970 } 971 } 972 } 973 974 static uint64_t saved_features = 0; 975 976 void VM_Version::allow_all() { 977 saved_features = _features; 978 _features = all_features_m; 979 } 980 981 void VM_Version::revert() { 982 _features = saved_features; 983 }