9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #ifndef OS_CPU_LINUX_ARM_ATOMIC_LINUX_ARM_HPP
  26 #define OS_CPU_LINUX_ARM_ATOMIC_LINUX_ARM_HPP
  27 
  28 #include "runtime/os.hpp"
  29 #include "vm_version_arm.hpp"
  30 
  31 // Implementation of class atomic
  32 
  33 /*
  34  * Atomic long operations on 32-bit ARM
  35  * ARM v7 supports LDREXD/STREXD synchronization instructions so no problem.
  36  * ARM < v7 does not have explicit 64 atomic load/store capability.
  37  * However, gcc emits LDRD/STRD instructions on v5te and LDM/STM on v5t
  38  * when loading/storing 64 bits.
  39  * For non-MP machines (which is all we support for ARM < v7)
  40  * under current Linux distros these instructions appear atomic.
  41  * See section A3.5.3 of ARM Architecture Reference Manual for ARM v7.
  42  * Also, for cmpxchg64, if ARM < v7 we check for cmpxchg64 support in the
  43  * Linux kernel using _kuser_helper_version. See entry-armv.S in the Linux
  44  * kernel source or kernel_user_helpers.txt in Linux Doc.
  45  */
  46 
  47 template<>
  48 template<typename T>
  49 inline T Atomic::PlatformLoad<8>::operator()(T const volatile* src) const {

   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #ifndef OS_CPU_LINUX_ARM_ATOMIC_LINUX_ARM_HPP
  26 #define OS_CPU_LINUX_ARM_ATOMIC_LINUX_ARM_HPP
  27 
  28 #include "runtime/os.hpp"
  29 #include "runtime/vm_version.hpp"
  30 
  31 // Implementation of class atomic
  32 
  33 /*
  34  * Atomic long operations on 32-bit ARM
  35  * ARM v7 supports LDREXD/STREXD synchronization instructions so no problem.
  36  * ARM < v7 does not have explicit 64 atomic load/store capability.
  37  * However, gcc emits LDRD/STRD instructions on v5te and LDM/STM on v5t
  38  * when loading/storing 64 bits.
  39  * For non-MP machines (which is all we support for ARM < v7)
  40  * under current Linux distros these instructions appear atomic.
  41  * See section A3.5.3 of ARM Architecture Reference Manual for ARM v7.
  42  * Also, for cmpxchg64, if ARM < v7 we check for cmpxchg64 support in the
  43  * Linux kernel using _kuser_helper_version. See entry-armv.S in the Linux
  44  * kernel source or kernel_user_helpers.txt in Linux Doc.
  45  */
  46 
  47 template<>
  48 template<typename T>
  49 inline T Atomic::PlatformLoad<8>::operator()(T const volatile* src) const {