1 /*
2 * Copyright (c) 2016, 2017, Oracle and/or its affiliates. All rights reserved.
3 * Copyright (c) 2016, 2017 SAP SE. All rights reserved.
4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
5 *
6 * This code is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 only, as
8 * published by the Free Software Foundation.
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #include "precompiled.hpp"
27 #include "jvm.h"
28 #include "asm/assembler.inline.hpp"
29 #include "compiler/disassembler.hpp"
30 #include "code/compiledIC.hpp"
31 #include "memory/resourceArea.hpp"
32 #include "runtime/java.hpp"
33 #include "runtime/stubCodeGenerator.hpp"
34 #include "vm_version_s390.hpp"
35
36 # include <sys/sysinfo.h>
37
38 bool VM_Version::_is_determine_features_test_running = false;
39
40 unsigned long VM_Version::_features[_features_buffer_len] = {0, 0, 0, 0};
41 unsigned long VM_Version::_cipher_features[_features_buffer_len] = {0, 0, 0, 0};
42 unsigned long VM_Version::_msgdigest_features[_features_buffer_len] = {0, 0, 0, 0};
43 unsigned int VM_Version::_nfeatures = 0;
44 unsigned int VM_Version::_ncipher_features = 0;
45 unsigned int VM_Version::_nmsgdigest_features = 0;
46 unsigned int VM_Version::_Dcache_lineSize = 256;
47 unsigned int VM_Version::_Icache_lineSize = 256;
48
49 static const char* z_gen[] = {" ", "G1", "G2", "G3", "G4", "G5", "G6", "G7" };
50 static const char* z_machine[] = {" ", "2064", "2084", "2094", "2097", "2817", " ", "2964" };
51 static const char* z_name[] = {" ", "z900", "z990", "z9 EC", "z10 EC", "z196 EC", "ec12", "z13" };
52
53 void VM_Version::initialize() {
54 determine_features(); // Get processor capabilities.
55 set_features_string(); // Set a descriptive feature indication.
56
57 if (Verbose) {
58 print_features();
59 }
60
61 intx cache_line_size = Dcache_lineSize(0);
62
63 MaxVectorSize = 8;
64
65 if (has_PrefetchRaw()) {
66 if (FLAG_IS_DEFAULT(AllocatePrefetchStyle)) { // not preset
67 // 0 = no prefetch.
68 // 1 = Prefetch instructions for each allocation.
69 // 2 = Use TLAB watermark to gate allocation prefetch.
70 AllocatePrefetchStyle = 1;
71 }
72
73 if (AllocatePrefetchStyle > 0) { // Prefetching turned on at all?
74 // Distance to prefetch ahead of allocation pointer.
75 if (FLAG_IS_DEFAULT(AllocatePrefetchDistance) || (AllocatePrefetchDistance < 0)) { // not preset
76 AllocatePrefetchDistance = 0;
77 }
78
79 // Number of lines to prefetch ahead of allocation pointer.
80 if (FLAG_IS_DEFAULT(AllocatePrefetchLines) || (AllocatePrefetchLines <= 0)) { // not preset
81 AllocatePrefetchLines = 3;
82 }
83
84 // Step size in bytes of sequential prefetch instructions.
85 if (FLAG_IS_DEFAULT(AllocatePrefetchStepSize) || (AllocatePrefetchStepSize <= 0)) { // not preset
86 FLAG_SET_DEFAULT(AllocatePrefetchStepSize, cache_line_size);
87 } else if (AllocatePrefetchStepSize < cache_line_size) {
88 FLAG_SET_DEFAULT(AllocatePrefetchStepSize, cache_line_size);
89 } else {
90 FLAG_SET_DEFAULT(AllocatePrefetchStepSize, cache_line_size);
91 }
92 } else {
93 FLAG_SET_DEFAULT(AllocatePrefetchStyle, 0);
94 AllocatePrefetchDistance = 0;
95 AllocatePrefetchLines = 0;
96 // Can't be zero. Will SIGFPE during constraints checking.
97 FLAG_SET_DEFAULT(AllocatePrefetchStepSize, cache_line_size);
98 }
99
100 } else {
101 FLAG_SET_DEFAULT(AllocatePrefetchStyle, 0);
102 AllocatePrefetchDistance = 0;
103 AllocatePrefetchLines = 0;
104 // Can't be zero. Will SIGFPE during constraints checking.
105 FLAG_SET_DEFAULT(AllocatePrefetchStepSize, cache_line_size);
106 }
107
108 // TODO:
109 // On z/Architecture, cache line size is significantly large (256 bytes). Do we really need
110 // to keep contended members that far apart? Performance tests are required.
111 if (FLAG_IS_DEFAULT(ContendedPaddingWidth) && (cache_line_size > ContendedPaddingWidth)) {
112 ContendedPaddingWidth = cache_line_size;
113 }
114
115 // On z/Architecture, the CRC32/CRC32C intrinsics are implemented "by hand".
116 // TODO: Provide implementation based on the vector instructions available from z13.
117 // Note: The CHECKSUM instruction, which has been there since the very beginning
118 // (of z/Architecture), computes "some kind of" a checksum.
119 // It has nothing to do with the CRC32 algorithm.
120 if (FLAG_IS_DEFAULT(UseCRC32Intrinsics)) {
121 FLAG_SET_DEFAULT(UseCRC32Intrinsics, true);
122 }
123 if (FLAG_IS_DEFAULT(UseCRC32CIntrinsics)) {
124 FLAG_SET_DEFAULT(UseCRC32CIntrinsics, true);
125 }
126
127 // TODO: Provide implementation.
128 if (UseAdler32Intrinsics) {
129 warning("Adler32Intrinsics not available on this CPU.");
130 FLAG_SET_DEFAULT(UseAdler32Intrinsics, false);
131 }
132
133 // On z/Architecture, we take UseAES as the general switch to enable/disable the AES intrinsics.
134 // The specific, and yet to be defined, switches UseAESxxxIntrinsics will then be set
135 // depending on the actual machine capabilities.
136 // Explicitly setting them via CmdLine option takes precedence, of course.
137 // TODO: UseAESIntrinsics must be made keylength specific.
138 // As of March 2015 and Java8, only AES128 is supported by the Java Cryptographic Extensions.
139 // Therefore, UseAESIntrinsics is of minimal use at the moment.
140 if (FLAG_IS_DEFAULT(UseAES) && has_Crypto_AES()) {
141 FLAG_SET_DEFAULT(UseAES, true);
142 }
143 if (UseAES && !has_Crypto_AES()) {
144 warning("AES instructions are not available on this CPU");
145 FLAG_SET_DEFAULT(UseAES, false);
146 }
147 if (UseAES) {
148 if (FLAG_IS_DEFAULT(UseAESIntrinsics)) {
149 FLAG_SET_DEFAULT(UseAESIntrinsics, true);
150 }
151 }
152 if (UseAESIntrinsics && !has_Crypto_AES()) {
153 warning("AES intrinsics are not available on this CPU");
154 FLAG_SET_DEFAULT(UseAESIntrinsics, false);
155 }
156 if (UseAESIntrinsics && !UseAES) {
157 warning("AES intrinsics require UseAES flag to be enabled. Intrinsics will be disabled.");
158 FLAG_SET_DEFAULT(UseAESIntrinsics, false);
159 }
160
161 // TODO: implement AES/CTR intrinsics
162 if (UseAESCTRIntrinsics) {
163 warning("AES/CTR intrinsics are not available on this CPU");
164 FLAG_SET_DEFAULT(UseAESCTRIntrinsics, false);
165 }
166
167 // TODO: implement GHASH intrinsics
168 if (UseGHASHIntrinsics) {
169 warning("GHASH intrinsics are not available on this CPU");
170 FLAG_SET_DEFAULT(UseGHASHIntrinsics, false);
171 }
172
173 if (FLAG_IS_DEFAULT(UseFMA)) {
174 FLAG_SET_DEFAULT(UseFMA, true);
175 }
176
177 // On z/Architecture, we take UseSHA as the general switch to enable/disable the SHA intrinsics.
178 // The specific switches UseSHAxxxIntrinsics will then be set depending on the actual
179 // machine capabilities.
180 // Explicitly setting them via CmdLine option takes precedence, of course.
181 if (FLAG_IS_DEFAULT(UseSHA) && has_Crypto_SHA()) {
182 FLAG_SET_DEFAULT(UseSHA, true);
183 }
184 if (UseSHA && !has_Crypto_SHA()) {
185 warning("SHA instructions are not available on this CPU");
186 FLAG_SET_DEFAULT(UseSHA, false);
187 }
188 if (UseSHA && has_Crypto_SHA1()) {
189 if (FLAG_IS_DEFAULT(UseSHA1Intrinsics)) {
190 FLAG_SET_DEFAULT(UseSHA1Intrinsics, true);
191 }
192 } else if (UseSHA1Intrinsics) {
193 warning("Intrinsics for SHA-1 crypto hash functions not available on this CPU.");
194 FLAG_SET_DEFAULT(UseSHA1Intrinsics, false);
195 }
196 if (UseSHA && has_Crypto_SHA256()) {
197 if (FLAG_IS_DEFAULT(UseSHA256Intrinsics)) {
198 FLAG_SET_DEFAULT(UseSHA256Intrinsics, true);
199 }
200 } else if (UseSHA256Intrinsics) {
201 warning("Intrinsics for SHA-224 and SHA-256 crypto hash functions not available on this CPU.");
202 FLAG_SET_DEFAULT(UseSHA256Intrinsics, false);
203 }
204 if (UseSHA && has_Crypto_SHA512()) {
205 if (FLAG_IS_DEFAULT(UseSHA512Intrinsics)) {
206 FLAG_SET_DEFAULT(UseSHA512Intrinsics, true);
207 }
208 } else if (UseSHA512Intrinsics) {
209 warning("Intrinsics for SHA-384 and SHA-512 crypto hash functions not available on this CPU.");
210 FLAG_SET_DEFAULT(UseSHA512Intrinsics, false);
211 }
212
213 if (!(UseSHA1Intrinsics || UseSHA256Intrinsics || UseSHA512Intrinsics)) {
214 FLAG_SET_DEFAULT(UseSHA, false);
215 }
216
217 if (FLAG_IS_DEFAULT(UseMultiplyToLenIntrinsic)) {
218 FLAG_SET_DEFAULT(UseMultiplyToLenIntrinsic, true);
219 }
220 if (FLAG_IS_DEFAULT(UseMontgomeryMultiplyIntrinsic)) {
221 FLAG_SET_DEFAULT(UseMontgomeryMultiplyIntrinsic, true);
222 }
223 if (FLAG_IS_DEFAULT(UseMontgomerySquareIntrinsic)) {
224 FLAG_SET_DEFAULT(UseMontgomerySquareIntrinsic, true);
225 }
226 if (FLAG_IS_DEFAULT(UsePopCountInstruction)) {
227 FLAG_SET_DEFAULT(UsePopCountInstruction, true);
228 }
229
230 // z/Architecture supports 8-byte compare-exchange operations
231 // (see Atomic::cmpxchg)
232 // and 'atomic long memory ops' (see Unsafe_GetLongVolatile).
233 _supports_cx8 = true;
234
235 _supports_atomic_getadd4 = VM_Version::has_LoadAndALUAtomicV1();
236 _supports_atomic_getadd8 = VM_Version::has_LoadAndALUAtomicV1();
237
238 // z/Architecture supports unaligned memory accesses.
239 // Performance penalty is negligible. An additional tick or so
240 // is lost if the accessed data spans a cache line boundary.
241 // Unaligned accesses are not atomic, of course.
242 if (FLAG_IS_DEFAULT(UseUnalignedAccesses)) {
243 FLAG_SET_DEFAULT(UseUnalignedAccesses, true);
244 }
245 }
246
247
248 void VM_Version::set_features_string() {
249
250 unsigned int ambiguity = 0;
251 if (is_z13()) {
252 _features_string = "System z G7-z13 (LDISP_fast, ExtImm, PCrel Load/Store, CmpB, Cond Load/Store, Interlocked Update, TxM, VectorInstr)";
253 ambiguity++;
254 }
255 if (is_ec12()) {
256 _features_string = "System z G6-EC12 (LDISP_fast, ExtImm, PCrel Load/Store, CmpB, Cond Load/Store, Interlocked Update, TxM)";
257 ambiguity++;
258 }
259 if (is_z196()) {
260 _features_string = "System z G5-z196 (LDISP_fast, ExtImm, PCrel Load/Store, CmpB, Cond Load/Store, Interlocked Update)";
261 ambiguity++;
262 }
263 if (is_z10()) {
264 _features_string = "System z G4-z10 (LDISP_fast, ExtImm, PCrel Load/Store, CmpB)";
265 ambiguity++;
266 }
267 if (is_z9()) {
268 _features_string = "System z G3-z9 (LDISP_fast, ExtImm), out-of-support as of 2016-04-01";
269 ambiguity++;
270 }
271 if (is_z990()) {
272 _features_string = "System z G2-z990 (LDISP_fast), out-of-support as of 2014-07-01";
273 ambiguity++;
274 }
275 if (is_z900()) {
276 _features_string = "System z G1-z900 (LDISP), out-of-support as of 2014-07-01";
277 ambiguity++;
278 }
279
280 if (ambiguity == 0) {
281 _features_string = "z/Architecture (unknown generation)";
282 } else if (ambiguity > 1) {
283 tty->print_cr("*** WARNING *** Ambiguous z/Architecture detection, ambiguity = %d", ambiguity);
284 tty->print_cr(" oldest detected generation is %s", _features_string);
285 _features_string = "z/Architecture (ambiguous detection)";
286 }
287
288 if (has_Crypto_AES()) {
289 char buf[256];
290 assert(strlen(_features_string) + 4 + 3*4 + 1 < sizeof(buf), "increase buffer size");
291 jio_snprintf(buf, sizeof(buf), "%s aes%s%s%s", // String 'aes' must be surrounded by spaces so that jtreg tests recognize it.
292 _features_string,
293 has_Crypto_AES128() ? " 128" : "",
294 has_Crypto_AES192() ? " 192" : "",
295 has_Crypto_AES256() ? " 256" : "");
296 _features_string = os::strdup(buf);
297 }
298
299 if (has_Crypto_SHA()) {
300 char buf[256];
301 assert(strlen(_features_string) + 4 + 2 + 2*4 + 6 + 1 < sizeof(buf), "increase buffer size");
302 // String 'sha1' etc must be surrounded by spaces so that jtreg tests recognize it.
303 jio_snprintf(buf, sizeof(buf), "%s %s%s%s%s",
304 _features_string,
305 has_Crypto_SHA1() ? " sha1" : "",
306 has_Crypto_SHA256() ? " sha256" : "",
307 has_Crypto_SHA512() ? " sha512" : "",
308 has_Crypto_GHASH() ? " ghash" : "");
309 if (has_Crypto_AES()) { os::free((void *)_features_string); }
310 _features_string = os::strdup(buf);
311 }
312 }
313
314 // featureBuffer - bit array indicating availability of various features
315 // featureNum - bit index of feature to be tested
316 // Featurenum < 0 requests test for any nonzero bit in featureBuffer.
317 // bufLen - length of featureBuffer in bits
318 bool VM_Version::test_feature_bit(unsigned long* featureBuffer, int featureNum, unsigned int bufLen) {
319 assert(bufLen > 0, "buffer len must be positive");
320 assert((bufLen & 0x0007) == 0, "unaligned buffer len");
321 assert(((intptr_t)featureBuffer&0x0007) == 0, "unaligned feature buffer");
322 if (featureNum < 0) {
323 // Any bit set at all?
324 bool anyBit = false;
325 for (size_t i = 0; i < bufLen/(8*sizeof(long)); i++) {
326 anyBit = anyBit || (featureBuffer[i] != 0);
327 }
328 return anyBit;
329 } else {
330 assert((unsigned int)featureNum < bufLen, "feature index out of range");
331 unsigned char* byteBuffer = (unsigned char*)featureBuffer;
332 int byteIndex = featureNum/(8*sizeof(char));
333 int bitIndex = featureNum%(8*sizeof(char));
334 // Indexed bit set?
335 return (byteBuffer[byteIndex] & (1U<<(7-bitIndex))) != 0;
336 }
337 }
338
339 void VM_Version::print_features_internal(const char* text, bool print_anyway) {
340 tty->print_cr("%s %s", text, features_string());
341 tty->print("%s", text);
342 for (unsigned int i = 0; i < _nfeatures; i++) {
343 tty->print(" 0x%16.16lx", _features[i]);
344 }
345 tty->cr();
346
347 if (Verbose || print_anyway) {
348 // z900
349 if (has_long_displacement() ) tty->print_cr("available: %s", "LongDispFacility");
350 // z990
351 if (has_long_displacement_fast() ) tty->print_cr("available: %s", "LongDispFacilityHighPerf");
352 if (has_ETF2() && has_ETF3() ) tty->print_cr("available: %s", "ETF2 and ETF3");
353 if (has_Crypto() ) tty->print_cr("available: %s", "CryptoFacility");
354 // z9
355 if (has_extended_immediate() ) tty->print_cr("available: %s", "ExtImmedFacility");
356 if (has_StoreFacilityListExtended()) tty->print_cr("available: %s", "StoreFacilityListExtended");
357 if (has_StoreClockFast() ) tty->print_cr("available: %s", "StoreClockFast");
358 if (has_ETF2Enhancements() ) tty->print_cr("available: %s", "ETF2 Enhancements");
359 if (has_ETF3Enhancements() ) tty->print_cr("available: %s", "ETF3 Enhancements");
360 if (has_HFPUnnormalized() ) tty->print_cr("available: %s", "HFPUnnormalizedFacility");
361 if (has_HFPMultiplyAndAdd() ) tty->print_cr("available: %s", "HFPMultiplyAndAddFacility");
362 // z10
363 if (has_ParsingEnhancements() ) tty->print_cr("available: %s", "Parsing Enhancements");
364 if (has_ExtractCPUtime() ) tty->print_cr("available: %s", "ExtractCPUTime");
365 if (has_CompareSwapStore() ) tty->print_cr("available: %s", "CompareSwapStore");
366 if (has_GnrlInstrExtensions() ) tty->print_cr("available: %s", "General Instruction Extensions");
367 if (has_CompareBranch() ) tty->print_cr(" available: %s", "Compare and Branch");
368 if (has_CompareTrap() ) tty->print_cr(" available: %s", "Compare and Trap");
369 if (has_RelativeLoadStore() ) tty->print_cr(" available: %s", "Relative Load/Store");
370 if (has_MultiplySingleImm32() ) tty->print_cr(" available: %s", "MultiplySingleImm32");
371 if (has_Prefetch() ) tty->print_cr(" available: %s", "Prefetch");
372 if (has_MoveImmToMem() ) tty->print_cr(" available: %s", "Direct Moves Immediate to Memory");
373 if (has_MemWithImmALUOps() ) tty->print_cr(" available: %s", "Direct ALU Ops Memory .op. Immediate");
374 if (has_ExtractCPUAttributes() ) tty->print_cr(" available: %s", "Extract CPU Atributes");
375 if (has_ExecuteExtensions() ) tty->print_cr("available: %s", "ExecuteExtensions");
376 if (has_FPSupportEnhancements() ) tty->print_cr("available: %s", "FPSupportEnhancements");
377 if (has_DecimalFloatingPoint() ) tty->print_cr("available: %s", "DecimalFloatingPoint");
378 // z196
379 if (has_DistinctOpnds() ) tty->print_cr("available: %s", "Distinct Operands");
380 if (has_InterlockedAccessV1() ) tty->print_cr(" available: %s", "InterlockedAccess V1 (fast)");
381 if (has_PopCount() ) tty->print_cr(" available: %s", "PopCount");
382 if (has_LoadStoreConditional() ) tty->print_cr(" available: %s", "LoadStoreConditional");
383 if (has_HighWordInstr() ) tty->print_cr(" available: %s", "HighWord Instructions");
384 if (has_FastSync() ) tty->print_cr(" available: %s", "FastSync (bcr 14,0)");
385 if (has_AtomicMemWithImmALUOps() ) tty->print_cr("available: %s", "Atomic Direct ALU Ops Memory .op. Immediate");
386 if (has_FPExtensions() ) tty->print_cr("available: %s", "Floatingpoint Extensions");
387 if (has_CryptoExt3() ) tty->print_cr("available: %s", "Crypto Extensions 3");
388 if (has_CryptoExt4() ) tty->print_cr("available: %s", "Crypto Extensions 4");
389 // EC12
390 if (has_MiscInstrExt() ) tty->print_cr("available: %s", "Miscelaneous Instruction Extensions");
391 if (has_ExecutionHint() ) tty->print_cr(" available: %s", "Execution Hints (branch prediction)");
392 if (has_ProcessorAssist() ) tty->print_cr(" available: %s", "Processor Assists");
393 if (has_LoadAndTrap() ) tty->print_cr(" available: %s", "Load and Trap");
394 if (has_TxMem() ) tty->print_cr("available: %s", "Transactional Memory");
395 if (has_InterlockedAccessV2() ) tty->print_cr(" available: %s", "InterlockedAccess V2 (fast)");
396 if (has_DFPZonedConversion() ) tty->print_cr(" available: %s", "DFP Zoned Conversions");
397 // z13
398 if (has_LoadStoreConditional2() ) tty->print_cr("available: %s", "Load/Store Conditional 2");
399 if (has_CryptoExt5() ) tty->print_cr("available: %s", "Crypto Extensions 5");
400 if (has_DFPPackedConversion() ) tty->print_cr("available: %s", "DFP Packed Conversions");
401 if (has_VectorFacility() ) tty->print_cr("available: %s", "Vector Facility");
402 // test switches
403 if (has_TestFeature1Impl() ) tty->print_cr("available: %s", "TestFeature1Impl");
404 if (has_TestFeature2Impl() ) tty->print_cr("available: %s", "TestFeature2Impl");
405 if (has_TestFeature4Impl() ) tty->print_cr("available: %s", "TestFeature4Impl");
406 if (has_TestFeature8Impl() ) tty->print_cr("available: %s", "TestFeature8Impl");
407
408 if (has_Crypto()) {
409 tty->cr();
410 tty->print_cr("detailed availability of %s capabilities:", "CryptoFacility");
411 if (test_feature_bit(&_cipher_features[0], -1, 2*Cipher::_featureBits)) {
412 tty->cr();
413 tty->print_cr(" available: %s", "Message Cipher Functions");
414 }
415 if (test_feature_bit(&_cipher_features[0], -1, (int)Cipher::_featureBits)) {
416 tty->print_cr(" available Crypto Features of KM (Cipher Message):");
417 for (unsigned int i = 0; i < Cipher::_featureBits; i++) {
418 if (test_feature_bit(&_cipher_features[0], i, (int)Cipher::_featureBits)) {
419 switch (i) {
420 case Cipher::_Query: tty->print_cr(" available: KM Query"); break;
421 case Cipher::_DEA: tty->print_cr(" available: KM DEA"); break;
422 case Cipher::_TDEA128: tty->print_cr(" available: KM TDEA-128"); break;
423 case Cipher::_TDEA192: tty->print_cr(" available: KM TDEA-192"); break;
424 case Cipher::_EncryptedDEA: tty->print_cr(" available: KM Encrypted DEA"); break;
425 case Cipher::_EncryptedDEA128: tty->print_cr(" available: KM Encrypted DEA-128"); break;
426 case Cipher::_EncryptedDEA192: tty->print_cr(" available: KM Encrypted DEA-192"); break;
427 case Cipher::_AES128: tty->print_cr(" available: KM AES-128"); break;
428 case Cipher::_AES192: tty->print_cr(" available: KM AES-192"); break;
429 case Cipher::_AES256: tty->print_cr(" available: KM AES-256"); break;
430 case Cipher::_EnccryptedAES128: tty->print_cr(" available: KM Encrypted-AES-128"); break;
431 case Cipher::_EnccryptedAES192: tty->print_cr(" available: KM Encrypted-AES-192"); break;
432 case Cipher::_EnccryptedAES256: tty->print_cr(" available: KM Encrypted-AES-256"); break;
433 case Cipher::_XTSAES128: tty->print_cr(" available: KM XTS-AES-128"); break;
434 case Cipher::_XTSAES256: tty->print_cr(" available: KM XTS-AES-256"); break;
435 case Cipher::_EncryptedXTSAES128: tty->print_cr(" available: KM XTS-Encrypted-AES-128"); break;
436 case Cipher::_EncryptedXTSAES256: tty->print_cr(" available: KM XTS-Encrypted-AES-256"); break;
437 default: tty->print_cr(" available: unknown KM code %d", i); break;
438 }
439 }
440 }
441 }
442 if (test_feature_bit(&_cipher_features[2], -1, (int)Cipher::_featureBits)) {
443 tty->print_cr(" available Crypto Features of KMC (Cipher Message with Chaining):");
444 for (unsigned int i = 0; i < Cipher::_featureBits; i++) {
445 if (test_feature_bit(&_cipher_features[2], i, (int)Cipher::_featureBits)) {
446 switch (i) {
447 case Cipher::_Query: tty->print_cr(" available: KMC Query"); break;
448 case Cipher::_DEA: tty->print_cr(" available: KMC DEA"); break;
449 case Cipher::_TDEA128: tty->print_cr(" available: KMC TDEA-128"); break;
450 case Cipher::_TDEA192: tty->print_cr(" available: KMC TDEA-192"); break;
451 case Cipher::_EncryptedDEA: tty->print_cr(" available: KMC Encrypted DEA"); break;
452 case Cipher::_EncryptedDEA128: tty->print_cr(" available: KMC Encrypted DEA-128"); break;
453 case Cipher::_EncryptedDEA192: tty->print_cr(" available: KMC Encrypted DEA-192"); break;
454 case Cipher::_AES128: tty->print_cr(" available: KMC AES-128"); break;
455 case Cipher::_AES192: tty->print_cr(" available: KMC AES-192"); break;
456 case Cipher::_AES256: tty->print_cr(" available: KMC AES-256"); break;
457 case Cipher::_EnccryptedAES128: tty->print_cr(" available: KMC Encrypted-AES-128"); break;
458 case Cipher::_EnccryptedAES192: tty->print_cr(" available: KMC Encrypted-AES-192"); break;
459 case Cipher::_EnccryptedAES256: tty->print_cr(" available: KMC Encrypted-AES-256"); break;
460 case Cipher::_PRNG: tty->print_cr(" available: KMC PRNG"); break;
461 default: tty->print_cr(" available: unknown KMC code %d", i); break;
462 }
463 }
464 }
465 }
466
467 if (test_feature_bit(&_msgdigest_features[0], -1, 2*MsgDigest::_featureBits)) {
468 tty->cr();
469 tty->print_cr(" available: %s", "Message Digest Functions for SHA");
470 }
471 if (test_feature_bit(&_msgdigest_features[0], -1, (int)MsgDigest::_featureBits)) {
472 tty->print_cr(" available Features of KIMD (Msg Digest):");
473 for (unsigned int i = 0; i < MsgDigest::_featureBits; i++) {
474 if (test_feature_bit(&_msgdigest_features[0], i, (int)MsgDigest::_featureBits)) {
475 switch (i) {
476 case MsgDigest::_Query: tty->print_cr(" available: KIMD Query"); break;
477 case MsgDigest::_SHA1: tty->print_cr(" available: KIMD SHA-1"); break;
478 case MsgDigest::_SHA256: tty->print_cr(" available: KIMD SHA-256"); break;
479 case MsgDigest::_SHA512: tty->print_cr(" available: KIMD SHA-512"); break;
480 case MsgDigest::_GHASH: tty->print_cr(" available: KIMD GHASH"); break;
481 default: tty->print_cr(" available: unknown code %d", i); break;
482 }
483 }
484 }
485 }
486 if (test_feature_bit(&_msgdigest_features[2], -1, (int)MsgDigest::_featureBits)) {
487 tty->print_cr(" available Features of KLMD (Msg Digest):");
488 for (unsigned int i = 0; i < MsgDigest::_featureBits; i++) {
489 if (test_feature_bit(&_msgdigest_features[2], i, (int)MsgDigest::_featureBits)) {
490 switch (i) {
491 case MsgDigest::_Query: tty->print_cr(" available: KLMD Query"); break;
492 case MsgDigest::_SHA1: tty->print_cr(" available: KLMD SHA-1"); break;
493 case MsgDigest::_SHA256: tty->print_cr(" available: KLMD SHA-256"); break;
494 case MsgDigest::_SHA512: tty->print_cr(" available: KLMD SHA-512"); break;
495 default: tty->print_cr(" available: unknown code %d", i); break;
496 }
497 }
498 }
499 }
500 }
501 if (ContendedPaddingWidth > 0) {
502 tty->cr();
503 tty->print_cr("ContendedPaddingWidth " INTX_FORMAT, ContendedPaddingWidth);
504 }
505 }
506 }
507
508 void VM_Version::print_features() {
509 print_features_internal("Version:");
510 }
511
512 void VM_Version::reset_features(bool reset) {
513 if (reset) {
514 for (unsigned int i = 0; i < _features_buffer_len; i++) {
515 VM_Version::_features[i] = 0;
516 }
517 }
518 }
519
520 void VM_Version::set_features_z900(bool reset) {
521 reset_features(reset);
522
523 set_has_long_displacement();
524 set_has_ETF2();
525 }
526
527 void VM_Version::set_features_z990(bool reset) {
528 reset_features(reset);
529
530 set_features_z900(false);
531 set_has_ETF3();
532 set_has_long_displacement_fast();
533 set_has_HFPMultiplyAndAdd();
534 }
535
536 void VM_Version::set_features_z9(bool reset) {
537 reset_features(reset);
538
539 set_features_z990(false);
540 set_has_StoreFacilityListExtended();
541 // set_has_Crypto(); // Do not set, crypto features must be retrieved separately.
542 set_has_ETF2Enhancements();
543 set_has_ETF3Enhancements();
544 set_has_extended_immediate();
545 set_has_StoreClockFast();
546 set_has_HFPUnnormalized();
547 }
548
549 void VM_Version::set_features_z10(bool reset) {
550 reset_features(reset);
551
552 set_features_z9(false);
553 set_has_CompareSwapStore();
554 set_has_RelativeLoadStore();
555 set_has_CompareBranch();
556 set_has_CompareTrap();
557 set_has_MultiplySingleImm32();
558 set_has_Prefetch();
559 set_has_MoveImmToMem();
560 set_has_MemWithImmALUOps();
561 set_has_ExecuteExtensions();
562 set_has_FPSupportEnhancements();
563 set_has_DecimalFloatingPoint();
564 set_has_ExtractCPUtime();
565 set_has_CryptoExt3();
566 }
567
568 void VM_Version::set_features_z196(bool reset) {
569 reset_features(reset);
570
571 set_features_z10(false);
572 set_has_InterlockedAccessV1();
573 set_has_PopCount();
574 set_has_LoadStoreConditional();
575 set_has_HighWordInstr();
576 set_has_FastSync();
577 set_has_FPExtensions();
578 set_has_DistinctOpnds();
579 set_has_CryptoExt4();
580 }
581
582 void VM_Version::set_features_ec12(bool reset) {
583 reset_features(reset);
584
585 set_features_z196(false);
586 set_has_MiscInstrExt();
587 set_has_InterlockedAccessV2();
588 set_has_LoadAndALUAtomicV2();
589 set_has_TxMem();
590 }
591
592 void VM_Version::set_features_z13(bool reset) {
593 reset_features(reset);
594
595 set_features_ec12(false);
596 set_has_LoadStoreConditional2();
597 set_has_CryptoExt5();
598 set_has_VectorFacility();
599 }
600
601 void VM_Version::set_features_from(const char* march) {
602 bool err = false;
603 bool prt = false;
604
605 if ((march != NULL) && (march[0] != '\0')) {
606 const int buf_len = 16;
607 const int hdr_len = 5;
608 char buf[buf_len];
609 if (strlen(march) >= hdr_len) {
610 memcpy(buf, march, hdr_len);
611 buf[hdr_len] = '\00';
612 } else {
613 buf[0] = '\00';
614 }
615
616 if (!strcmp(march, "z900")) {
617 set_features_z900();
618 } else if (!strcmp(march, "z990")) {
619 set_features_z990();
620 } else if (!strcmp(march, "z9")) {
621 set_features_z9();
622 } else if (!strcmp(march, "z10")) {
623 set_features_z10();
624 } else if (!strcmp(march, "z196")) {
625 set_features_z196();
626 } else if (!strcmp(march, "ec12")) {
627 set_features_ec12();
628 } else if (!strcmp(march, "z13")) {
629 set_features_z13();
630 } else if (!strcmp(buf, "ztest")) {
631 assert(!has_TestFeaturesImpl(), "possible facility list flag conflict");
632 if (strlen(march) > hdr_len) {
633 int itest = 0;
634 if ((strlen(march)-hdr_len) >= buf_len) err = true;
635 if (!err) {
636 memcpy(buf, &march[hdr_len], strlen(march)-hdr_len);
637 buf[strlen(march)-hdr_len] = '\00';
638 for (size_t i = 0; !err && (i < strlen(buf)); i++) {
639 itest = itest*10 + buf[i]-'0';
640 err = err || ((buf[i]-'0') < 0) || ((buf[i]-'0') > 9) || (itest > 15);
641 }
642 }
643 if (!err) {
644 prt = true;
645 if (itest & 0x01) { set_has_TestFeature1Impl(); }
646 if (itest & 0x02) { set_has_TestFeature2Impl(); }
647 if (itest & 0x04) { set_has_TestFeature4Impl(); }
648 if (itest & 0x08) { set_has_TestFeature8Impl(); }
649 }
650 } else {
651 prt = true;
652 set_has_TestFeature1Impl();
653 set_has_TestFeature2Impl();
654 set_has_TestFeature4Impl();
655 set_has_TestFeature8Impl();
656 }
657 } else {
658 err = true;
659 }
660 if (!err) {
661 set_features_string();
662 if (prt || PrintAssembly) {
663 print_features_internal("CPU Version as set by cmdline option:", prt);
664 }
665 } else {
666 tty->print_cr("***Warning: Unsupported ProcessorArchitecture: %s, internal settings left undisturbed.", march);
667 }
668 }
669
670 }
671
672 static long (*getFeatures)(unsigned long*, int, int) = NULL;
673
674 void VM_Version::set_getFeatures(address entryPoint) {
675 if (getFeatures == NULL) {
676 getFeatures = (long(*)(unsigned long*, int, int))entryPoint;
677 }
678 }
679
680 long VM_Version::call_getFeatures(unsigned long* buffer, int buflen, int functionCode) {
681 VM_Version::_is_determine_features_test_running = true;
682 long functionResult = (*getFeatures)(buffer, buflen, functionCode);
683 VM_Version::_is_determine_features_test_running = false;
684 return functionResult;
685 }
686
687 // Helper function for "extract cache attribute" instruction.
688 int VM_Version::calculate_ECAG_functionCode(unsigned int attributeIndication,
689 unsigned int levelIndication,
690 unsigned int typeIndication) {
691 return (attributeIndication<<4) | (levelIndication<<1) | typeIndication;
692 }
693
694 void VM_Version::determine_features() {
695
696 const int cbuf_size = _code_buffer_len;
697 const int buf_len = _features_buffer_len;
698
699 // Allocate code buffer space for the detection code.
700 ResourceMark rm;
701 CodeBuffer cbuf("determine CPU features", cbuf_size, 0);
702 MacroAssembler* a = new MacroAssembler(&cbuf);
703
704 // Emit code.
705 set_getFeatures(a->pc());
706 address code = a->pc();
707
708 // Try STFLE. Possible INVOP will cause defaults to be used.
709 Label getFEATURES;
710 Label getCPUFEATURES; // fcode = -1 (cache)
711 Label getCIPHERFEATURES; // fcode = -2 (cipher)
712 Label getMSGDIGESTFEATURES; // fcode = -3 (SHA)
713 Label getVECTORFEATURES; // fcode = -4 (OS support for vector instructions)
714 Label errRTN;
715 a->z_ltgfr(Z_R0, Z_ARG2); // Buf len to r0 and test.
716 a->z_brl(getFEATURES); // negative -> Get machine features not covered by facility list.
717 a->z_lghi(Z_R1,0);
718 a->z_brz(errRTN); // zero -> Function code currently not used, indicate "aborted".
719
720 a->z_aghi(Z_R0, -1);
721 a->z_stfle(0, Z_ARG1);
722 a->z_lg(Z_R1, 0, Z_ARG1); // Get first DW of facility list.
723 a->z_lgr(Z_RET, Z_R0); // Calculate rtn value for success.
724 a->z_la(Z_RET, 1, Z_RET);
725 a->z_brnz(errRTN); // Instr failed if non-zero CC.
726 a->z_ltgr(Z_R1, Z_R1); // Instr failed if first DW == 0.
727 a->z_bcr(Assembler::bcondNotZero, Z_R14); // Successful return.
728
729 a->bind(errRTN);
730 a->z_lngr(Z_RET, Z_RET);
731 a->z_ltgr(Z_R1, Z_R1);
732 a->z_bcr(Assembler::bcondNotZero, Z_R14); // Return "buffer too small".
733 a->z_xgr(Z_RET, Z_RET);
734 a->z_br(Z_R14); // Return "operation aborted".
735
736 a->bind(getFEATURES);
737 a->z_cghi(Z_R0, -1); // -1: Extract CPU attributes, currently: cache layout only.
738 a->z_bre(getCPUFEATURES);
739 a->z_cghi(Z_R0, -2); // -2: Extract detailed crypto capabilities (cipher instructions).
740 a->z_bre(getCIPHERFEATURES);
741 a->z_cghi(Z_R0, -3); // -3: Extract detailed crypto capabilities (msg digest instructions).
742 a->z_bre(getMSGDIGESTFEATURES);
743 a->z_cghi(Z_R0, -4); // -4: Verify vector instruction availability (OS support).
744 a->z_bre(getVECTORFEATURES);
745
746 a->z_xgr(Z_RET, Z_RET); // Not a valid function code.
747 a->z_br(Z_R14); // Return "operation aborted".
748
749 // Try KIMD/KLMD query function to get details about msg digest (secure hash, SHA) instructions.
750 a->bind(getMSGDIGESTFEATURES);
751 a->z_lghi(Z_R0,(int)MsgDigest::_Query); // query function code
752 a->z_lgr(Z_R1,Z_R2); // param block addr, 2*16 bytes min size
753 a->z_kimd(Z_R2,Z_R2); // Get available KIMD functions (bit pattern in param blk).
754 a->z_la(Z_R1,16,Z_R1); // next param block addr
755 a->z_klmd(Z_R2,Z_R2); // Get available KLMD functions (bit pattern in param blk).
756 a->z_lghi(Z_RET,4);
757 a->z_br(Z_R14);
758
759 // Try KM/KMC query function to get details about crypto instructions.
760 a->bind(getCIPHERFEATURES);
761 a->z_lghi(Z_R0,(int)Cipher::_Query); // query function code
762 a->z_lgr(Z_R1,Z_R2); // param block addr, 2*16 bytes min size (KIMD/KLMD output)
763 a->z_km(Z_R2,Z_R2); // get available KM functions
764 a->z_la(Z_R1,16,Z_R1); // next param block addr
765 a->z_kmc(Z_R2,Z_R2); // get available KMC functions
766 a->z_lghi(Z_RET,4);
767 a->z_br(Z_R14);
768
769 // Use EXTRACT CPU ATTRIBUTE instruction to get information about cache layout.
770 a->bind(getCPUFEATURES);
771 a->z_xgr(Z_R0,Z_R0); // as recommended in instruction documentation
772 a->z_ecag(Z_RET,Z_R0,0,Z_ARG3); // Extract information as requested by Z_ARG1 contents.
773 a->z_br(Z_R14);
774
775 // Use a vector instruction to verify OS support. Will fail with SIGFPE if OS support is missing.
776 a->bind(getVECTORFEATURES);
777 a->z_vtm(Z_V0,Z_V0); // non-destructive vector instruction. Will cause SIGFPE if not supported.
778 a->z_br(Z_R14);
779
780 address code_end = a->pc();
781 a->flush();
782
783 // Print the detection code.
784 bool printVerbose = Verbose || PrintAssembly || PrintStubCode;
785 if (printVerbose) {
786 ttyLocker ttyl;
787 tty->print_cr("Decoding CPU feature detection stub at " INTPTR_FORMAT " before execution:", p2i(code));
788 tty->print_cr("Stub length is %ld bytes, codebuffer reserves %d bytes, %ld bytes spare.",
789 code_end-code, cbuf_size, cbuf_size-(code_end-code));
790
791 // Use existing decode function. This enables the [Code] format which is needed to DecodeErrorFile.
792 Disassembler::decode((u_char*)code, (u_char*)code_end, tty);
793 }
794
795 // Prepare for detection code execution and clear work buffer.
796 _nfeatures = 0;
797 _ncipher_features = 0;
798 unsigned long buffer[buf_len];
799
800 for (int i = 0; i < buf_len; i++) {
801 buffer[i] = 0L;
802 }
803
804 // execute code
805 // Illegal instructions will be replaced by 0 in signal handler.
806 // In case of problems, call_getFeatures will return a not-positive result.
807 long used_len = call_getFeatures(buffer, buf_len, 0);
808
809 bool ok;
810 if (used_len == 1) {
811 ok = true;
812 } else if (used_len > 1) {
813 unsigned int used_lenU = (unsigned int)used_len;
814 ok = true;
815 for (unsigned int i = 1; i < used_lenU; i++) {
816 ok = ok && (buffer[i] == 0L);
817 }
818 if (printVerbose && !ok) {
819 bool compact = false;
820 tty->print_cr("Note: feature list has %d (i.e. more than one) array elements.", used_lenU);
821 if (compact) {
822 tty->print("non-zero feature list elements:");
823 for (unsigned int i = 0; i < used_lenU; i++) {
824 tty->print(" [%d]: 0x%16.16lx", i, buffer[i]);
825 }
826 tty->cr();
827 } else {
828 for (unsigned int i = 0; i < used_lenU; i++) {
829 tty->print_cr("non-zero feature list[%d]: 0x%16.16lx", i, buffer[i]);
830 }
831 }
832
833 if (compact) {
834 tty->print_cr("Active features (compact view):");
835 for (unsigned int k = 0; k < used_lenU; k++) {
836 tty->print_cr(" buffer[%d]:", k);
837 for (unsigned int j = k*sizeof(long); j < (k+1)*sizeof(long); j++) {
838 bool line = false;
839 for (unsigned int i = j*8; i < (j+1)*8; i++) {
840 bool bit = test_feature_bit(buffer, i, used_lenU*sizeof(long)*8);
841 if (bit) {
842 if (!line) {
843 tty->print(" byte[%d]:", j);
844 line = true;
845 }
846 tty->print(" [%3.3d]", i);
847 }
848 }
849 if (line) {
850 tty->cr();
851 }
852 }
853 }
854 } else {
855 tty->print_cr("Active features (full view):");
856 for (unsigned int k = 0; k < used_lenU; k++) {
857 tty->print_cr(" buffer[%d]:", k);
858 for (unsigned int j = k*sizeof(long); j < (k+1)*sizeof(long); j++) {
859 tty->print(" byte[%d]:", j);
860 for (unsigned int i = j*8; i < (j+1)*8; i++) {
861 bool bit = test_feature_bit(buffer, i, used_lenU*sizeof(long)*8);
862 if (bit) {
863 tty->print(" [%3.3d]", i);
864 } else {
865 tty->print(" ");
866 }
867 }
868 tty->cr();
869 }
870 }
871 }
872 }
873 ok = true;
874 } else { // No features retrieved if we reach here. Buffer too short or instr not available.
875 if (used_len < 0) {
876 ok = false;
877 if (printVerbose) {
878 tty->print_cr("feature list buffer[%d] too short, required: buffer[%ld]", buf_len, -used_len);
879 }
880 } else {
881 if (printVerbose) {
882 tty->print_cr("feature list could not be retrieved. Running on z900 or z990? Trying to find out...");
883 }
884 used_len = call_getFeatures(buffer, 0, 0); // Must provide at least two DW buffer elements!!!!
885
886 ok = used_len > 0;
887 if (ok) {
888 if (buffer[1]*10 < buffer[0]) {
889 set_features_z900();
890 } else {
891 set_features_z990();
892 }
893
894 if (printVerbose) {
895 tty->print_cr("Note: high-speed long displacement test used %ld iterations.", used_len);
896 tty->print_cr(" Positive displacement loads took %8.8lu microseconds.", buffer[1]);
897 tty->print_cr(" Negative displacement loads took %8.8lu microseconds.", buffer[0]);
898 if (has_long_displacement_fast()) {
899 tty->print_cr(" assuming high-speed long displacement IS available.");
900 } else {
901 tty->print_cr(" assuming high-speed long displacement is NOT available.");
902 }
903 }
904 } else {
905 if (printVerbose) {
906 tty->print_cr("Note: high-speed long displacement test was not successful.");
907 tty->print_cr(" assuming long displacement is NOT available.");
908 }
909 }
910 return; // Do not copy buffer to _features, no test for cipher features.
911 }
912 }
913
914 if (ok) {
915 // Fill features buffer.
916 // Clear work buffer.
917 for (int i = 0; i < buf_len; i++) {
918 _features[i] = buffer[i];
919 _cipher_features[i] = 0;
920 _msgdigest_features[i] = 0;
921 buffer[i] = 0L;
922 }
923 _nfeatures = used_len;
924 } else {
925 for (int i = 0; i < buf_len; i++) {
926 _features[i] = 0;
927 _cipher_features[i] = 0;
928 _msgdigest_features[i] = 0;
929 buffer[i] = 0L;
930 }
931 _nfeatures = 0;
932 }
933
934 if (has_VectorFacility()) {
935 // Verify that feature can actually be used. OS support required.
936 call_getFeatures(buffer, -4, 0);
937 if (printVerbose) {
938 ttyLocker ttyl;
939 if (has_VectorFacility()) {
940 tty->print_cr(" Vector Facility has been verified to be supported by OS");
941 } else {
942 tty->print_cr(" Vector Facility has been disabled - not supported by OS");
943 }
944 }
945 }
946
947 // Extract Crypto Facility details.
948 if (has_Crypto()) {
949 // Get cipher features.
950 used_len = call_getFeatures(buffer, -2, 0);
951 for (int i = 0; i < buf_len; i++) {
952 _cipher_features[i] = buffer[i];
953 }
954 _ncipher_features = used_len;
955
956 // Get msg digest features.
957 used_len = call_getFeatures(buffer, -3, 0);
958 for (int i = 0; i < buf_len; i++) {
959 _msgdigest_features[i] = buffer[i];
960 }
961 _nmsgdigest_features = used_len;
962 }
963
964 static int levelProperties[_max_cache_levels]; // All property indications per level.
965 static int levelScope[_max_cache_levels]; // private/shared
966 static const char* levelScopeText[4] = {"No cache ",
967 "CPU private",
968 "shared ",
969 "reserved "};
970
971 static int levelType[_max_cache_levels]; // D/I/mixed
972 static const char* levelTypeText[4] = {"separate D and I caches",
973 "I cache only ",
974 "D-cache only ",
975 "combined D/I cache "};
976
977 static unsigned int levelReserved[_max_cache_levels]; // reserved property bits
978 static unsigned int levelLineSize[_max_cache_levels];
979 static unsigned int levelTotalSize[_max_cache_levels];
980 static unsigned int levelAssociativity[_max_cache_levels];
981
982
983 // Extract Cache Layout details.
984 if (has_ExtractCPUAttributes() && printVerbose) { // For information only, as of now.
985 bool lineSize_mismatch;
986 bool print_something;
987 long functionResult;
988 unsigned int attributeIndication = 0; // 0..15
989 unsigned int levelIndication = 0; // 0..8
990 unsigned int typeIndication = 0; // 0..1 (D-Cache, I-Cache)
991 int functionCode = calculate_ECAG_functionCode(attributeIndication, levelIndication, typeIndication);
992
993 // Get cache topology.
994 functionResult = call_getFeatures(buffer, -1, functionCode);
995
996 for (unsigned int i = 0; i < _max_cache_levels; i++) {
997 if (functionResult > 0) {
998 int shiftVal = 8*(_max_cache_levels-(i+1));
999 levelProperties[i] = (functionResult & (0xffUL<<shiftVal)) >> shiftVal;
1000 levelReserved[i] = (levelProperties[i] & 0xf0) >> 4;
1001 levelScope[i] = (levelProperties[i] & 0x0c) >> 2;
1002 levelType[i] = (levelProperties[i] & 0x03);
1003 } else {
1004 levelProperties[i] = 0;
1005 levelReserved[i] = 0;
1006 levelScope[i] = 0;
1007 levelType[i] = 0;
1008 }
1009 levelLineSize[i] = 0;
1010 levelTotalSize[i] = 0;
1011 levelAssociativity[i] = 0;
1012 }
1013
1014 tty->cr();
1015 tty->print_cr("------------------------------------");
1016 tty->print_cr("--- Cache Topology Information ---");
1017 tty->print_cr("------------------------------------");
1018 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) {
1019 tty->print_cr(" Cache Level %d: <scope> %s | <type> %s",
1020 i+1, levelScopeText[levelScope[i]], levelTypeText[levelType[i]]);
1021 }
1022
1023 // Get D-cache details per level.
1024 _Dcache_lineSize = 0;
1025 lineSize_mismatch = false;
1026 print_something = false;
1027 typeIndication = 0; // 0..1 (D-Cache, I-Cache)
1028 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) {
1029 if ((levelType[i] == 0) || (levelType[i] == 2)) {
1030 print_something = true;
1031
1032 // Get cache line size of level i.
1033 attributeIndication = 1;
1034 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication);
1035 levelLineSize[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode);
1036
1037 // Get cache total size of level i.
1038 attributeIndication = 2;
1039 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication);
1040 levelTotalSize[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode);
1041
1042 // Get cache associativity of level i.
1043 attributeIndication = 3;
1044 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication);
1045 levelAssociativity[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode);
1046
1047 _Dcache_lineSize = _Dcache_lineSize == 0 ? levelLineSize[i] : _Dcache_lineSize;
1048 lineSize_mismatch = lineSize_mismatch || (_Dcache_lineSize != levelLineSize[i]);
1049 } else {
1050 levelLineSize[i] = 0;
1051 }
1052 }
1053
1054 if (print_something) {
1055 tty->cr();
1056 tty->print_cr("------------------------------------");
1057 tty->print_cr("--- D-Cache Detail Information ---");
1058 tty->print_cr("------------------------------------");
1059 if (lineSize_mismatch) {
1060 tty->print_cr("WARNING: D-Cache line size mismatch!");
1061 }
1062 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) {
1063 if (levelLineSize[i] > 0) {
1064 tty->print_cr(" D-Cache Level %d: line size = %4d, total size = %6dKB, associativity = %2d",
1065 i+1, levelLineSize[i], levelTotalSize[i]/(int)K, levelAssociativity[i]);
1066 }
1067 }
1068 }
1069
1070 // Get I-cache details per level.
1071 _Icache_lineSize = 0;
1072 lineSize_mismatch = false;
1073 print_something = false;
1074 typeIndication = 1; // 0..1 (D-Cache, I-Cache)
1075 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) {
1076 if ((levelType[i] == 0) || (levelType[i] == 1)) {
1077 print_something = true;
1078
1079 // Get cache line size of level i.
1080 attributeIndication = 1;
1081 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication);
1082 levelLineSize[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode);
1083
1084 // Get cache total size of level i.
1085 attributeIndication = 2;
1086 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication);
1087 levelTotalSize[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode);
1088
1089 // Get cache associativity of level i.
1090 attributeIndication = 3;
1091 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication);
1092 levelAssociativity[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode);
1093
1094 _Icache_lineSize = _Icache_lineSize == 0 ? levelLineSize[i] : _Icache_lineSize;
1095 lineSize_mismatch = lineSize_mismatch || (_Icache_lineSize != levelLineSize[i]);
1096 } else {
1097 levelLineSize[i] = 0;
1098 }
1099 }
1100
1101 if (print_something) {
1102 tty->cr();
1103 tty->print_cr("------------------------------------");
1104 tty->print_cr("--- I-Cache Detail Information ---");
1105 tty->print_cr("------------------------------------");
1106 if (lineSize_mismatch) {
1107 tty->print_cr("WARNING: I-Cache line size mismatch!");
1108 }
1109 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) {
1110 if (levelLineSize[i] > 0) {
1111 tty->print_cr(" I-Cache Level %d: line size = %4d, total size = %6dKB, associativity = %2d",
1112 i+1, levelLineSize[i], levelTotalSize[i]/(int)K, levelAssociativity[i]);
1113 }
1114 }
1115 }
1116
1117 // Get D/I-cache details per level.
1118 lineSize_mismatch = false;
1119 print_something = false;
1120 typeIndication = 0; // 0..1 (D-Cache, I-Cache)
1121 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) {
1122 if (levelType[i] == 3) {
1123 print_something = true;
1124
1125 // Get cache line size of level i.
1126 attributeIndication = 1;
1127 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication);
1128 levelLineSize[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode);
1129
1130 // Get cache total size of level i.
1131 attributeIndication = 2;
1132 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication);
1133 levelTotalSize[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode);
1134
1135 // Get cache associativity of level i.
1136 attributeIndication = 3;
1137 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication);
1138 levelAssociativity[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode);
1139
1140 _Dcache_lineSize = _Dcache_lineSize == 0 ? levelLineSize[i] : _Dcache_lineSize;
1141 _Icache_lineSize = _Icache_lineSize == 0 ? levelLineSize[i] : _Icache_lineSize;
1142 lineSize_mismatch = lineSize_mismatch || (_Dcache_lineSize != levelLineSize[i])
1143 || (_Icache_lineSize != levelLineSize[i]);
1144 } else {
1145 levelLineSize[i] = 0;
1146 }
1147 }
1148
1149 if (print_something) {
1150 tty->cr();
1151 tty->print_cr("--------------------------------------");
1152 tty->print_cr("--- D/I-Cache Detail Information ---");
1153 tty->print_cr("--------------------------------------");
1154 if (lineSize_mismatch) {
1155 tty->print_cr("WARNING: D/I-Cache line size mismatch!");
1156 }
1157 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) {
1158 if (levelLineSize[i] > 0) {
1159 tty->print_cr(" D/I-Cache Level %d: line size = %4d, total size = %6dKB, associativity = %2d",
1160 i+1, levelLineSize[i], levelTotalSize[i]/(int)K, levelAssociativity[i]);
1161 }
1162 }
1163 }
1164 tty->cr();
1165 }
1166 return;
1167 }
1168
1169 unsigned long VM_Version::z_SIGILL() {
1170 unsigned long ZeroBuffer = 0;
1171 unsigned long work;
1172 asm(
1173 " LA %[work],%[buffer] \n\t" // Load address of buffer.
1174 " LARL 14,+6 \n\t" // Load address of faulting instruction.
1175 " BCR 15,%[work] \n\t" // Branch into buffer, execute whatever is in there.
1176 : [buffer] "+Q" (ZeroBuffer) /* outputs */
1177 , [work] "=&a" (work) /* outputs */
1178 : /* inputs */
1179 : "cc" /* clobbered */
1180 );
1181 return ZeroBuffer;
1182 }
1183
1184 unsigned long VM_Version::z_SIGSEGV() {
1185 unsigned long ZeroBuffer = 0;
1186 unsigned long work;
1187 asm(
1188 " LG %[work],%[buffer] \n\t" // Load zero address.
1189 " STG %[work],0(,%[work])\n\t" // Store to address zero.
1190 : [buffer] "+Q" (ZeroBuffer) /* outputs */
1191 , [work] "=&a" (work) /* outputs */
1192 : /* inputs */
1193 : "cc" /* clobbered */
1194 );
1195 return ZeroBuffer;
1196 }
1197