1 /*
   2  * Copyright (c) 1997, 2019, Oracle and/or its affiliates. All rights reserved.
   3  * Copyright (c) 2012, 2019 SAP SE. All rights reserved.
   4  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   5  *
   6  * This code is free software; you can redistribute it and/or modify it
   7  * under the terms of the GNU General Public License version 2 only, as
   8  * published by the Free Software Foundation.
   9  *
  10  * This code is distributed in the hope that it will be useful, but WITHOUT
  11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  13  * version 2 for more details (a copy is included in the LICENSE file that
  14  * accompanied this code).
  15  *
  16  * You should have received a copy of the GNU General Public License version
  17  * 2 along with this work; if not, write to the Free Software Foundation,
  18  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  19  *
  20  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  21  * or visit www.oracle.com if you need additional information or have any
  22  * questions.
  23  *
  24  */
  25 
  26 #include "precompiled.hpp"
  27 #include "jvm.h"
  28 #include "asm/assembler.inline.hpp"
  29 #include "asm/macroAssembler.inline.hpp"
  30 #include "compiler/disassembler.hpp"
  31 #include "memory/resourceArea.hpp"
  32 #include "runtime/java.hpp"
  33 #include "runtime/os.hpp"
  34 #include "runtime/stubCodeGenerator.hpp"
  35 #include "utilities/align.hpp"
  36 #include "utilities/defaultStream.hpp"
  37 #include "utilities/globalDefinitions.hpp"
  38 #include "vm_version_ppc.hpp"
  39 
  40 #include <sys/sysinfo.h>
  41 #if defined(_AIX)
  42 #include <libperfstat.h>
  43 #endif
  44 
  45 #if defined(LINUX) && defined(VM_LITTLE_ENDIAN)
  46 #include <sys/auxv.h>
  47 
  48 #ifndef PPC_FEATURE2_HTM_NOSC
  49 #define PPC_FEATURE2_HTM_NOSC (1 << 24)
  50 #endif
  51 #endif
  52 
  53 bool VM_Version::_is_determine_features_test_running = false;
  54 uint64_t VM_Version::_dscr_val = 0;
  55 
  56 #define MSG(flag)   \
  57   if (flag && !FLAG_IS_DEFAULT(flag))                                  \
  58       jio_fprintf(defaultStream::error_stream(),                       \
  59                   "warning: -XX:+" #flag " requires -XX:+UseSIGTRAP\n" \
  60                   "         -XX:+" #flag " will be disabled!\n");
  61 
  62 void VM_Version::initialize() {
  63 
  64   // Test which instructions are supported and measure cache line size.
  65   determine_features();
  66 
  67   // If PowerArchitecturePPC64 hasn't been specified explicitly determine from features.
  68   if (FLAG_IS_DEFAULT(PowerArchitecturePPC64)) {
  69     if (VM_Version::has_darn()) {
  70       FLAG_SET_ERGO(PowerArchitecturePPC64, 9);
  71     } else if (VM_Version::has_lqarx()) {
  72       FLAG_SET_ERGO(PowerArchitecturePPC64, 8);
  73     } else if (VM_Version::has_popcntw()) {
  74       FLAG_SET_ERGO(PowerArchitecturePPC64, 7);
  75     } else if (VM_Version::has_cmpb()) {
  76       FLAG_SET_ERGO(PowerArchitecturePPC64, 6);
  77     } else if (VM_Version::has_popcntb()) {
  78       FLAG_SET_ERGO(PowerArchitecturePPC64, 5);
  79     } else {
  80       FLAG_SET_ERGO(PowerArchitecturePPC64, 0);
  81     }
  82   }
  83 
  84   bool PowerArchitecturePPC64_ok = false;
  85   switch (PowerArchitecturePPC64) {
  86     case 9: if (!VM_Version::has_darn()   ) break;
  87     case 8: if (!VM_Version::has_lqarx()  ) break;
  88     case 7: if (!VM_Version::has_popcntw()) break;
  89     case 6: if (!VM_Version::has_cmpb()   ) break;
  90     case 5: if (!VM_Version::has_popcntb()) break;
  91     case 0: PowerArchitecturePPC64_ok = true; break;
  92     default: break;
  93   }
  94   guarantee(PowerArchitecturePPC64_ok, "PowerArchitecturePPC64 cannot be set to "
  95             UINTX_FORMAT " on this machine", PowerArchitecturePPC64);
  96 
  97   // Power 8: Configure Data Stream Control Register.
  98   if (PowerArchitecturePPC64 >= 8 && has_mfdscr()) {
  99     config_dscr();
 100   }
 101 
 102   if (!UseSIGTRAP) {
 103     MSG(TrapBasedICMissChecks);
 104     MSG(TrapBasedNotEntrantChecks);
 105     MSG(TrapBasedNullChecks);
 106     FLAG_SET_ERGO(TrapBasedNotEntrantChecks, false);
 107     FLAG_SET_ERGO(TrapBasedNullChecks,       false);
 108     FLAG_SET_ERGO(TrapBasedICMissChecks,     false);
 109   }
 110 
 111 #ifdef COMPILER2
 112   if (!UseSIGTRAP) {
 113     MSG(TrapBasedRangeChecks);
 114     FLAG_SET_ERGO(TrapBasedRangeChecks, false);
 115   }
 116 
 117   // On Power6 test for section size.
 118   if (PowerArchitecturePPC64 == 6) {
 119     determine_section_size();
 120   // TODO: PPC port } else {
 121   // TODO: PPC port PdScheduling::power6SectorSize = 0x20;
 122   }
 123 
 124   if (PowerArchitecturePPC64 >= 8) {
 125     if (FLAG_IS_DEFAULT(SuperwordUseVSX)) {
 126       FLAG_SET_ERGO(SuperwordUseVSX, true);
 127     }
 128   } else {
 129     if (SuperwordUseVSX) {
 130       warning("SuperwordUseVSX specified, but needs at least Power8.");
 131       FLAG_SET_DEFAULT(SuperwordUseVSX, false);
 132     }
 133   }
 134   MaxVectorSize = SuperwordUseVSX ? 16 : 8;
 135 
 136   if (PowerArchitecturePPC64 >= 9) {
 137     if (FLAG_IS_DEFAULT(UseCountTrailingZerosInstructionsPPC64)) {
 138       FLAG_SET_ERGO(UseCountTrailingZerosInstructionsPPC64, true);
 139     }
 140     if (FLAG_IS_DEFAULT(UseCharacterCompareIntrinsics)) {
 141       FLAG_SET_ERGO(UseCharacterCompareIntrinsics, true);
 142     }
 143   } else {
 144     if (UseCountTrailingZerosInstructionsPPC64) {
 145       warning("UseCountTrailingZerosInstructionsPPC64 specified, but needs at least Power9.");
 146       FLAG_SET_DEFAULT(UseCountTrailingZerosInstructionsPPC64, false);
 147     }
 148     if (UseCharacterCompareIntrinsics) {
 149       warning("UseCharacterCompareIntrinsics specified, but needs at least Power9.");
 150       FLAG_SET_DEFAULT(UseCharacterCompareIntrinsics, false);
 151     }
 152   }
 153 #endif
 154 
 155   // Create and print feature-string.
 156   char buf[(num_features+1) * 16]; // Max 16 chars per feature.
 157   jio_snprintf(buf, sizeof(buf),
 158                "ppc64%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s",
 159                (has_fsqrt()   ? " fsqrt"   : ""),
 160                (has_isel()    ? " isel"    : ""),
 161                (has_lxarxeh() ? " lxarxeh" : ""),
 162                (has_cmpb()    ? " cmpb"    : ""),
 163                (has_popcntb() ? " popcntb" : ""),
 164                (has_popcntw() ? " popcntw" : ""),
 165                (has_fcfids()  ? " fcfids"  : ""),
 166                (has_vand()    ? " vand"    : ""),
 167                (has_lqarx()   ? " lqarx"   : ""),
 168                (has_vcipher() ? " aes"     : ""),
 169                (has_vpmsumb() ? " vpmsumb" : ""),
 170                (has_mfdscr()  ? " mfdscr"  : ""),
 171                (has_vsx()     ? " vsx"     : ""),
 172                (has_ldbrx()   ? " ldbrx"   : ""),
 173                (has_stdbrx()  ? " stdbrx"  : ""),
 174                (has_vshasig() ? " sha"     : ""),
 175                (has_tm()      ? " rtm"     : ""),
 176                (has_darn()    ? " darn"    : "")
 177                // Make sure number of %s matches num_features!
 178               );
 179   _features_string = os::strdup(buf);
 180   if (Verbose) {
 181     print_features();
 182   }
 183 
 184   // PPC64 supports 8-byte compare-exchange operations (see Atomic::cmpxchg)
 185   // and 'atomic long memory ops' (see Unsafe_GetLongVolatile).
 186   _supports_cx8 = true;
 187 
 188   // Used by C1.
 189   _supports_atomic_getset4 = true;
 190   _supports_atomic_getadd4 = true;
 191   _supports_atomic_getset8 = true;
 192   _supports_atomic_getadd8 = true;
 193 
 194   UseSSE = 0; // Only on x86 and x64
 195 
 196   intx cache_line_size = L1_data_cache_line_size();
 197 
 198   if (FLAG_IS_DEFAULT(AllocatePrefetchStyle)) AllocatePrefetchStyle = 1;
 199 
 200   if (AllocatePrefetchStyle == 4) {
 201     AllocatePrefetchStepSize = cache_line_size; // Need exact value.
 202     if (FLAG_IS_DEFAULT(AllocatePrefetchLines)) AllocatePrefetchLines = 12; // Use larger blocks by default.
 203     if (AllocatePrefetchDistance < 0) AllocatePrefetchDistance = 2*cache_line_size; // Default is not defined?
 204   } else {
 205     if (cache_line_size > AllocatePrefetchStepSize) AllocatePrefetchStepSize = cache_line_size;
 206     if (FLAG_IS_DEFAULT(AllocatePrefetchLines)) AllocatePrefetchLines = 3; // Optimistic value.
 207     if (AllocatePrefetchDistance < 0) AllocatePrefetchDistance = 3*cache_line_size; // Default is not defined?
 208   }
 209 
 210   assert(AllocatePrefetchLines > 0, "invalid value");
 211   if (AllocatePrefetchLines < 1) { // Set valid value in product VM.
 212     AllocatePrefetchLines = 1; // Conservative value.
 213   }
 214 
 215   if (AllocatePrefetchStyle == 3 && AllocatePrefetchDistance < cache_line_size) {
 216     AllocatePrefetchStyle = 1; // Fall back if inappropriate.
 217   }
 218 
 219   assert(AllocatePrefetchStyle >= 0, "AllocatePrefetchStyle should be positive");
 220 
 221   // If running on Power8 or newer hardware, the implementation uses the available vector instructions.
 222   // In all other cases, the implementation uses only generally available instructions.
 223   if (!UseCRC32Intrinsics) {
 224     if (FLAG_IS_DEFAULT(UseCRC32Intrinsics)) {
 225       FLAG_SET_DEFAULT(UseCRC32Intrinsics, true);
 226     }
 227   }
 228 
 229   // Implementation does not use any of the vector instructions available with Power8.
 230   // Their exploitation is still pending (aka "work in progress").
 231   if (!UseCRC32CIntrinsics) {
 232     if (FLAG_IS_DEFAULT(UseCRC32CIntrinsics)) {
 233       FLAG_SET_DEFAULT(UseCRC32CIntrinsics, true);
 234     }
 235   }
 236 
 237   // TODO: Provide implementation.
 238   if (UseAdler32Intrinsics) {
 239     warning("Adler32Intrinsics not available on this CPU.");
 240     FLAG_SET_DEFAULT(UseAdler32Intrinsics, false);
 241   }
 242 
 243   // The AES intrinsic stubs require AES instruction support.
 244   if (has_vcipher()) {
 245     if (FLAG_IS_DEFAULT(UseAES)) {
 246       UseAES = true;
 247     }
 248   } else if (UseAES) {
 249     if (!FLAG_IS_DEFAULT(UseAES))
 250       warning("AES instructions are not available on this CPU");
 251     FLAG_SET_DEFAULT(UseAES, false);
 252   }
 253 
 254   if (UseAES && has_vcipher()) {
 255     if (FLAG_IS_DEFAULT(UseAESIntrinsics)) {
 256       UseAESIntrinsics = true;
 257     }
 258   } else if (UseAESIntrinsics) {
 259     if (!FLAG_IS_DEFAULT(UseAESIntrinsics))
 260       warning("AES intrinsics are not available on this CPU");
 261     FLAG_SET_DEFAULT(UseAESIntrinsics, false);
 262   }
 263 
 264   if (UseAESCTRIntrinsics) {
 265     warning("AES/CTR intrinsics are not available on this CPU");
 266     FLAG_SET_DEFAULT(UseAESCTRIntrinsics, false);
 267   }
 268 
 269   if (UseGHASHIntrinsics) {
 270     warning("GHASH intrinsics are not available on this CPU");
 271     FLAG_SET_DEFAULT(UseGHASHIntrinsics, false);
 272   }
 273 
 274   if (FLAG_IS_DEFAULT(UseFMA)) {
 275     FLAG_SET_DEFAULT(UseFMA, true);
 276   }
 277 
 278   if (has_vshasig()) {
 279     if (FLAG_IS_DEFAULT(UseSHA)) {
 280       UseSHA = true;
 281     }
 282   } else if (UseSHA) {
 283     if (!FLAG_IS_DEFAULT(UseSHA))
 284       warning("SHA instructions are not available on this CPU");
 285     FLAG_SET_DEFAULT(UseSHA, false);
 286   }
 287 
 288   if (UseSHA1Intrinsics) {
 289     warning("Intrinsics for SHA-1 crypto hash functions not available on this CPU.");
 290     FLAG_SET_DEFAULT(UseSHA1Intrinsics, false);
 291   }
 292 
 293   if (UseSHA && has_vshasig()) {
 294     if (FLAG_IS_DEFAULT(UseSHA256Intrinsics)) {
 295       FLAG_SET_DEFAULT(UseSHA256Intrinsics, true);
 296     }
 297   } else if (UseSHA256Intrinsics) {
 298     warning("Intrinsics for SHA-224 and SHA-256 crypto hash functions not available on this CPU.");
 299     FLAG_SET_DEFAULT(UseSHA256Intrinsics, false);
 300   }
 301 
 302   if (UseSHA && has_vshasig()) {
 303     if (FLAG_IS_DEFAULT(UseSHA512Intrinsics)) {
 304       FLAG_SET_DEFAULT(UseSHA512Intrinsics, true);
 305     }
 306   } else if (UseSHA512Intrinsics) {
 307     warning("Intrinsics for SHA-384 and SHA-512 crypto hash functions not available on this CPU.");
 308     FLAG_SET_DEFAULT(UseSHA512Intrinsics, false);
 309   }
 310 
 311   if (!(UseSHA1Intrinsics || UseSHA256Intrinsics || UseSHA512Intrinsics)) {
 312     FLAG_SET_DEFAULT(UseSHA, false);
 313   }
 314 
 315   if (FLAG_IS_DEFAULT(UseSquareToLenIntrinsic)) {
 316     UseSquareToLenIntrinsic = true;
 317   }
 318   if (FLAG_IS_DEFAULT(UseMulAddIntrinsic)) {
 319     UseMulAddIntrinsic = true;
 320   }
 321   if (FLAG_IS_DEFAULT(UseMultiplyToLenIntrinsic)) {
 322     UseMultiplyToLenIntrinsic = true;
 323   }
 324   if (FLAG_IS_DEFAULT(UseMontgomeryMultiplyIntrinsic)) {
 325     UseMontgomeryMultiplyIntrinsic = true;
 326   }
 327   if (FLAG_IS_DEFAULT(UseMontgomerySquareIntrinsic)) {
 328     UseMontgomerySquareIntrinsic = true;
 329   }
 330 
 331   if (UseVectorizedMismatchIntrinsic) {
 332     warning("UseVectorizedMismatchIntrinsic specified, but not available on this CPU.");
 333     FLAG_SET_DEFAULT(UseVectorizedMismatchIntrinsic, false);
 334   }
 335 
 336 
 337   // Adjust RTM (Restricted Transactional Memory) flags.
 338   if (UseRTMLocking) {
 339     // If CPU or OS do not support TM:
 340     // Can't continue because UseRTMLocking affects UseBiasedLocking flag
 341     // setting during arguments processing. See use_biased_locking().
 342     // VM_Version_init() is executed after UseBiasedLocking is used
 343     // in Thread::allocate().
 344     if (PowerArchitecturePPC64 < 8) {
 345       vm_exit_during_initialization("RTM instructions are not available on this CPU.");
 346     }
 347 
 348     if (!has_tm()) {
 349       vm_exit_during_initialization("RTM is not supported on this OS version.");
 350     }
 351   }
 352 
 353   if (UseRTMLocking) {
 354 #if INCLUDE_RTM_OPT
 355     if (!FLAG_IS_CMDLINE(UseRTMLocking)) {
 356       // RTM locking should be used only for applications with
 357       // high lock contention. For now we do not use it by default.
 358       vm_exit_during_initialization("UseRTMLocking flag should be only set on command line");
 359     }
 360 #else
 361     // Only C2 does RTM locking optimization.
 362     // Can't continue because UseRTMLocking affects UseBiasedLocking flag
 363     // setting during arguments processing. See use_biased_locking().
 364     vm_exit_during_initialization("RTM locking optimization is not supported in this VM");
 365 #endif
 366   } else { // !UseRTMLocking
 367     if (UseRTMForStackLocks) {
 368       if (!FLAG_IS_DEFAULT(UseRTMForStackLocks)) {
 369         warning("UseRTMForStackLocks flag should be off when UseRTMLocking flag is off");
 370       }
 371       FLAG_SET_DEFAULT(UseRTMForStackLocks, false);
 372     }
 373     if (UseRTMDeopt) {
 374       FLAG_SET_DEFAULT(UseRTMDeopt, false);
 375     }
 376     if (PrintPreciseRTMLockingStatistics) {
 377       FLAG_SET_DEFAULT(PrintPreciseRTMLockingStatistics, false);
 378     }
 379   }
 380 
 381   // This machine allows unaligned memory accesses
 382   if (FLAG_IS_DEFAULT(UseUnalignedAccesses)) {
 383     FLAG_SET_DEFAULT(UseUnalignedAccesses, true);
 384   }
 385 
 386   check_virtualizations();
 387 }
 388 
 389 void VM_Version::check_virtualizations() {
 390 #if defined(_AIX)
 391   int rc = 0;
 392   perfstat_partition_total_t pinfo;
 393   rc = perfstat_partition_total(NULL, &pinfo, sizeof(perfstat_partition_total_t), 1);
 394   if (rc == 1) {
 395     Abstract_VM_Version::_detected_virtualization = PowerVM;
 396   }
 397 #else
 398   const char* info_file = "/proc/ppc64/lparcfg";
 399   // system_type=...qemu indicates PowerKVM
 400   // e.g. system_type=IBM pSeries (emulated by qemu)
 401   char line[500];
 402   FILE* fp = fopen(info_file, "r");
 403   if (fp == NULL) {
 404     return;
 405   }
 406   const char* system_type="system_type=";  // in case this line contains qemu, it is KVM
 407   const char* num_lpars="NumLpars="; // in case of non-KVM : if this line is found it is PowerVM
 408   bool num_lpars_found = false;
 409 
 410   while (fgets(line, sizeof(line), fp) != NULL) {
 411     if (strncmp(line, system_type, strlen(system_type)) == 0) {
 412       if (strstr(line, "qemu") != 0) {
 413         Abstract_VM_Version::_detected_virtualization = PowerKVM;
 414         fclose(fp);
 415         return;
 416       }
 417     }
 418     if (strncmp(line, num_lpars, strlen(num_lpars)) == 0) {
 419       num_lpars_found = true;
 420     }
 421   }
 422   if (num_lpars_found) {
 423     Abstract_VM_Version::_detected_virtualization = PowerVM;
 424   } else {
 425     Abstract_VM_Version::_detected_virtualization = PowerFullPartitionMode;
 426   }
 427   fclose(fp);
 428 #endif
 429 }
 430 
 431 void VM_Version::print_platform_virtualization_info(outputStream* st) {
 432 #if defined(_AIX)
 433   // more info about perfstat API see
 434   // https://www.ibm.com/support/knowledgecenter/en/ssw_aix_72/com.ibm.aix.prftools/idprftools_perfstat_glob_partition.htm
 435   int rc = 0;
 436   perfstat_partition_total_t pinfo;
 437   memset(&pinfo, 0, sizeof(perfstat_partition_total_t));
 438   rc = perfstat_partition_total(NULL, &pinfo, sizeof(perfstat_partition_total_t), 1);
 439   if (rc != 1) {
 440     return;
 441   } else {
 442     st->print_cr("Virtualization type   : PowerVM");
 443   }
 444   // CPU information
 445   perfstat_cpu_total_t cpuinfo;
 446   memset(&cpuinfo, 0, sizeof(perfstat_cpu_total_t));
 447   rc = perfstat_cpu_total(NULL, &cpuinfo, sizeof(perfstat_cpu_total_t), 1);
 448   if (rc != 1) {
 449     return;
 450   }
 451 
 452   st->print_cr("Processor description : %s", cpuinfo.description);
 453   st->print_cr("Processor speed       : %llu Hz", cpuinfo.processorHZ);
 454 
 455   st->print_cr("LPAR partition name           : %s", pinfo.name);
 456   st->print_cr("LPAR partition number         : %u", pinfo.lpar_id);
 457   st->print_cr("LPAR partition type           : %s", pinfo.type.b.shared_enabled ? "shared" : "dedicated");
 458   st->print_cr("LPAR mode                     : %s", pinfo.type.b.donate_enabled ? "donating" : pinfo.type.b.capped ? "capped" : "uncapped");
 459   st->print_cr("LPAR partition group ID       : %u", pinfo.group_id);
 460   st->print_cr("LPAR shared pool ID           : %u", pinfo.pool_id);
 461 
 462   st->print_cr("AMS (active memory sharing)   : %s", pinfo.type.b.ams_capable ? "capable" : "not capable");
 463   st->print_cr("AMS (active memory sharing)   : %s", pinfo.type.b.ams_enabled ? "on" : "off");
 464   st->print_cr("AME (active memory expansion) : %s", pinfo.type.b.ame_enabled ? "on" : "off");
 465 
 466   if (pinfo.type.b.ame_enabled) {
 467     st->print_cr("AME true memory in bytes      : %llu", pinfo.true_memory);
 468     st->print_cr("AME expanded memory in bytes  : %llu", pinfo.expanded_memory);
 469   }
 470 
 471   st->print_cr("SMT : %s", pinfo.type.b.smt_capable ? "capable" : "not capable");
 472   st->print_cr("SMT : %s", pinfo.type.b.smt_enabled ? "on" : "off");
 473   int ocpus = pinfo.online_cpus > 0 ?  pinfo.online_cpus : 1;
 474   st->print_cr("LPAR threads              : %d", cpuinfo.ncpus/ocpus);
 475   st->print_cr("LPAR online virtual cpus  : %d", pinfo.online_cpus);
 476   st->print_cr("LPAR logical cpus         : %d", cpuinfo.ncpus);
 477   st->print_cr("LPAR maximum virtual cpus : %u", pinfo.max_cpus);
 478   st->print_cr("LPAR minimum virtual cpus : %u", pinfo.min_cpus);
 479   st->print_cr("LPAR entitled capacity    : %4.2f", (double) (pinfo.entitled_proc_capacity/100.0));
 480   st->print_cr("LPAR online memory        : %llu MB", pinfo.online_memory);
 481   st->print_cr("LPAR maximum memory       : %llu MB", pinfo.max_memory);
 482   st->print_cr("LPAR minimum memory       : %llu MB", pinfo.min_memory);
 483 #else
 484   const char* info_file = "/proc/ppc64/lparcfg";
 485   const char* kw[] = { "system_type=", // qemu indicates PowerKVM
 486                        "partition_entitled_capacity=", // entitled processor capacity percentage
 487                        "partition_max_entitled_capacity=",
 488                        "capacity_weight=", // partition CPU weight
 489                        "partition_active_processors=",
 490                        "partition_potential_processors=",
 491                        "entitled_proc_capacity_available=",
 492                        "capped=", // 0 - uncapped, 1 - vcpus capped at entitled processor capacity percentage
 493                        "shared_processor_mode=", // (non)dedicated partition
 494                        "system_potential_processors=",
 495                        "pool=", // CPU-pool number
 496                        "pool_capacity=",
 497                        "NumLpars=", // on non-KVM machines, NumLpars is not found for full partition mode machines
 498                        NULL };
 499   if (!print_matching_lines_from_file(info_file, st, kw)) {
 500     st->print_cr("  <%s Not Available>", info_file);
 501   }
 502 #endif
 503 }
 504 
 505 bool VM_Version::use_biased_locking() {
 506 #if INCLUDE_RTM_OPT
 507   // RTM locking is most useful when there is high lock contention and
 508   // low data contention. With high lock contention the lock is usually
 509   // inflated and biased locking is not suitable for that case.
 510   // RTM locking code requires that biased locking is off.
 511   // Note: we can't switch off UseBiasedLocking in get_processor_features()
 512   // because it is used by Thread::allocate() which is called before
 513   // VM_Version::initialize().
 514   if (UseRTMLocking && UseBiasedLocking) {
 515     if (FLAG_IS_DEFAULT(UseBiasedLocking)) {
 516       FLAG_SET_DEFAULT(UseBiasedLocking, false);
 517     } else {
 518       warning("Biased locking is not supported with RTM locking; ignoring UseBiasedLocking flag." );
 519       UseBiasedLocking = false;
 520     }
 521   }
 522 #endif
 523   return UseBiasedLocking;
 524 }
 525 
 526 void VM_Version::print_features() {
 527   tty->print_cr("Version: %s L1_data_cache_line_size=%d", features_string(), L1_data_cache_line_size());
 528 }
 529 
 530 #ifdef COMPILER2
 531 // Determine section size on power6: If section size is 8 instructions,
 532 // there should be a difference between the two testloops of ~15 %. If
 533 // no difference is detected the section is assumed to be 32 instructions.
 534 void VM_Version::determine_section_size() {
 535 
 536   int unroll = 80;
 537 
 538   const int code_size = (2* unroll * 32 + 100)*BytesPerInstWord;
 539 
 540   // Allocate space for the code.
 541   ResourceMark rm;
 542   CodeBuffer cb("detect_section_size", code_size, 0);
 543   MacroAssembler* a = new MacroAssembler(&cb);
 544 
 545   uint32_t *code = (uint32_t *)a->pc();
 546   // Emit code.
 547   void (*test1)() = (void(*)())(void *)a->function_entry();
 548 
 549   Label l1;
 550 
 551   a->li(R4, 1);
 552   a->sldi(R4, R4, 28);
 553   a->b(l1);
 554   a->align(CodeEntryAlignment);
 555 
 556   a->bind(l1);
 557 
 558   for (int i = 0; i < unroll; i++) {
 559     // Schleife 1
 560     // ------- sector 0 ------------
 561     // ;; 0
 562     a->nop();                   // 1
 563     a->fpnop0();                // 2
 564     a->fpnop1();                // 3
 565     a->addi(R4,R4, -1); // 4
 566 
 567     // ;;  1
 568     a->nop();                   // 5
 569     a->fmr(F6, F6);             // 6
 570     a->fmr(F7, F7);             // 7
 571     a->endgroup();              // 8
 572     // ------- sector 8 ------------
 573 
 574     // ;;  2
 575     a->nop();                   // 9
 576     a->nop();                   // 10
 577     a->fmr(F8, F8);             // 11
 578     a->fmr(F9, F9);             // 12
 579 
 580     // ;;  3
 581     a->nop();                   // 13
 582     a->fmr(F10, F10);           // 14
 583     a->fmr(F11, F11);           // 15
 584     a->endgroup();              // 16
 585     // -------- sector 16 -------------
 586 
 587     // ;;  4
 588     a->nop();                   // 17
 589     a->nop();                   // 18
 590     a->fmr(F15, F15);           // 19
 591     a->fmr(F16, F16);           // 20
 592 
 593     // ;;  5
 594     a->nop();                   // 21
 595     a->fmr(F17, F17);           // 22
 596     a->fmr(F18, F18);           // 23
 597     a->endgroup();              // 24
 598     // ------- sector 24  ------------
 599 
 600     // ;;  6
 601     a->nop();                   // 25
 602     a->nop();                   // 26
 603     a->fmr(F19, F19);           // 27
 604     a->fmr(F20, F20);           // 28
 605 
 606     // ;;  7
 607     a->nop();                   // 29
 608     a->fmr(F21, F21);           // 30
 609     a->fmr(F22, F22);           // 31
 610     a->brnop0();                // 32
 611 
 612     // ------- sector 32 ------------
 613   }
 614 
 615   // ;; 8
 616   a->cmpdi(CCR0, R4, unroll);   // 33
 617   a->bge(CCR0, l1);             // 34
 618   a->blr();
 619 
 620   // Emit code.
 621   void (*test2)() = (void(*)())(void *)a->function_entry();
 622   // uint32_t *code = (uint32_t *)a->pc();
 623 
 624   Label l2;
 625 
 626   a->li(R4, 1);
 627   a->sldi(R4, R4, 28);
 628   a->b(l2);
 629   a->align(CodeEntryAlignment);
 630 
 631   a->bind(l2);
 632 
 633   for (int i = 0; i < unroll; i++) {
 634     // Schleife 2
 635     // ------- sector 0 ------------
 636     // ;; 0
 637     a->brnop0();                  // 1
 638     a->nop();                     // 2
 639     //a->cmpdi(CCR0, R4, unroll);
 640     a->fpnop0();                  // 3
 641     a->fpnop1();                  // 4
 642     a->addi(R4,R4, -1);           // 5
 643 
 644     // ;; 1
 645 
 646     a->nop();                     // 6
 647     a->fmr(F6, F6);               // 7
 648     a->fmr(F7, F7);               // 8
 649     // ------- sector 8 ---------------
 650 
 651     // ;; 2
 652     a->endgroup();                // 9
 653 
 654     // ;; 3
 655     a->nop();                     // 10
 656     a->nop();                     // 11
 657     a->fmr(F8, F8);               // 12
 658 
 659     // ;; 4
 660     a->fmr(F9, F9);               // 13
 661     a->nop();                     // 14
 662     a->fmr(F10, F10);             // 15
 663 
 664     // ;; 5
 665     a->fmr(F11, F11);             // 16
 666     // -------- sector 16 -------------
 667 
 668     // ;; 6
 669     a->endgroup();                // 17
 670 
 671     // ;; 7
 672     a->nop();                     // 18
 673     a->nop();                     // 19
 674     a->fmr(F15, F15);             // 20
 675 
 676     // ;; 8
 677     a->fmr(F16, F16);             // 21
 678     a->nop();                     // 22
 679     a->fmr(F17, F17);             // 23
 680 
 681     // ;; 9
 682     a->fmr(F18, F18);             // 24
 683     // -------- sector 24 -------------
 684 
 685     // ;; 10
 686     a->endgroup();                // 25
 687 
 688     // ;; 11
 689     a->nop();                     // 26
 690     a->nop();                     // 27
 691     a->fmr(F19, F19);             // 28
 692 
 693     // ;; 12
 694     a->fmr(F20, F20);             // 29
 695     a->nop();                     // 30
 696     a->fmr(F21, F21);             // 31
 697 
 698     // ;; 13
 699     a->fmr(F22, F22);             // 32
 700   }
 701 
 702   // -------- sector 32 -------------
 703   // ;; 14
 704   a->cmpdi(CCR0, R4, unroll); // 33
 705   a->bge(CCR0, l2);           // 34
 706 
 707   a->blr();
 708   uint32_t *code_end = (uint32_t *)a->pc();
 709   a->flush();
 710 
 711   cb.insts()->set_end((u_char*)code_end);
 712 
 713   double loop1_seconds,loop2_seconds, rel_diff;
 714   uint64_t start1, stop1;
 715 
 716   start1 = os::current_thread_cpu_time(false);
 717   (*test1)();
 718   stop1 = os::current_thread_cpu_time(false);
 719   loop1_seconds = (stop1- start1) / (1000 *1000 *1000.0);
 720 
 721 
 722   start1 = os::current_thread_cpu_time(false);
 723   (*test2)();
 724   stop1 = os::current_thread_cpu_time(false);
 725 
 726   loop2_seconds = (stop1 - start1) / (1000 *1000 *1000.0);
 727 
 728   rel_diff = (loop2_seconds - loop1_seconds) / loop1_seconds *100;
 729 
 730   if (PrintAssembly || PrintStubCode) {
 731     ttyLocker ttyl;
 732     tty->print_cr("Decoding section size detection stub at " INTPTR_FORMAT " before execution:", p2i(code));
 733     // Use existing decode function. This enables the [MachCode] format which is needed to DecodeErrorFile.
 734     Disassembler::decode(&cb, (u_char*)code, (u_char*)code_end, tty);
 735     tty->print_cr("Time loop1 :%f", loop1_seconds);
 736     tty->print_cr("Time loop2 :%f", loop2_seconds);
 737     tty->print_cr("(time2 - time1) / time1 = %f %%", rel_diff);
 738 
 739     if (rel_diff > 12.0) {
 740       tty->print_cr("Section Size 8 Instructions");
 741     } else{
 742       tty->print_cr("Section Size 32 Instructions or Power5");
 743     }
 744   }
 745 
 746 #if 0 // TODO: PPC port
 747   // Set sector size (if not set explicitly).
 748   if (FLAG_IS_DEFAULT(Power6SectorSize128PPC64)) {
 749     if (rel_diff > 12.0) {
 750       PdScheduling::power6SectorSize = 0x20;
 751     } else {
 752       PdScheduling::power6SectorSize = 0x80;
 753     }
 754   } else if (Power6SectorSize128PPC64) {
 755     PdScheduling::power6SectorSize = 0x80;
 756   } else {
 757     PdScheduling::power6SectorSize = 0x20;
 758   }
 759 #endif
 760   if (UsePower6SchedulerPPC64) Unimplemented();
 761 }
 762 #endif // COMPILER2
 763 
 764 void VM_Version::determine_features() {
 765 #if defined(ABI_ELFv2)
 766   // 1 InstWord per call for the blr instruction.
 767   const int code_size = (num_features+1+2*1)*BytesPerInstWord;
 768 #else
 769   // 7 InstWords for each call (function descriptor + blr instruction).
 770   const int code_size = (num_features+1+2*7)*BytesPerInstWord;
 771 #endif
 772   int features = 0;
 773 
 774   // create test area
 775   enum { BUFFER_SIZE = 2*4*K }; // Needs to be >=2* max cache line size (cache line size can't exceed min page size).
 776   char test_area[BUFFER_SIZE];
 777   char *mid_of_test_area = &test_area[BUFFER_SIZE>>1];
 778 
 779   // Allocate space for the code.
 780   ResourceMark rm;
 781   CodeBuffer cb("detect_cpu_features", code_size, 0);
 782   MacroAssembler* a = new MacroAssembler(&cb);
 783 
 784   // Must be set to true so we can generate the test code.
 785   _features = VM_Version::all_features_m;
 786 
 787   // Emit code.
 788   void (*test)(address addr, uint64_t offset)=(void(*)(address addr, uint64_t offset))(void *)a->function_entry();
 789   uint32_t *code = (uint32_t *)a->pc();
 790   // Don't use R0 in ldarx.
 791   // Keep R3_ARG1 unmodified, it contains &field (see below).
 792   // Keep R4_ARG2 unmodified, it contains offset = 0 (see below).
 793   a->fsqrt(F3, F4);                            // code[0]  -> fsqrt_m
 794   a->fsqrts(F3, F4);                           // code[1]  -> fsqrts_m
 795   a->isel(R7, R5, R6, 0);                      // code[2]  -> isel_m
 796   a->ldarx_unchecked(R7, R3_ARG1, R4_ARG2, 1); // code[3]  -> lxarx_m
 797   a->cmpb(R7, R5, R6);                         // code[4]  -> cmpb
 798   a->popcntb(R7, R5);                          // code[5]  -> popcntb
 799   a->popcntw(R7, R5);                          // code[6]  -> popcntw
 800   a->fcfids(F3, F4);                           // code[7]  -> fcfids
 801   a->vand(VR0, VR0, VR0);                      // code[8]  -> vand
 802   // arg0 of lqarx must be an even register, (arg1 + arg2) must be a multiple of 16
 803   a->lqarx_unchecked(R6, R3_ARG1, R4_ARG2, 1); // code[9]  -> lqarx_m
 804   a->vcipher(VR0, VR1, VR2);                   // code[10] -> vcipher
 805   a->vpmsumb(VR0, VR1, VR2);                   // code[11] -> vpmsumb
 806   a->mfdscr(R0);                               // code[12] -> mfdscr
 807   a->lxvd2x(VSR0, R3_ARG1);                    // code[13] -> vsx
 808   a->ldbrx(R7, R3_ARG1, R4_ARG2);              // code[14] -> ldbrx
 809   a->stdbrx(R7, R3_ARG1, R4_ARG2);             // code[15] -> stdbrx
 810   a->vshasigmaw(VR0, VR1, 1, 0xF);             // code[16] -> vshasig
 811   // rtm is determined by OS
 812   a->darn(R7);                                 // code[17] -> darn
 813   a->blr();
 814 
 815   // Emit function to set one cache line to zero. Emit function descriptor and get pointer to it.
 816   void (*zero_cacheline_func_ptr)(char*) = (void(*)(char*))(void *)a->function_entry();
 817   a->dcbz(R3_ARG1); // R3_ARG1 = addr
 818   a->blr();
 819 
 820   uint32_t *code_end = (uint32_t *)a->pc();
 821   a->flush();
 822   _features = VM_Version::unknown_m;
 823 
 824   // Print the detection code.
 825   if (PrintAssembly) {
 826     ttyLocker ttyl;
 827     tty->print_cr("Decoding cpu-feature detection stub at " INTPTR_FORMAT " before execution:", p2i(code));
 828     Disassembler::decode((u_char*)code, (u_char*)code_end, tty);
 829   }
 830 
 831   // Measure cache line size.
 832   memset(test_area, 0xFF, BUFFER_SIZE); // Fill test area with 0xFF.
 833   (*zero_cacheline_func_ptr)(mid_of_test_area); // Call function which executes dcbz to the middle.
 834   int count = 0; // count zeroed bytes
 835   for (int i = 0; i < BUFFER_SIZE; i++) if (test_area[i] == 0) count++;
 836   guarantee(is_power_of_2(count), "cache line size needs to be a power of 2");
 837   _L1_data_cache_line_size = count;
 838 
 839   // Execute code. Illegal instructions will be replaced by 0 in the signal handler.
 840   VM_Version::_is_determine_features_test_running = true;
 841   // We must align the first argument to 16 bytes because of the lqarx check.
 842   (*test)(align_up((address)mid_of_test_area, 16), 0);
 843   VM_Version::_is_determine_features_test_running = false;
 844 
 845   // determine which instructions are legal.
 846   int feature_cntr = 0;
 847   if (code[feature_cntr++]) features |= fsqrt_m;
 848   if (code[feature_cntr++]) features |= fsqrts_m;
 849   if (code[feature_cntr++]) features |= isel_m;
 850   if (code[feature_cntr++]) features |= lxarxeh_m;
 851   if (code[feature_cntr++]) features |= cmpb_m;
 852   if (code[feature_cntr++]) features |= popcntb_m;
 853   if (code[feature_cntr++]) features |= popcntw_m;
 854   if (code[feature_cntr++]) features |= fcfids_m;
 855   if (code[feature_cntr++]) features |= vand_m;
 856   if (code[feature_cntr++]) features |= lqarx_m;
 857   if (code[feature_cntr++]) features |= vcipher_m;
 858   if (code[feature_cntr++]) features |= vpmsumb_m;
 859   if (code[feature_cntr++]) features |= mfdscr_m;
 860   if (code[feature_cntr++]) features |= vsx_m;
 861   if (code[feature_cntr++]) features |= ldbrx_m;
 862   if (code[feature_cntr++]) features |= stdbrx_m;
 863   if (code[feature_cntr++]) features |= vshasig_m;
 864   // feature rtm_m is determined by OS
 865   if (code[feature_cntr++]) features |= darn_m;
 866 
 867   // Print the detection code.
 868   if (PrintAssembly) {
 869     ttyLocker ttyl;
 870     tty->print_cr("Decoding cpu-feature detection stub at " INTPTR_FORMAT " after execution:", p2i(code));
 871     Disassembler::decode((u_char*)code, (u_char*)code_end, tty);
 872   }
 873 
 874   _features = features;
 875 
 876 #ifdef AIX
 877   // To enable it on AIX it's necessary POWER8 or above and at least AIX 7.2.
 878   // Actually, this is supported since AIX 7.1.. Unfortunately, this first
 879   // contained bugs, so that it can only be enabled after AIX 7.1.3.30.
 880   // The Java property os.version, which is used in RTM tests to decide
 881   // whether the feature is available, only knows major and minor versions.
 882   // We don't want to change this property, as user code might depend on it.
 883   // So the tests can not check on subversion 3.30, and we only enable RTM
 884   // with AIX 7.2.
 885   if (has_lqarx()) { // POWER8 or above
 886     if (os::Aix::os_version() >= 0x07020000) { // At least AIX 7.2.
 887       _features |= rtm_m;
 888     }
 889   }
 890 #endif
 891 #if defined(LINUX) && defined(VM_LITTLE_ENDIAN)
 892   unsigned long auxv = getauxval(AT_HWCAP2);
 893 
 894   if (auxv & PPC_FEATURE2_HTM_NOSC) {
 895     if (auxv & PPC_FEATURE2_HAS_HTM) {
 896       // TM on POWER8 and POWER9 in compat mode (VM) is supported by the JVM.
 897       // TM on POWER9 DD2.1 NV (baremetal) is not supported by the JVM (TM on
 898       // POWER9 DD2.1 NV has a few issues that need a couple of firmware
 899       // and kernel workarounds, so there is a new mode only supported
 900       // on non-virtualized P9 machines called HTM with no Suspend Mode).
 901       // TM on POWER9 D2.2+ NV is not supported at all by Linux.
 902       _features |= rtm_m;
 903     }
 904   }
 905 #endif
 906 }
 907 
 908 // Power 8: Configure Data Stream Control Register.
 909 void VM_Version::config_dscr() {
 910   // 7 InstWords for each call (function descriptor + blr instruction).
 911   const int code_size = (2+2*7)*BytesPerInstWord;
 912 
 913   // Allocate space for the code.
 914   ResourceMark rm;
 915   CodeBuffer cb("config_dscr", code_size, 0);
 916   MacroAssembler* a = new MacroAssembler(&cb);
 917 
 918   // Emit code.
 919   uint64_t (*get_dscr)() = (uint64_t(*)())(void *)a->function_entry();
 920   uint32_t *code = (uint32_t *)a->pc();
 921   a->mfdscr(R3);
 922   a->blr();
 923 
 924   void (*set_dscr)(long) = (void(*)(long))(void *)a->function_entry();
 925   a->mtdscr(R3);
 926   a->blr();
 927 
 928   uint32_t *code_end = (uint32_t *)a->pc();
 929   a->flush();
 930 
 931   // Print the detection code.
 932   if (PrintAssembly) {
 933     ttyLocker ttyl;
 934     tty->print_cr("Decoding dscr configuration stub at " INTPTR_FORMAT " before execution:", p2i(code));
 935     Disassembler::decode((u_char*)code, (u_char*)code_end, tty);
 936   }
 937 
 938   // Apply the configuration if needed.
 939   _dscr_val = (*get_dscr)();
 940   if (Verbose) {
 941     tty->print_cr("dscr value was 0x%lx" , _dscr_val);
 942   }
 943   bool change_requested = false;
 944   if (DSCR_PPC64 != (uintx)-1) {
 945     _dscr_val = DSCR_PPC64;
 946     change_requested = true;
 947   }
 948   if (DSCR_DPFD_PPC64 <= 7) {
 949     uint64_t mask = 0x7;
 950     if ((_dscr_val & mask) != DSCR_DPFD_PPC64) {
 951       _dscr_val = (_dscr_val & ~mask) | (DSCR_DPFD_PPC64);
 952       change_requested = true;
 953     }
 954   }
 955   if (DSCR_URG_PPC64 <= 7) {
 956     uint64_t mask = 0x7 << 6;
 957     if ((_dscr_val & mask) != DSCR_DPFD_PPC64 << 6) {
 958       _dscr_val = (_dscr_val & ~mask) | (DSCR_URG_PPC64 << 6);
 959       change_requested = true;
 960     }
 961   }
 962   if (change_requested) {
 963     (*set_dscr)(_dscr_val);
 964     if (Verbose) {
 965       tty->print_cr("dscr was set to 0x%lx" , (*get_dscr)());
 966     }
 967   }
 968 }
 969 
 970 static uint64_t saved_features = 0;
 971 
 972 void VM_Version::allow_all() {
 973   saved_features = _features;
 974   _features      = all_features_m;
 975 }
 976 
 977 void VM_Version::revert() {
 978   _features = saved_features;
 979 }