1 /*
2 * Copyright (c) 2000, 2014, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "c1/c1_Compilation.hpp"
27 #include "c1/c1_Instruction.hpp"
28 #include "c1/c1_InstructionPrinter.hpp"
29 #include "c1/c1_LIRAssembler.hpp"
30 #include "c1/c1_MacroAssembler.hpp"
31 #include "c1/c1_ValueStack.hpp"
32 #include "ci/ciInstance.hpp"
33 #include "runtime/os.hpp"
34
35 void LIR_Assembler::patching_epilog(PatchingStub* patch, LIR_PatchCode patch_code, Register obj, CodeEmitInfo* info) {
36 // we must have enough patching space so that call can be inserted
37 while ((intx) _masm->pc() - (intx) patch->pc_start() < NativeCall::instruction_size) {
38 _masm->nop();
39 }
40 patch->install(_masm, patch_code, obj, info);
41 append_code_stub(patch);
42
43 #ifdef ASSERT
44 Bytecodes::Code code = info->scope()->method()->java_code_at_bci(info->stack()->bci());
45 if (patch->id() == PatchingStub::access_field_id) {
46 switch (code) {
47 case Bytecodes::_putstatic:
48 case Bytecodes::_getstatic:
49 case Bytecodes::_putfield:
50 case Bytecodes::_getfield:
51 break;
52 default:
53 ShouldNotReachHere();
54 }
55 } else if (patch->id() == PatchingStub::load_klass_id) {
56 switch (code) {
57 case Bytecodes::_new:
58 case Bytecodes::_anewarray:
59 case Bytecodes::_multianewarray:
60 case Bytecodes::_instanceof:
61 case Bytecodes::_checkcast:
62 break;
63 default:
64 ShouldNotReachHere();
65 }
66 } else if (patch->id() == PatchingStub::load_mirror_id) {
67 switch (code) {
68 case Bytecodes::_putstatic:
69 case Bytecodes::_getstatic:
70 case Bytecodes::_ldc:
71 case Bytecodes::_ldc_w:
72 break;
73 default:
74 ShouldNotReachHere();
75 }
76 } else if (patch->id() == PatchingStub::load_appendix_id) {
77 Bytecodes::Code bc_raw = info->scope()->method()->raw_code_at_bci(info->stack()->bci());
78 assert(Bytecodes::has_optional_appendix(bc_raw), "unexpected appendix resolution");
79 } else {
80 ShouldNotReachHere();
81 }
82 #endif
83 }
84
85 PatchingStub::PatchID LIR_Assembler::patching_id(CodeEmitInfo* info) {
86 IRScope* scope = info->scope();
87 Bytecodes::Code bc_raw = scope->method()->raw_code_at_bci(info->stack()->bci());
88 if (Bytecodes::has_optional_appendix(bc_raw)) {
89 return PatchingStub::load_appendix_id;
90 }
91 return PatchingStub::load_mirror_id;
92 }
93
94 //---------------------------------------------------------------
95
96
97 LIR_Assembler::LIR_Assembler(Compilation* c):
98 _compilation(c)
99 , _masm(c->masm())
100 , _bs(Universe::heap()->barrier_set())
101 , _frame_map(c->frame_map())
102 , _current_block(NULL)
103 , _pending_non_safepoint(NULL)
104 , _pending_non_safepoint_offset(0)
105 {
106 _slow_case_stubs = new CodeStubList();
107 }
108
109
110 LIR_Assembler::~LIR_Assembler() {
111 }
112
113
114 void LIR_Assembler::check_codespace() {
115 CodeSection* cs = _masm->code_section();
116 if (cs->remaining() < (int)(NOT_LP64(1*K)LP64_ONLY(2*K))) {
117 BAILOUT("CodeBuffer overflow");
118 }
119 }
120
121
122 void LIR_Assembler::append_code_stub(CodeStub* stub) {
123 _slow_case_stubs->append(stub);
124 }
125
126 void LIR_Assembler::emit_stubs(CodeStubList* stub_list) {
127 for (int m = 0; m < stub_list->length(); m++) {
128 CodeStub* s = (*stub_list)[m];
129
130 check_codespace();
131 CHECK_BAILOUT();
132
133 #ifndef PRODUCT
134 if (CommentedAssembly) {
135 stringStream st;
136 s->print_name(&st);
137 st.print(" slow case");
138 _masm->block_comment(st.as_string());
139 }
140 #endif
141 s->emit_code(this);
142 #ifdef ASSERT
143 s->assert_no_unbound_labels();
144 #endif
145 }
146 }
147
148
149 void LIR_Assembler::emit_slow_case_stubs() {
150 emit_stubs(_slow_case_stubs);
151 }
152
153
154 bool LIR_Assembler::needs_icache(ciMethod* method) const {
155 return !method->is_static();
156 }
157
158
159 int LIR_Assembler::code_offset() const {
160 return _masm->offset();
161 }
162
163
164 address LIR_Assembler::pc() const {
165 return _masm->pc();
166 }
167
168 // To bang the stack of this compiled method we use the stack size
169 // that the interpreter would need in case of a deoptimization. This
170 // removes the need to bang the stack in the deoptimization blob which
171 // in turn simplifies stack overflow handling.
172 int LIR_Assembler::bang_size_in_bytes() const {
173 return MAX2(initial_frame_size_in_bytes() + os::extra_bang_size_in_bytes(), _compilation->interpreter_frame_size());
174 }
175
176 void LIR_Assembler::emit_exception_entries(ExceptionInfoList* info_list) {
177 for (int i = 0; i < info_list->length(); i++) {
178 XHandlers* handlers = info_list->at(i)->exception_handlers();
179
180 for (int j = 0; j < handlers->length(); j++) {
181 XHandler* handler = handlers->handler_at(j);
182 assert(handler->lir_op_id() != -1, "handler not processed by LinearScan");
183 assert(handler->entry_code() == NULL ||
184 handler->entry_code()->instructions_list()->last()->code() == lir_branch ||
185 handler->entry_code()->instructions_list()->last()->code() == lir_delay_slot, "last operation must be branch");
186
187 if (handler->entry_pco() == -1) {
188 // entry code not emitted yet
189 if (handler->entry_code() != NULL && handler->entry_code()->instructions_list()->length() > 1) {
190 handler->set_entry_pco(code_offset());
191 if (CommentedAssembly) {
192 _masm->block_comment("Exception adapter block");
193 }
194 emit_lir_list(handler->entry_code());
195 } else {
196 handler->set_entry_pco(handler->entry_block()->exception_handler_pco());
197 }
198
199 assert(handler->entry_pco() != -1, "must be set now");
200 }
201 }
202 }
203 }
204
205
206 void LIR_Assembler::emit_code(BlockList* hir) {
207 if (PrintLIR) {
208 print_LIR(hir);
209 }
210
211 int n = hir->length();
212 for (int i = 0; i < n; i++) {
213 emit_block(hir->at(i));
214 CHECK_BAILOUT();
215 }
216
217 flush_debug_info(code_offset());
218
219 DEBUG_ONLY(check_no_unbound_labels());
220 }
221
222
223 void LIR_Assembler::emit_block(BlockBegin* block) {
224 if (block->is_set(BlockBegin::backward_branch_target_flag)) {
225 align_backward_branch_target();
226 }
227
228 // if this block is the start of an exception handler, record the
229 // PC offset of the first instruction for later construction of
230 // the ExceptionHandlerTable
231 if (block->is_set(BlockBegin::exception_entry_flag)) {
232 block->set_exception_handler_pco(code_offset());
233 }
234
235 #ifndef PRODUCT
236 if (PrintLIRWithAssembly) {
237 // don't print Phi's
238 InstructionPrinter ip(false);
239 block->print(ip);
240 }
241 #endif /* PRODUCT */
242
243 assert(block->lir() != NULL, "must have LIR");
244 X86_ONLY(assert(_masm->rsp_offset() == 0, "frame size should be fixed"));
245
246 #ifndef PRODUCT
247 if (CommentedAssembly) {
248 stringStream st;
249 st.print_cr(" block B%d [%d, %d]", block->block_id(), block->bci(), block->end()->printable_bci());
250 _masm->block_comment(st.as_string());
251 }
252 #endif
253
254 emit_lir_list(block->lir());
255
256 X86_ONLY(assert(_masm->rsp_offset() == 0, "frame size should be fixed"));
257 }
258
259
260 void LIR_Assembler::emit_lir_list(LIR_List* list) {
261 peephole(list);
262
263 int n = list->length();
264 for (int i = 0; i < n; i++) {
265 LIR_Op* op = list->at(i);
266
267 check_codespace();
268 CHECK_BAILOUT();
269
270 #ifndef PRODUCT
271 if (CommentedAssembly) {
272 // Don't record out every op since that's too verbose. Print
273 // branches since they include block and stub names. Also print
274 // patching moves since they generate funny looking code.
275 if (op->code() == lir_branch ||
276 (op->code() == lir_move && op->as_Op1()->patch_code() != lir_patch_none)) {
277 stringStream st;
278 op->print_on(&st);
279 _masm->block_comment(st.as_string());
280 }
281 }
282 if (PrintLIRWithAssembly) {
283 // print out the LIR operation followed by the resulting assembly
284 list->at(i)->print(); tty->cr();
285 }
286 #endif /* PRODUCT */
287
288 op->emit_code(this);
289
290 if (compilation()->debug_info_recorder()->recording_non_safepoints()) {
291 process_debug_info(op);
292 }
293
294 #ifndef PRODUCT
295 if (PrintLIRWithAssembly) {
296 _masm->code()->decode();
297 }
298 #endif /* PRODUCT */
299 }
300 }
301
302 #ifdef ASSERT
303 void LIR_Assembler::check_no_unbound_labels() {
304 CHECK_BAILOUT();
305
306 for (int i = 0; i < _branch_target_blocks.length() - 1; i++) {
307 if (!_branch_target_blocks.at(i)->label()->is_bound()) {
308 tty->print_cr("label of block B%d is not bound", _branch_target_blocks.at(i)->block_id());
309 assert(false, "unbound label");
310 }
311 }
312 }
313 #endif
314
315 //----------------------------------debug info--------------------------------
316
317
318 void LIR_Assembler::add_debug_info_for_branch(CodeEmitInfo* info) {
319 int pc_offset = code_offset();
320 flush_debug_info(pc_offset);
321 info->record_debug_info(compilation()->debug_info_recorder(), pc_offset);
322 if (info->exception_handlers() != NULL) {
323 compilation()->add_exception_handlers_for_pco(pc_offset, info->exception_handlers());
324 }
325 }
326
327
328 void LIR_Assembler::add_call_info(int pc_offset, CodeEmitInfo* cinfo) {
329 flush_debug_info(pc_offset);
330 cinfo->record_debug_info(compilation()->debug_info_recorder(), pc_offset);
331 if (cinfo->exception_handlers() != NULL) {
332 compilation()->add_exception_handlers_for_pco(pc_offset, cinfo->exception_handlers());
333 }
334 }
335
336 static ValueStack* debug_info(Instruction* ins) {
337 StateSplit* ss = ins->as_StateSplit();
338 if (ss != NULL) return ss->state();
339 return ins->state_before();
340 }
341
342 void LIR_Assembler::process_debug_info(LIR_Op* op) {
343 Instruction* src = op->source();
344 if (src == NULL) return;
345 int pc_offset = code_offset();
346 if (_pending_non_safepoint == src) {
347 _pending_non_safepoint_offset = pc_offset;
348 return;
349 }
350 ValueStack* vstack = debug_info(src);
351 if (vstack == NULL) return;
352 if (_pending_non_safepoint != NULL) {
353 // Got some old debug info. Get rid of it.
354 if (debug_info(_pending_non_safepoint) == vstack) {
355 _pending_non_safepoint_offset = pc_offset;
356 return;
357 }
358 if (_pending_non_safepoint_offset < pc_offset) {
359 record_non_safepoint_debug_info();
360 }
361 _pending_non_safepoint = NULL;
362 }
363 // Remember the debug info.
364 if (pc_offset > compilation()->debug_info_recorder()->last_pc_offset()) {
365 _pending_non_safepoint = src;
366 _pending_non_safepoint_offset = pc_offset;
367 }
368 }
369
370 // Index caller states in s, where 0 is the oldest, 1 its callee, etc.
371 // Return NULL if n is too large.
372 // Returns the caller_bci for the next-younger state, also.
373 static ValueStack* nth_oldest(ValueStack* s, int n, int& bci_result) {
374 ValueStack* t = s;
375 for (int i = 0; i < n; i++) {
376 if (t == NULL) break;
377 t = t->caller_state();
378 }
379 if (t == NULL) return NULL;
380 for (;;) {
381 ValueStack* tc = t->caller_state();
382 if (tc == NULL) return s;
383 t = tc;
384 bci_result = tc->bci();
385 s = s->caller_state();
386 }
387 }
388
389 void LIR_Assembler::record_non_safepoint_debug_info() {
390 int pc_offset = _pending_non_safepoint_offset;
391 ValueStack* vstack = debug_info(_pending_non_safepoint);
392 int bci = vstack->bci();
393
394 DebugInformationRecorder* debug_info = compilation()->debug_info_recorder();
395 assert(debug_info->recording_non_safepoints(), "sanity");
396
397 debug_info->add_non_safepoint(pc_offset);
398
399 // Visit scopes from oldest to youngest.
400 for (int n = 0; ; n++) {
401 int s_bci = bci;
402 ValueStack* s = nth_oldest(vstack, n, s_bci);
403 if (s == NULL) break;
404 IRScope* scope = s->scope();
405 //Always pass false for reexecute since these ScopeDescs are never used for deopt
406 debug_info->describe_scope(pc_offset, scope->method(), s->bci(), false/*reexecute*/);
407 }
408
409 debug_info->end_non_safepoint(pc_offset);
410 }
411
412
413 void LIR_Assembler::add_debug_info_for_null_check_here(CodeEmitInfo* cinfo) {
414 add_debug_info_for_null_check(code_offset(), cinfo);
415 }
416
417 void LIR_Assembler::add_debug_info_for_null_check(int pc_offset, CodeEmitInfo* cinfo) {
418 ImplicitNullCheckStub* stub = new ImplicitNullCheckStub(pc_offset, cinfo);
419 append_code_stub(stub);
420 }
421
422 void LIR_Assembler::add_debug_info_for_div0_here(CodeEmitInfo* info) {
423 add_debug_info_for_div0(code_offset(), info);
424 }
425
426 void LIR_Assembler::add_debug_info_for_div0(int pc_offset, CodeEmitInfo* cinfo) {
427 DivByZeroStub* stub = new DivByZeroStub(pc_offset, cinfo);
428 append_code_stub(stub);
429 }
430
431 void LIR_Assembler::emit_rtcall(LIR_OpRTCall* op) {
432 rt_call(op->result_opr(), op->addr(), op->arguments(), op->tmp(), op->info());
433 }
434
435
436 void LIR_Assembler::emit_call(LIR_OpJavaCall* op) {
437 verify_oop_map(op->info());
438
439 if (os::is_MP()) {
440 // must align calls sites, otherwise they can't be updated atomically on MP hardware
441 align_call(op->code());
442 }
443
444 // emit the static call stub stuff out of line
445 emit_static_call_stub();
446
447 switch (op->code()) {
448 case lir_static_call:
449 case lir_dynamic_call:
450 call(op, relocInfo::static_call_type);
451 break;
452 case lir_optvirtual_call:
453 call(op, relocInfo::opt_virtual_call_type);
454 break;
455 case lir_icvirtual_call:
456 ic_call(op);
457 break;
458 case lir_virtual_call:
459 vtable_call(op);
460 break;
461 default:
462 fatal(err_msg_res("unexpected op code: %s", op->name()));
463 break;
464 }
465
466 // JSR 292
467 // Record if this method has MethodHandle invokes.
468 if (op->is_method_handle_invoke()) {
469 compilation()->set_has_method_handle_invokes(true);
470 }
471
472 #if defined(X86) && defined(TIERED)
473 // C2 leave fpu stack dirty clean it
474 if (UseSSE < 2) {
475 int i;
476 for ( i = 1; i <= 7 ; i++ ) {
477 ffree(i);
478 }
479 if (!op->result_opr()->is_float_kind()) {
480 ffree(0);
481 }
482 }
483 #endif // X86 && TIERED
484 }
485
486
487 void LIR_Assembler::emit_opLabel(LIR_OpLabel* op) {
488 _masm->bind (*(op->label()));
489 }
490
491
492 void LIR_Assembler::emit_op1(LIR_Op1* op) {
493 switch (op->code()) {
494 case lir_move:
495 if (op->move_kind() == lir_move_volatile) {
496 assert(op->patch_code() == lir_patch_none, "can't patch volatiles");
497 volatile_move_op(op->in_opr(), op->result_opr(), op->type(), op->info());
498 } else {
499 move_op(op->in_opr(), op->result_opr(), op->type(),
500 op->patch_code(), op->info(), op->pop_fpu_stack(),
501 op->move_kind() == lir_move_unaligned,
502 op->move_kind() == lir_move_wide);
503 }
504 break;
505
506 case lir_roundfp: {
507 LIR_OpRoundFP* round_op = op->as_OpRoundFP();
508 roundfp_op(round_op->in_opr(), round_op->tmp(), round_op->result_opr(), round_op->pop_fpu_stack());
509 break;
510 }
511
512 case lir_return:
513 return_op(op->in_opr());
514 break;
515
516 case lir_safepoint:
517 if (compilation()->debug_info_recorder()->last_pc_offset() == code_offset()) {
518 _masm->nop();
519 }
520 safepoint_poll(op->in_opr(), op->info());
521 break;
522
523 case lir_fxch:
524 fxch(op->in_opr()->as_jint());
525 break;
526
527 case lir_fld:
528 fld(op->in_opr()->as_jint());
529 break;
530
531 case lir_ffree:
532 ffree(op->in_opr()->as_jint());
533 break;
534
535 case lir_branch:
536 break;
537
538 case lir_push:
539 push(op->in_opr());
540 break;
541
542 case lir_pop:
543 pop(op->in_opr());
544 break;
545
546 case lir_neg:
547 negate(op->in_opr(), op->result_opr());
548 break;
549
550 case lir_leal:
551 leal(op->in_opr(), op->result_opr());
552 break;
553
554 case lir_null_check:
555 if (GenerateCompilerNullChecks) {
556 add_debug_info_for_null_check_here(op->info());
557
558 if (op->in_opr()->is_single_cpu()) {
559 _masm->null_check(op->in_opr()->as_register());
560 } else {
561 Unimplemented();
562 }
563 }
564 break;
565
566 case lir_monaddr:
567 monitor_address(op->in_opr()->as_constant_ptr()->as_jint(), op->result_opr());
568 break;
569
570 #ifdef SPARC
571 case lir_pack64:
572 pack64(op->in_opr(), op->result_opr());
573 break;
574
575 case lir_unpack64:
576 unpack64(op->in_opr(), op->result_opr());
577 break;
578 #endif
579
580 case lir_unwind:
581 unwind_op(op->in_opr());
582 break;
583
584 default:
585 Unimplemented();
586 break;
587 }
588 }
589
590
591 void LIR_Assembler::emit_op0(LIR_Op0* op) {
592 switch (op->code()) {
593 case lir_word_align: {
594 while (code_offset() % BytesPerWord != 0) {
595 _masm->nop();
596 }
597 break;
598 }
599
600 case lir_nop:
601 assert(op->info() == NULL, "not supported");
602 _masm->nop();
603 break;
604
605 case lir_label:
606 Unimplemented();
607 break;
608
609 case lir_build_frame:
610 build_frame();
611 break;
612
613 case lir_std_entry:
614 // init offsets
615 offsets()->set_value(CodeOffsets::OSR_Entry, _masm->offset());
616 _masm->align(CodeEntryAlignment);
617 if (needs_icache(compilation()->method())) {
618 check_icache();
619 }
620 offsets()->set_value(CodeOffsets::Verified_Entry, _masm->offset());
621 _masm->verified_entry();
622 build_frame();
623 offsets()->set_value(CodeOffsets::Frame_Complete, _masm->offset());
624 break;
625
626 case lir_osr_entry:
627 offsets()->set_value(CodeOffsets::OSR_Entry, _masm->offset());
628 osr_entry();
629 break;
630
631 case lir_24bit_FPU:
632 set_24bit_FPU();
633 break;
634
635 case lir_reset_FPU:
636 reset_FPU();
637 break;
638
639 case lir_breakpoint:
640 breakpoint();
641 break;
642
643 case lir_fpop_raw:
644 fpop();
645 break;
646
647 case lir_membar:
648 membar();
649 break;
650
651 case lir_membar_acquire:
652 membar_acquire();
653 break;
654
655 case lir_membar_release:
656 membar_release();
657 break;
658
659 case lir_membar_loadload:
660 membar_loadload();
661 break;
662
663 case lir_membar_storestore:
664 membar_storestore();
665 break;
666
667 case lir_membar_loadstore:
668 membar_loadstore();
669 break;
670
671 case lir_membar_storeload:
672 membar_storeload();
673 break;
674
675 case lir_get_thread:
676 get_thread(op->result_opr());
677 break;
678
679 default:
680 ShouldNotReachHere();
681 break;
682 }
683 }
684
685
686 void LIR_Assembler::emit_op2(LIR_Op2* op) {
687 switch (op->code()) {
688 case lir_cmp:
689 if (op->info() != NULL) {
690 assert(op->in_opr1()->is_address() || op->in_opr2()->is_address(),
691 "shouldn't be codeemitinfo for non-address operands");
692 add_debug_info_for_null_check_here(op->info()); // exception possible
693 }
694 comp_op(op->condition(), op->in_opr1(), op->in_opr2(), op);
695 break;
696
697 case lir_cmp_l2i:
698 case lir_cmp_fd2i:
699 case lir_ucmp_fd2i:
700 comp_fl2i(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op);
701 break;
702
703 case lir_cmove:
704 cmove(op->condition(), op->in_opr1(), op->in_opr2(), op->result_opr(), op->type());
705 break;
706
707 case lir_shl:
708 case lir_shr:
709 case lir_ushr:
710 if (op->in_opr2()->is_constant()) {
711 shift_op(op->code(), op->in_opr1(), op->in_opr2()->as_constant_ptr()->as_jint(), op->result_opr());
712 } else {
713 shift_op(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op->tmp1_opr());
714 }
715 break;
716
717 case lir_add:
718 case lir_sub:
719 case lir_mul:
720 case lir_mul_strictfp:
721 case lir_div:
722 case lir_div_strictfp:
723 case lir_rem:
724 assert(op->fpu_pop_count() < 2, "");
725 arith_op(
726 op->code(),
727 op->in_opr1(),
728 op->in_opr2(),
729 op->result_opr(),
730 op->info(),
731 op->fpu_pop_count() == 1);
732 break;
733
734 case lir_abs:
735 case lir_sqrt:
736 case lir_sin:
737 case lir_tan:
738 case lir_cos:
739 case lir_log:
740 case lir_log10:
741 case lir_pow:
742 intrinsic_op(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op);
743 break;
744
745 case lir_logic_and:
746 case lir_logic_or:
747 case lir_logic_xor:
748 logic_op(
749 op->code(),
750 op->in_opr1(),
751 op->in_opr2(),
752 op->result_opr());
753 break;
754
755 case lir_throw:
756 throw_op(op->in_opr1(), op->in_opr2(), op->info());
757 break;
758
759 case lir_xadd:
760 case lir_xchg:
761 atomic_op(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op->tmp1_opr());
762 break;
763
764 default:
765 Unimplemented();
766 break;
767 }
768 }
769
770
771 void LIR_Assembler::build_frame() {
772 _masm->build_frame(initial_frame_size_in_bytes(), bang_size_in_bytes());
773 }
774
775
776 void LIR_Assembler::roundfp_op(LIR_Opr src, LIR_Opr tmp, LIR_Opr dest, bool pop_fpu_stack) {
777 assert((src->is_single_fpu() && dest->is_single_stack()) ||
778 (src->is_double_fpu() && dest->is_double_stack()),
779 "round_fp: rounds register -> stack location");
780
781 reg2stack (src, dest, src->type(), pop_fpu_stack);
782 }
783
784
785 void LIR_Assembler::move_op(LIR_Opr src, LIR_Opr dest, BasicType type, LIR_PatchCode patch_code, CodeEmitInfo* info, bool pop_fpu_stack, bool unaligned, bool wide) {
786 if (src->is_register()) {
787 if (dest->is_register()) {
788 assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here");
789 reg2reg(src, dest);
790 } else if (dest->is_stack()) {
791 assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here");
792 reg2stack(src, dest, type, pop_fpu_stack);
793 } else if (dest->is_address()) {
794 reg2mem(src, dest, type, patch_code, info, pop_fpu_stack, wide, unaligned);
795 } else {
796 ShouldNotReachHere();
797 }
798
799 } else if (src->is_stack()) {
800 assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here");
801 if (dest->is_register()) {
802 stack2reg(src, dest, type);
803 } else if (dest->is_stack()) {
804 stack2stack(src, dest, type);
805 } else {
806 ShouldNotReachHere();
807 }
808
809 } else if (src->is_constant()) {
810 if (dest->is_register()) {
811 const2reg(src, dest, patch_code, info); // patching is possible
812 } else if (dest->is_stack()) {
813 assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here");
814 const2stack(src, dest);
815 } else if (dest->is_address()) {
816 assert(patch_code == lir_patch_none, "no patching allowed here");
817 const2mem(src, dest, type, info, wide);
818 } else {
819 ShouldNotReachHere();
820 }
821
822 } else if (src->is_address()) {
823 mem2reg(src, dest, type, patch_code, info, wide, unaligned);
824
825 } else {
826 ShouldNotReachHere();
827 }
828 }
829
830
831 void LIR_Assembler::verify_oop_map(CodeEmitInfo* info) {
832 #ifndef PRODUCT
833 if (VerifyOops) {
834 OopMapStream s(info->oop_map());
835 while (!s.is_done()) {
836 OopMapValue v = s.current();
837 if (v.is_oop()) {
838 VMReg r = v.reg();
839 if (!r->is_stack()) {
840 stringStream st;
841 st.print("bad oop %s at %d", r->as_Register()->name(), _masm->offset());
842 #ifdef SPARC
843 _masm->_verify_oop(r->as_Register(), os::strdup(st.as_string(), mtCompiler), __FILE__, __LINE__);
844 #else
845 _masm->verify_oop(r->as_Register());
846 #endif
847 } else {
848 _masm->verify_stack_oop(r->reg2stack() * VMRegImpl::stack_slot_size);
849 }
850 }
851 check_codespace();
852 CHECK_BAILOUT();
853
854 s.next();
855 }
856 }
857 #endif
858 }