src/cpu/x86/vm/assembler_x86.hpp

*** 502,512 ****
      REX_WRX    = 0x4E,
      REX_WRXB   = 0x4F,
  
      VEX_3bytes = 0xC4,
      VEX_2bytes = 0xC5,
!     EVEX_4bytes = 0x62
    };
  
    enum VexPrefix {
      VEX_B = 0x20,
      VEX_X = 0x40,
--- 502,513 ----
      REX_WRX    = 0x4E,
      REX_WRXB   = 0x4F,
  
      VEX_3bytes = 0xC4,
      VEX_2bytes = 0xC5,
!     EVEX_4bytes = 0x62,
!     Prefix_EMPTY = 0x0
    };
  
    enum VexPrefix {
      VEX_B = 0x20,
      VEX_X = 0x40,
*** 606,615 ****
--- 607,618 ----
  
    int prefix_and_encode(int dst_enc, int src_enc, bool byteinst = false);
    int prefixq_and_encode(int dst_enc, int src_enc);
  
    void prefix(Register reg);
+   void prefix(Register dst, Register src, Prefix p);
+   void prefix(Register dst, Address adr, Prefix p);
    void prefix(Address adr);
    void prefixq(Address adr);
  
    void prefix(Address adr, Register reg,  bool byteinst = false);
    void prefix(Address adr, XMMRegister reg);
*** 1163,1172 ****
--- 1166,1179 ----
    void comiss(XMMRegister dst, XMMRegister src);
  
    // Identify processor type and features
    void cpuid();
  
+   // CRC32C
+   void crc32(Register crc, Register v, int8_t sizeInBytes);
+   void crc32(Register crc, Address adr, int8_t sizeInBytes);
+ 
    // Convert Scalar Double-Precision Floating-Point Value to Scalar Single-Precision Floating-Point Value
    void cvtsd2ss(XMMRegister dst, XMMRegister src);
    void cvtsd2ss(XMMRegister dst, Address src);
  
    // Convert Doubleword Integer to Scalar Double-Precision Floating-Point Value
*** 1762,1771 ****
--- 1769,1779 ----
    void sbbq(Register dst, Register src);
  
    void setb(Condition cc, Register dst);
  
    void shldl(Register dst, Register src);
+   void shldl(Register dst, Register src, int8_t imm8);
  
    void shll(Register dst, int imm8);
    void shll(Register dst);
  
    void shlq(Register dst, int imm8);