1 /*
2 * Copyright (c) 1998, 2015, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "memory/allocation.inline.hpp"
27 #include "opto/ad.hpp"
28 #include "opto/block.hpp"
29 #include "opto/c2compiler.hpp"
30 #include "opto/callnode.hpp"
31 #include "opto/cfgnode.hpp"
32 #include "opto/machnode.hpp"
33 #include "opto/runtime.hpp"
34 #include "opto/chaitin.hpp"
35 #include "runtime/sharedRuntime.hpp"
36
37 // Optimization - Graph Style
38
39 // Check whether val is not-null-decoded compressed oop,
40 // i.e. will grab into the base of the heap if it represents NULL.
41 static bool accesses_heap_base_zone(Node *val) {
42 if (Universe::narrow_oop_base() > 0) { // Implies UseCompressedOops.
43 if (val && val->is_Mach()) {
44 if (val->as_Mach()->ideal_Opcode() == Op_DecodeN) {
45 // This assumes all Decodes with TypePtr::NotNull are matched to nodes that
46 // decode NULL to point to the heap base (Decode_NN).
47 if (val->bottom_type()->is_oopptr()->ptr() == TypePtr::NotNull) {
48 return true;
49 }
50 }
51 // Must recognize load operation with Decode matched in memory operand.
52 // We should not reach here exept for PPC/AIX, as os::zero_page_read_protected()
53 // returns true everywhere else. On PPC, no such memory operands
54 // exist, therefore we did not yet implement a check for such operands.
55 NOT_AIX(Unimplemented());
56 }
57 }
58 return false;
59 }
60
61 static bool needs_explicit_null_check_for_read(Node *val) {
62 // On some OSes (AIX) the page at address 0 is only write protected.
63 // If so, only Store operations will trap.
64 if (os::zero_page_read_protected()) {
65 return false; // Implicit null check will work.
66 }
67 // Also a read accessing the base of a heap-based compressed heap will trap.
68 if (accesses_heap_base_zone(val) && // Hits the base zone page.
69 Universe::narrow_oop_use_implicit_null_checks()) { // Base zone page is protected.
70 return false;
71 }
72
73 return true;
74 }
75
76 //------------------------------implicit_null_check----------------------------
77 // Detect implicit-null-check opportunities. Basically, find NULL checks
78 // with suitable memory ops nearby. Use the memory op to do the NULL check.
79 // I can generate a memory op if there is not one nearby.
80 // The proj is the control projection for the not-null case.
81 // The val is the pointer being checked for nullness or
82 // decodeHeapOop_not_null node if it did not fold into address.
83 void PhaseCFG::implicit_null_check(Block* block, Node *proj, Node *val, int allowed_reasons) {
84 // Assume if null check need for 0 offset then always needed
85 // Intel solaris doesn't support any null checks yet and no
86 // mechanism exists (yet) to set the switches at an os_cpu level
87 if( !ImplicitNullChecks || MacroAssembler::needs_explicit_null_check(0)) return;
88
89 // Make sure the ptr-is-null path appears to be uncommon!
90 float f = block->end()->as_MachIf()->_prob;
91 if( proj->Opcode() == Op_IfTrue ) f = 1.0f - f;
92 if( f > PROB_UNLIKELY_MAG(4) ) return;
93
94 uint bidx = 0; // Capture index of value into memop
95 bool was_store; // Memory op is a store op
96
97 // Get the successor block for if the test ptr is non-null
98 Block* not_null_block; // this one goes with the proj
99 Block* null_block;
100 if (block->get_node(block->number_of_nodes()-1) == proj) {
101 null_block = block->_succs[0];
102 not_null_block = block->_succs[1];
103 } else {
104 assert(block->get_node(block->number_of_nodes()-2) == proj, "proj is one or the other");
105 not_null_block = block->_succs[0];
106 null_block = block->_succs[1];
107 }
108 while (null_block->is_Empty() == Block::empty_with_goto) {
109 null_block = null_block->_succs[0];
110 }
111
112 // Search the exception block for an uncommon trap.
113 // (See Parse::do_if and Parse::do_ifnull for the reason
114 // we need an uncommon trap. Briefly, we need a way to
115 // detect failure of this optimization, as in 6366351.)
116 {
117 bool found_trap = false;
118 for (uint i1 = 0; i1 < null_block->number_of_nodes(); i1++) {
119 Node* nn = null_block->get_node(i1);
120 if (nn->is_MachCall() &&
121 nn->as_MachCall()->entry_point() == SharedRuntime::uncommon_trap_blob()->entry_point()) {
122 const Type* trtype = nn->in(TypeFunc::Parms)->bottom_type();
123 if (trtype->isa_int() && trtype->is_int()->is_con()) {
124 jint tr_con = trtype->is_int()->get_con();
125 Deoptimization::DeoptReason reason = Deoptimization::trap_request_reason(tr_con);
126 Deoptimization::DeoptAction action = Deoptimization::trap_request_action(tr_con);
127 assert((int)reason < (int)BitsPerInt, "recode bit map");
128 if (is_set_nth_bit(allowed_reasons, (int) reason)
129 && action != Deoptimization::Action_none) {
130 // This uncommon trap is sure to recompile, eventually.
131 // When that happens, C->too_many_traps will prevent
132 // this transformation from happening again.
133 found_trap = true;
134 }
135 }
136 break;
137 }
138 }
139 if (!found_trap) {
140 // We did not find an uncommon trap.
141 return;
142 }
143 }
144
145 // Check for decodeHeapOop_not_null node which did not fold into address
146 bool is_decoden = ((intptr_t)val) & 1;
147 val = (Node*)(((intptr_t)val) & ~1);
148
149 assert(!is_decoden || (val->in(0) == NULL) && val->is_Mach() &&
150 (val->as_Mach()->ideal_Opcode() == Op_DecodeN), "sanity");
151
152 // Search the successor block for a load or store who's base value is also
153 // the tested value. There may be several.
154 Node_List *out = new Node_List(Thread::current()->resource_area());
155 MachNode *best = NULL; // Best found so far
156 for (DUIterator i = val->outs(); val->has_out(i); i++) {
157 Node *m = val->out(i);
158 if( !m->is_Mach() ) continue;
159 MachNode *mach = m->as_Mach();
160 was_store = false;
161 int iop = mach->ideal_Opcode();
162 switch( iop ) {
163 case Op_LoadB:
164 case Op_LoadUB:
165 case Op_LoadUS:
166 case Op_LoadD:
167 case Op_LoadF:
168 case Op_LoadI:
169 case Op_LoadL:
170 case Op_LoadP:
171 case Op_LoadN:
172 case Op_LoadS:
173 case Op_LoadKlass:
174 case Op_LoadNKlass:
175 case Op_LoadRange:
176 case Op_LoadD_unaligned:
177 case Op_LoadL_unaligned:
178 assert(mach->in(2) == val, "should be address");
179 break;
180 case Op_StoreB:
181 case Op_StoreC:
182 case Op_StoreCM:
183 case Op_StoreD:
184 case Op_StoreF:
185 case Op_StoreI:
186 case Op_StoreL:
187 case Op_StoreP:
188 case Op_StoreN:
189 case Op_StoreNKlass:
190 was_store = true; // Memory op is a store op
191 // Stores will have their address in slot 2 (memory in slot 1).
192 // If the value being nul-checked is in another slot, it means we
193 // are storing the checked value, which does NOT check the value!
194 if( mach->in(2) != val ) continue;
195 break; // Found a memory op?
196 case Op_StrComp:
197 case Op_StrEquals:
198 case Op_StrIndexOf:
199 case Op_AryEq:
200 case Op_EncodeISOArray:
201 // Not a legit memory op for implicit null check regardless of
202 // embedded loads
203 continue;
204 default: // Also check for embedded loads
205 if( !mach->needs_anti_dependence_check() )
206 continue; // Not an memory op; skip it
207 if( must_clone[iop] ) {
208 // Do not move nodes which produce flags because
209 // RA will try to clone it to place near branch and
210 // it will cause recompilation, see clone_node().
211 continue;
212 }
213 {
214 // Check that value is used in memory address in
215 // instructions with embedded load (CmpP val1,(val2+off)).
216 Node* base;
217 Node* index;
218 const MachOper* oper = mach->memory_inputs(base, index);
219 if (oper == NULL || oper == (MachOper*)-1) {
220 continue; // Not an memory op; skip it
221 }
222 if (val == base ||
223 val == index && val->bottom_type()->isa_narrowoop()) {
224 break; // Found it
225 } else {
226 continue; // Skip it
227 }
228 }
229 break;
230 }
231
232 // On some OSes (AIX) the page at address 0 is only write protected.
233 // If so, only Store operations will trap.
234 // But a read accessing the base of a heap-based compressed heap will trap.
235 if (!was_store && needs_explicit_null_check_for_read(val)) {
236 continue;
237 }
238
239 // check if the offset is not too high for implicit exception
240 {
241 intptr_t offset = 0;
242 const TypePtr *adr_type = NULL; // Do not need this return value here
243 const Node* base = mach->get_base_and_disp(offset, adr_type);
244 if (base == NULL || base == NodeSentinel) {
245 // Narrow oop address doesn't have base, only index
246 if( val->bottom_type()->isa_narrowoop() &&
247 MacroAssembler::needs_explicit_null_check(offset) )
248 continue; // Give up if offset is beyond page size
249 // cannot reason about it; is probably not implicit null exception
250 } else {
251 const TypePtr* tptr;
252 if (UseCompressedOops && (Universe::narrow_oop_shift() == 0 ||
253 Universe::narrow_klass_shift() == 0)) {
254 // 32-bits narrow oop can be the base of address expressions
255 tptr = base->get_ptr_type();
256 } else {
257 // only regular oops are expected here
258 tptr = base->bottom_type()->is_ptr();
259 }
260 // Give up if offset is not a compile-time constant
261 if( offset == Type::OffsetBot || tptr->_offset == Type::OffsetBot )
262 continue;
263 offset += tptr->_offset; // correct if base is offseted
264 if( MacroAssembler::needs_explicit_null_check(offset) )
265 continue; // Give up is reference is beyond 4K page size
266 }
267 }
268
269 // Check ctrl input to see if the null-check dominates the memory op
270 Block *cb = get_block_for_node(mach);
271 cb = cb->_idom; // Always hoist at least 1 block
272 if( !was_store ) { // Stores can be hoisted only one block
273 while( cb->_dom_depth > (block->_dom_depth + 1))
274 cb = cb->_idom; // Hoist loads as far as we want
275 // The non-null-block should dominate the memory op, too. Live
276 // range spilling will insert a spill in the non-null-block if it is
277 // needs to spill the memory op for an implicit null check.
278 if (cb->_dom_depth == (block->_dom_depth + 1)) {
279 if (cb != not_null_block) continue;
280 cb = cb->_idom;
281 }
282 }
283 if( cb != block ) continue;
284
285 // Found a memory user; see if it can be hoisted to check-block
286 uint vidx = 0; // Capture index of value into memop
287 uint j;
288 for( j = mach->req()-1; j > 0; j-- ) {
289 if( mach->in(j) == val ) {
290 vidx = j;
291 // Ignore DecodeN val which could be hoisted to where needed.
292 if( is_decoden ) continue;
293 }
294 // Block of memory-op input
295 Block *inb = get_block_for_node(mach->in(j));
296 Block *b = block; // Start from nul check
297 while( b != inb && b->_dom_depth > inb->_dom_depth )
298 b = b->_idom; // search upwards for input
299 // See if input dominates null check
300 if( b != inb )
301 break;
302 }
303 if( j > 0 )
304 continue;
305 Block *mb = get_block_for_node(mach);
306 // Hoisting stores requires more checks for the anti-dependence case.
307 // Give up hoisting if we have to move the store past any load.
308 if( was_store ) {
309 Block *b = mb; // Start searching here for a local load
310 // mach use (faulting) trying to hoist
311 // n might be blocker to hoisting
312 while( b != block ) {
313 uint k;
314 for( k = 1; k < b->number_of_nodes(); k++ ) {
315 Node *n = b->get_node(k);
316 if( n->needs_anti_dependence_check() &&
317 n->in(LoadNode::Memory) == mach->in(StoreNode::Memory) )
318 break; // Found anti-dependent load
319 }
320 if( k < b->number_of_nodes() )
321 break; // Found anti-dependent load
322 // Make sure control does not do a merge (would have to check allpaths)
323 if( b->num_preds() != 2 ) break;
324 b = get_block_for_node(b->pred(1)); // Move up to predecessor block
325 }
326 if( b != block ) continue;
327 }
328
329 // Make sure this memory op is not already being used for a NullCheck
330 Node *e = mb->end();
331 if( e->is_MachNullCheck() && e->in(1) == mach )
332 continue; // Already being used as a NULL check
333
334 // Found a candidate! Pick one with least dom depth - the highest
335 // in the dom tree should be closest to the null check.
336 if (best == NULL || get_block_for_node(mach)->_dom_depth < get_block_for_node(best)->_dom_depth) {
337 best = mach;
338 bidx = vidx;
339 }
340 }
341 // No candidate!
342 if (best == NULL) {
343 return;
344 }
345
346 // ---- Found an implicit null check
347 extern int implicit_null_checks;
348 implicit_null_checks++;
349
350 if( is_decoden ) {
351 // Check if we need to hoist decodeHeapOop_not_null first.
352 Block *valb = get_block_for_node(val);
353 if( block != valb && block->_dom_depth < valb->_dom_depth ) {
354 // Hoist it up to the end of the test block.
355 valb->find_remove(val);
356 block->add_inst(val);
357 map_node_to_block(val, block);
358 // DecodeN on x86 may kill flags. Check for flag-killing projections
359 // that also need to be hoisted.
360 for (DUIterator_Fast jmax, j = val->fast_outs(jmax); j < jmax; j++) {
361 Node* n = val->fast_out(j);
362 if( n->is_MachProj() ) {
363 get_block_for_node(n)->find_remove(n);
364 block->add_inst(n);
365 map_node_to_block(n, block);
366 }
367 }
368 }
369 }
370 // Hoist the memory candidate up to the end of the test block.
371 Block *old_block = get_block_for_node(best);
372 old_block->find_remove(best);
373 block->add_inst(best);
374 map_node_to_block(best, block);
375
376 // Move the control dependence
377 if (best->in(0) && best->in(0) == old_block->head())
378 best->set_req(0, block->head());
379
380 // Check for flag-killing projections that also need to be hoisted
381 // Should be DU safe because no edge updates.
382 for (DUIterator_Fast jmax, j = best->fast_outs(jmax); j < jmax; j++) {
383 Node* n = best->fast_out(j);
384 if( n->is_MachProj() ) {
385 get_block_for_node(n)->find_remove(n);
386 block->add_inst(n);
387 map_node_to_block(n, block);
388 }
389 }
390
391 // proj==Op_True --> ne test; proj==Op_False --> eq test.
392 // One of two graph shapes got matched:
393 // (IfTrue (If (Bool NE (CmpP ptr NULL))))
394 // (IfFalse (If (Bool EQ (CmpP ptr NULL))))
395 // NULL checks are always branch-if-eq. If we see a IfTrue projection
396 // then we are replacing a 'ne' test with a 'eq' NULL check test.
397 // We need to flip the projections to keep the same semantics.
398 if( proj->Opcode() == Op_IfTrue ) {
399 // Swap order of projections in basic block to swap branch targets
400 Node *tmp1 = block->get_node(block->end_idx()+1);
401 Node *tmp2 = block->get_node(block->end_idx()+2);
402 block->map_node(tmp2, block->end_idx()+1);
403 block->map_node(tmp1, block->end_idx()+2);
404 Node *tmp = new Node(C->top()); // Use not NULL input
405 tmp1->replace_by(tmp);
406 tmp2->replace_by(tmp1);
407 tmp->replace_by(tmp2);
408 tmp->destruct();
409 }
410
411 // Remove the existing null check; use a new implicit null check instead.
412 // Since schedule-local needs precise def-use info, we need to correct
413 // it as well.
414 Node *old_tst = proj->in(0);
415 MachNode *nul_chk = new MachNullCheckNode(old_tst->in(0),best,bidx);
416 block->map_node(nul_chk, block->end_idx());
417 map_node_to_block(nul_chk, block);
418 // Redirect users of old_test to nul_chk
419 for (DUIterator_Last i2min, i2 = old_tst->last_outs(i2min); i2 >= i2min; --i2)
420 old_tst->last_out(i2)->set_req(0, nul_chk);
421 // Clean-up any dead code
422 for (uint i3 = 0; i3 < old_tst->req(); i3++) {
423 Node* in = old_tst->in(i3);
424 old_tst->set_req(i3, NULL);
425 if (in->outcnt() == 0) {
426 // Remove dead input node
427 in->disconnect_inputs(NULL, C);
428 block->find_remove(in);
429 }
430 }
431
432 latency_from_uses(nul_chk);
433 latency_from_uses(best);
434 }
435
436
437 //------------------------------select-----------------------------------------
438 // Select a nice fellow from the worklist to schedule next. If there is only
439 // one choice, then use it. Projections take top priority for correctness
440 // reasons - if I see a projection, then it is next. There are a number of
441 // other special cases, for instructions that consume condition codes, et al.
442 // These are chosen immediately. Some instructions are required to immediately
443 // precede the last instruction in the block, and these are taken last. Of the
444 // remaining cases (most), choose the instruction with the greatest latency
445 // (that is, the most number of pseudo-cycles required to the end of the
446 // routine). If there is a tie, choose the instruction with the most inputs.
447 Node* PhaseCFG::select(
448 Block* block,
449 Node_List &worklist,
450 GrowableArray<int> &ready_cnt,
451 VectorSet &next_call,
452 uint sched_slot,
453 intptr_t* recalc_pressure_nodes) {
454
455 // If only a single entry on the stack, use it
456 uint cnt = worklist.size();
457 if (cnt == 1) {
458 Node *n = worklist[0];
459 worklist.map(0,worklist.pop());
460 return n;
461 }
462
463 uint choice = 0; // Bigger is most important
464 uint latency = 0; // Bigger is scheduled first
465 uint score = 0; // Bigger is better
466 int idx = -1; // Index in worklist
467 int cand_cnt = 0; // Candidate count
468
469 for( uint i=0; i<cnt; i++ ) { // Inspect entire worklist
470 // Order in worklist is used to break ties.
471 // See caller for how this is used to delay scheduling
472 // of induction variable increments to after the other
473 // uses of the phi are scheduled.
474 Node *n = worklist[i]; // Get Node on worklist
475
476 int iop = n->is_Mach() ? n->as_Mach()->ideal_Opcode() : 0;
477 if( n->is_Proj() || // Projections always win
478 n->Opcode()== Op_Con || // So does constant 'Top'
479 iop == Op_CreateEx || // Create-exception must start block
480 iop == Op_CheckCastPP
481 ) {
482 worklist.map(i,worklist.pop());
483 return n;
484 }
485
486 // Final call in a block must be adjacent to 'catch'
487 Node *e = block->end();
488 if( e->is_Catch() && e->in(0)->in(0) == n )
489 continue;
490
491 // Memory op for an implicit null check has to be at the end of the block
492 if( e->is_MachNullCheck() && e->in(1) == n )
493 continue;
494
495 // Schedule IV increment last.
496 if (e->is_Mach() && e->as_Mach()->ideal_Opcode() == Op_CountedLoopEnd &&
497 e->in(1)->in(1) == n && n->is_iteratively_computed())
498 continue;
499
500 uint n_choice = 2;
501
502 // See if this instruction is consumed by a branch. If so, then (as the
503 // branch is the last instruction in the basic block) force it to the
504 // end of the basic block
505 if ( must_clone[iop] ) {
506 // See if any use is a branch
507 bool found_machif = false;
508
509 for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) {
510 Node* use = n->fast_out(j);
511
512 // The use is a conditional branch, make them adjacent
513 if (use->is_MachIf() && get_block_for_node(use) == block) {
514 found_machif = true;
515 break;
516 }
517
518 // More than this instruction pending for successor to be ready,
519 // don't choose this if other opportunities are ready
520 if (ready_cnt.at(use->_idx) > 1)
521 n_choice = 1;
522 }
523
524 // loop terminated, prefer not to use this instruction
525 if (found_machif)
526 continue;
527 }
528
529 // See if this has a predecessor that is "must_clone", i.e. sets the
530 // condition code. If so, choose this first
531 for (uint j = 0; j < n->req() ; j++) {
532 Node *inn = n->in(j);
533 if (inn) {
534 if (inn->is_Mach() && must_clone[inn->as_Mach()->ideal_Opcode()] ) {
535 n_choice = 3;
536 break;
537 }
538 }
539 }
540
541 // MachTemps should be scheduled last so they are near their uses
542 if (n->is_MachTemp()) {
543 n_choice = 1;
544 }
545
546 uint n_latency = get_latency_for_node(n);
547 uint n_score = n->req(); // Many inputs get high score to break ties
548
549 if (OptoRegScheduling) {
550 if (recalc_pressure_nodes[n->_idx] == 0x7fff7fff) {
551 _regalloc->_scratch_int_pressure.init(_regalloc->_sched_int_pressure.high_pressure_limit());
552 _regalloc->_scratch_float_pressure.init(_regalloc->_sched_float_pressure.high_pressure_limit());
553 // simulate the notion that we just picked this node to schedule
554 n->add_flag(Node::Flag_is_scheduled);
555 // now caculate its effect upon the graph if we did
556 adjust_register_pressure(n, block, recalc_pressure_nodes, false);
557 // return its state for finalize in case somebody else wins
558 n->remove_flag(Node::Flag_is_scheduled);
559 // now save the two final pressure components of register pressure, limiting pressure calcs to short size
560 short int_pressure = (short)_regalloc->_scratch_int_pressure.current_pressure();
561 short float_pressure = (short)_regalloc->_scratch_float_pressure.current_pressure();
562 recalc_pressure_nodes[n->_idx] = int_pressure;
563 recalc_pressure_nodes[n->_idx] |= (float_pressure << 16);
564 }
565
566 if (_scheduling_for_pressure) {
567 latency = n_latency;
568 if (n_choice != 3) {
569 // Now evaluate each register pressure component based on threshold in the score.
570 // In general the defining register type will dominate the score, ergo we will not see register pressure grow on both banks
571 // on a single instruction, but we might see it shrink on both banks.
572 if (_regalloc->_sched_int_pressure.current_pressure() > _regalloc->_sched_int_pressure.high_pressure_limit()) {
573 short int_pressure = (short)recalc_pressure_nodes[n->_idx];
574 n_score = (int_pressure < 0) ? ((score + n_score) - int_pressure) : (int_pressure > 0) ? 1 : n_score;
575 }
576 if (_regalloc->_sched_float_pressure.current_pressure() > _regalloc->_sched_float_pressure.high_pressure_limit()) {
577 short float_pressure = (short)(recalc_pressure_nodes[n->_idx] >> 16);
578 n_score = (float_pressure < 0) ? ((score + n_score) - float_pressure) : (float_pressure > 0) ? 1 : n_score;
579 }
580 } else {
581 // make sure we choose these candidates
582 score = 0;
583 }
584 }
585 }
586
587 // Keep best latency found
588 cand_cnt++;
589 if (choice < n_choice ||
590 (choice == n_choice &&
591 ((StressLCM && Compile::randomized_select(cand_cnt)) ||
592 (!StressLCM &&
593 (latency < n_latency ||
594 (latency == n_latency &&
595 (score < n_score))))))) {
596 choice = n_choice;
597 latency = n_latency;
598 score = n_score;
599 idx = i; // Also keep index in worklist
600 }
601 } // End of for all ready nodes in worklist
602
603 assert(idx >= 0, "index should be set");
604 Node *n = worklist[(uint)idx]; // Get the winner
605
606 worklist.map((uint)idx, worklist.pop()); // Compress worklist
607 return n;
608 }
609
610 //-------------------------adjust_register_pressure----------------------------
611 void PhaseCFG::adjust_register_pressure(Node* n, Block* block, intptr_t* recalc_pressure_nodes, bool finalize_mode) {
612 PhaseLive* liveinfo = _regalloc->get_live();
613 IndexSet* liveout = liveinfo->live(block);
614 // first adjust the register pressure for the sources
615 for (uint i = 1; i < n->req(); i++) {
616 bool lrg_ends = false;
617 Node *src_n = n->in(i);
618 if (src_n == NULL) continue;
619 if (!src_n->is_Mach()) continue;
620 uint src = _regalloc->_lrg_map.find(src_n);
621 if (src == 0) continue;
622 LRG& lrg_src = _regalloc->lrgs(src);
623 // detect if the live range ends or not
624 if (liveout->member(src) == false) {
625 lrg_ends = true;
626 for (DUIterator_Fast jmax, j = src_n->fast_outs(jmax); j < jmax; j++) {
627 Node* m = src_n->fast_out(j); // Get user
628 if (m == n) continue;
629 if (!m->is_Mach()) continue;
630 MachNode *mach = m->as_Mach();
631 bool src_matches = false;
632 int iop = mach->ideal_Opcode();
633
634 switch (iop) {
635 case Op_StoreB:
636 case Op_StoreC:
637 case Op_StoreCM:
638 case Op_StoreD:
639 case Op_StoreF:
640 case Op_StoreI:
641 case Op_StoreL:
642 case Op_StoreP:
643 case Op_StoreN:
644 case Op_StoreVector:
645 case Op_StoreNKlass:
646 for (uint k = 1; k < m->req(); k++) {
647 Node *in = m->in(k);
648 if (in == src_n) {
649 src_matches = true;
650 break;
651 }
652 }
653 break;
654
655 default:
656 src_matches = true;
657 break;
658 }
659
660 // If we have a store as our use, ignore the non source operands
661 if (src_matches == false) continue;
662
663 // Mark every unscheduled use which is not n with a recalculation
664 if ((get_block_for_node(m) == block) && (!m->is_scheduled())) {
665 if (finalize_mode && !m->is_Phi()) {
666 recalc_pressure_nodes[m->_idx] = 0x7fff7fff;
667 }
668 lrg_ends = false;
669 }
670 }
671 }
672 // if none, this live range ends and we can adjust register pressure
673 if (lrg_ends) {
674 if (finalize_mode) {
675 _regalloc->lower_pressure(block, 0, lrg_src, NULL, _regalloc->_sched_int_pressure, _regalloc->_sched_float_pressure);
676 } else {
677 _regalloc->lower_pressure(block, 0, lrg_src, NULL, _regalloc->_scratch_int_pressure, _regalloc->_scratch_float_pressure);
678 }
679 }
680 }
681
682 // now add the register pressure from the dest and evaluate which heuristic we should use:
683 // 1.) The default, latency scheduling
684 // 2.) Register pressure scheduling based on the high pressure limit threshold for int or float register stacks
685 uint dst = _regalloc->_lrg_map.find(n);
686 if (dst != 0) {
687 LRG& lrg_dst = _regalloc->lrgs(dst);
688 if (finalize_mode) {
689 _regalloc->raise_pressure(block, lrg_dst, _regalloc->_sched_int_pressure, _regalloc->_sched_float_pressure);
690 // check to see if we fall over the register pressure cliff here
691 if (_regalloc->_sched_int_pressure.current_pressure() > _regalloc->_sched_int_pressure.high_pressure_limit()) {
692 _scheduling_for_pressure = true;
693 } else if (_regalloc->_sched_float_pressure.current_pressure() > _regalloc->_sched_float_pressure.high_pressure_limit()) {
694 _scheduling_for_pressure = true;
695 } else {
696 // restore latency scheduling mode
697 _scheduling_for_pressure = false;
698 }
699 } else {
700 _regalloc->raise_pressure(block, lrg_dst, _regalloc->_scratch_int_pressure, _regalloc->_scratch_float_pressure);
701 }
702 }
703 }
704
705 //------------------------------set_next_call----------------------------------
706 void PhaseCFG::set_next_call(Block* block, Node* n, VectorSet& next_call) {
707 if( next_call.test_set(n->_idx) ) return;
708 for( uint i=0; i<n->len(); i++ ) {
709 Node *m = n->in(i);
710 if( !m ) continue; // must see all nodes in block that precede call
711 if (get_block_for_node(m) == block) {
712 set_next_call(block, m, next_call);
713 }
714 }
715 }
716
717 //------------------------------needed_for_next_call---------------------------
718 // Set the flag 'next_call' for each Node that is needed for the next call to
719 // be scheduled. This flag lets me bias scheduling so Nodes needed for the
720 // next subroutine call get priority - basically it moves things NOT needed
721 // for the next call till after the call. This prevents me from trying to
722 // carry lots of stuff live across a call.
723 void PhaseCFG::needed_for_next_call(Block* block, Node* this_call, VectorSet& next_call) {
724 // Find the next control-defining Node in this block
725 Node* call = NULL;
726 for (DUIterator_Fast imax, i = this_call->fast_outs(imax); i < imax; i++) {
727 Node* m = this_call->fast_out(i);
728 if (get_block_for_node(m) == block && // Local-block user
729 m != this_call && // Not self-start node
730 m->is_MachCall()) {
731 call = m;
732 break;
733 }
734 }
735 if (call == NULL) return; // No next call (e.g., block end is near)
736 // Set next-call for all inputs to this call
737 set_next_call(block, call, next_call);
738 }
739
740 //------------------------------add_call_kills-------------------------------------
741 // helper function that adds caller save registers to MachProjNode
742 static void add_call_kills(MachProjNode *proj, RegMask& regs, const char* save_policy, bool exclude_soe) {
743 // Fill in the kill mask for the call
744 for( OptoReg::Name r = OptoReg::Name(0); r < _last_Mach_Reg; r=OptoReg::add(r,1) ) {
745 if( !regs.Member(r) ) { // Not already defined by the call
746 // Save-on-call register?
747 if ((save_policy[r] == 'C') ||
748 (save_policy[r] == 'A') ||
749 ((save_policy[r] == 'E') && exclude_soe)) {
750 proj->_rout.Insert(r);
751 }
752 }
753 }
754 }
755
756
757 //------------------------------sched_call-------------------------------------
758 uint PhaseCFG::sched_call(Block* block, uint node_cnt, Node_List& worklist, GrowableArray<int>& ready_cnt, MachCallNode* mcall, VectorSet& next_call) {
759 RegMask regs;
760
761 // Schedule all the users of the call right now. All the users are
762 // projection Nodes, so they must be scheduled next to the call.
763 // Collect all the defined registers.
764 for (DUIterator_Fast imax, i = mcall->fast_outs(imax); i < imax; i++) {
765 Node* n = mcall->fast_out(i);
766 assert( n->is_MachProj(), "" );
767 int n_cnt = ready_cnt.at(n->_idx)-1;
768 ready_cnt.at_put(n->_idx, n_cnt);
769 assert( n_cnt == 0, "" );
770 // Schedule next to call
771 block->map_node(n, node_cnt++);
772 // Collect defined registers
773 regs.OR(n->out_RegMask());
774 // Check for scheduling the next control-definer
775 if( n->bottom_type() == Type::CONTROL )
776 // Warm up next pile of heuristic bits
777 needed_for_next_call(block, n, next_call);
778
779 // Children of projections are now all ready
780 for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) {
781 Node* m = n->fast_out(j); // Get user
782 if(get_block_for_node(m) != block) {
783 continue;
784 }
785 if( m->is_Phi() ) continue;
786 int m_cnt = ready_cnt.at(m->_idx) - 1;
787 ready_cnt.at_put(m->_idx, m_cnt);
788 if( m_cnt == 0 )
789 worklist.push(m);
790 }
791
792 }
793
794 // Act as if the call defines the Frame Pointer.
795 // Certainly the FP is alive and well after the call.
796 regs.Insert(_matcher.c_frame_pointer());
797
798 // Set all registers killed and not already defined by the call.
799 uint r_cnt = mcall->tf()->range()->cnt();
800 int op = mcall->ideal_Opcode();
801 MachProjNode *proj = new MachProjNode( mcall, r_cnt+1, RegMask::Empty, MachProjNode::fat_proj );
802 map_node_to_block(proj, block);
803 block->insert_node(proj, node_cnt++);
804
805 // Select the right register save policy.
806 const char * save_policy;
807 switch (op) {
808 case Op_CallRuntime:
809 case Op_CallLeaf:
810 case Op_CallLeafNoFP:
811 // Calling C code so use C calling convention
812 save_policy = _matcher._c_reg_save_policy;
813 break;
814
815 case Op_CallStaticJava:
816 case Op_CallDynamicJava:
817 // Calling Java code so use Java calling convention
818 save_policy = _matcher._register_save_policy;
819 break;
820
821 default:
822 ShouldNotReachHere();
823 }
824
825 // When using CallRuntime mark SOE registers as killed by the call
826 // so values that could show up in the RegisterMap aren't live in a
827 // callee saved register since the register wouldn't know where to
828 // find them. CallLeaf and CallLeafNoFP are ok because they can't
829 // have debug info on them. Strictly speaking this only needs to be
830 // done for oops since idealreg2debugmask takes care of debug info
831 // references but there no way to handle oops differently than other
832 // pointers as far as the kill mask goes.
833 bool exclude_soe = op == Op_CallRuntime;
834
835 // If the call is a MethodHandle invoke, we need to exclude the
836 // register which is used to save the SP value over MH invokes from
837 // the mask. Otherwise this register could be used for
838 // deoptimization information.
839 if (op == Op_CallStaticJava) {
840 MachCallStaticJavaNode* mcallstaticjava = (MachCallStaticJavaNode*) mcall;
841 if (mcallstaticjava->_method_handle_invoke)
842 proj->_rout.OR(Matcher::method_handle_invoke_SP_save_mask());
843 }
844
845 add_call_kills(proj, regs, save_policy, exclude_soe);
846
847 return node_cnt;
848 }
849
850
851 //------------------------------schedule_local---------------------------------
852 // Topological sort within a block. Someday become a real scheduler.
853 bool PhaseCFG::schedule_local(Block* block, GrowableArray<int>& ready_cnt, VectorSet& next_call, intptr_t *recalc_pressure_nodes) {
854 // Already "sorted" are the block start Node (as the first entry), and
855 // the block-ending Node and any trailing control projections. We leave
856 // these alone. PhiNodes and ParmNodes are made to follow the block start
857 // Node. Everything else gets topo-sorted.
858
859 #ifndef PRODUCT
860 if (trace_opto_pipelining()) {
861 tty->print_cr("# --- schedule_local B%d, before: ---", block->_pre_order);
862 for (uint i = 0;i < block->number_of_nodes(); i++) {
863 tty->print("# ");
864 block->get_node(i)->fast_dump();
865 }
866 tty->print_cr("#");
867 }
868 #endif
869
870 // RootNode is already sorted
871 if (block->number_of_nodes() == 1) {
872 return true;
873 }
874
875 // We track the uses of local definitions as input dependences so that
876 // we know when a given instruction is avialable to be scheduled.
877 uint i;
878 if (OptoRegScheduling) {
879 for (i = 1; i < block->number_of_nodes(); i++) { // setup nodes for pressure calc
880 Node *n = block->get_node(i);
881 n->remove_flag(Node::Flag_is_scheduled);
882 if (!n->is_Phi()) {
883 recalc_pressure_nodes[n->_idx] = 0x7fff7fff;
884 }
885 }
886 }
887
888 // Move PhiNodes and ParmNodes from 1 to cnt up to the start
889 uint node_cnt = block->end_idx();
890 uint phi_cnt = 1;
891 for( i = 1; i<node_cnt; i++ ) { // Scan for Phi
892 Node *n = block->get_node(i);
893 if( n->is_Phi() || // Found a PhiNode or ParmNode
894 (n->is_Proj() && n->in(0) == block->head()) ) {
895 // Move guy at 'phi_cnt' to the end; makes a hole at phi_cnt
896 block->map_node(block->get_node(phi_cnt), i);
897 block->map_node(n, phi_cnt++); // swap Phi/Parm up front
898 if (OptoRegScheduling) {
899 // mark n as scheduled
900 n->add_flag(Node::Flag_is_scheduled);
901 }
902 } else { // All others
903 // Count block-local inputs to 'n'
904 uint cnt = n->len(); // Input count
905 uint local = 0;
906 for( uint j=0; j<cnt; j++ ) {
907 Node *m = n->in(j);
908 if( m && get_block_for_node(m) == block && !m->is_top() )
909 local++; // One more block-local input
910 }
911 ready_cnt.at_put(n->_idx, local); // Count em up
912
913 #ifdef ASSERT
914 if( UseConcMarkSweepGC || UseG1GC ) {
915 if( n->is_Mach() && n->as_Mach()->ideal_Opcode() == Op_StoreCM ) {
916 // Check the precedence edges
917 for (uint prec = n->req(); prec < n->len(); prec++) {
918 Node* oop_store = n->in(prec);
919 if (oop_store != NULL) {
920 assert(get_block_for_node(oop_store)->_dom_depth <= block->_dom_depth, "oop_store must dominate card-mark");
921 }
922 }
923 }
924 }
925 #endif
926
927 // A few node types require changing a required edge to a precedence edge
928 // before allocation.
929 if( n->is_Mach() && n->req() > TypeFunc::Parms &&
930 (n->as_Mach()->ideal_Opcode() == Op_MemBarAcquire ||
931 n->as_Mach()->ideal_Opcode() == Op_MemBarVolatile) ) {
932 // MemBarAcquire could be created without Precedent edge.
933 // del_req() replaces the specified edge with the last input edge
934 // and then removes the last edge. If the specified edge > number of
935 // edges the last edge will be moved outside of the input edges array
936 // and the edge will be lost. This is why this code should be
937 // executed only when Precedent (== TypeFunc::Parms) edge is present.
938 Node *x = n->in(TypeFunc::Parms);
939 n->del_req(TypeFunc::Parms);
940 n->add_prec(x);
941 }
942 }
943 }
944 for(uint i2=i; i2< block->number_of_nodes(); i2++ ) // Trailing guys get zapped count
945 ready_cnt.at_put(block->get_node(i2)->_idx, 0);
946
947 // All the prescheduled guys do not hold back internal nodes
948 uint i3;
949 for (i3 = 0; i3 < phi_cnt; i3++) { // For all pre-scheduled
950 Node *n = block->get_node(i3); // Get pre-scheduled
951 for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) {
952 Node* m = n->fast_out(j);
953 if (get_block_for_node(m) == block) { // Local-block user
954 int m_cnt = ready_cnt.at(m->_idx)-1;
955 if (OptoRegScheduling) {
956 // mark m as scheduled
957 if (m_cnt < 0) {
958 m->add_flag(Node::Flag_is_scheduled);
959 }
960 }
961 ready_cnt.at_put(m->_idx, m_cnt); // Fix ready count
962 }
963 }
964 }
965
966 Node_List delay;
967 // Make a worklist
968 Node_List worklist;
969 for(uint i4=i3; i4<node_cnt; i4++ ) { // Put ready guys on worklist
970 Node *m = block->get_node(i4);
971 if( !ready_cnt.at(m->_idx) ) { // Zero ready count?
972 if (m->is_iteratively_computed()) {
973 // Push induction variable increments last to allow other uses
974 // of the phi to be scheduled first. The select() method breaks
975 // ties in scheduling by worklist order.
976 delay.push(m);
977 } else if (m->is_Mach() && m->as_Mach()->ideal_Opcode() == Op_CreateEx) {
978 // Force the CreateEx to the top of the list so it's processed
979 // first and ends up at the start of the block.
980 worklist.insert(0, m);
981 } else {
982 worklist.push(m); // Then on to worklist!
983 }
984 }
985 }
986 while (delay.size()) {
987 Node* d = delay.pop();
988 worklist.push(d);
989 }
990
991 if (OptoRegScheduling) {
992 // To stage register pressure calculations we need to examine the live set variables
993 // breaking them up by register class to compartmentalize the calculations.
994 uint float_pressure = FLOATPRESSURE;
995 #ifdef _LP64
996 if (UseAVX > 2) {
997 float_pressure *= 2;
998 }
999 #endif
1000 _regalloc->_sched_int_pressure.init(INTPRESSURE);
1001 _regalloc->_sched_float_pressure.init(float_pressure);
1002 _regalloc->_scratch_int_pressure.init(INTPRESSURE);
1003 _regalloc->_scratch_float_pressure.init(float_pressure);
1004
1005 _regalloc->compute_entry_block_pressure(block);
1006 }
1007
1008 // Warm up the 'next_call' heuristic bits
1009 needed_for_next_call(block, block->head(), next_call);
1010
1011 #ifndef PRODUCT
1012 if (trace_opto_pipelining()) {
1013 for (uint j=0; j< block->number_of_nodes(); j++) {
1014 Node *n = block->get_node(j);
1015 int idx = n->_idx;
1016 tty->print("# ready cnt:%3d ", ready_cnt.at(idx));
1017 tty->print("latency:%3d ", get_latency_for_node(n));
1018 tty->print("%4d: %s\n", idx, n->Name());
1019 }
1020 }
1021 #endif
1022
1023 uint max_idx = (uint)ready_cnt.length();
1024 // Pull from worklist and schedule
1025 while( worklist.size() ) { // Worklist is not ready
1026
1027 #ifndef PRODUCT
1028 if (trace_opto_pipelining()) {
1029 tty->print("# ready list:");
1030 for( uint i=0; i<worklist.size(); i++ ) { // Inspect entire worklist
1031 Node *n = worklist[i]; // Get Node on worklist
1032 tty->print(" %d", n->_idx);
1033 }
1034 tty->cr();
1035 }
1036 #endif
1037
1038 // Select and pop a ready guy from worklist
1039 Node* n = select(block, worklist, ready_cnt, next_call, phi_cnt, recalc_pressure_nodes);
1040 block->map_node(n, phi_cnt++); // Schedule him next
1041
1042 if (OptoRegScheduling) {
1043 n->add_flag(Node::Flag_is_scheduled);
1044
1045 // Now adjust the resister pressure with the node we selected
1046 if (!n->is_Phi()) {
1047 adjust_register_pressure(n, block, recalc_pressure_nodes, true);
1048 }
1049 }
1050
1051 #ifndef PRODUCT
1052 if (trace_opto_pipelining()) {
1053 tty->print("# select %d: %s", n->_idx, n->Name());
1054 tty->print(", latency:%d", get_latency_for_node(n));
1055 n->dump();
1056 if (Verbose) {
1057 tty->print("# ready list:");
1058 for( uint i=0; i<worklist.size(); i++ ) { // Inspect entire worklist
1059 Node *n = worklist[i]; // Get Node on worklist
1060 tty->print(" %d", n->_idx);
1061 }
1062 tty->cr();
1063 }
1064 }
1065
1066 #endif
1067 if( n->is_MachCall() ) {
1068 MachCallNode *mcall = n->as_MachCall();
1069 phi_cnt = sched_call(block, phi_cnt, worklist, ready_cnt, mcall, next_call);
1070 continue;
1071 }
1072
1073 if (n->is_Mach() && n->as_Mach()->has_call()) {
1074 RegMask regs;
1075 regs.Insert(_matcher.c_frame_pointer());
1076 regs.OR(n->out_RegMask());
1077
1078 MachProjNode *proj = new MachProjNode( n, 1, RegMask::Empty, MachProjNode::fat_proj );
1079 map_node_to_block(proj, block);
1080 block->insert_node(proj, phi_cnt++);
1081
1082 add_call_kills(proj, regs, _matcher._c_reg_save_policy, false);
1083 }
1084
1085 // Children are now all ready
1086 for (DUIterator_Fast i5max, i5 = n->fast_outs(i5max); i5 < i5max; i5++) {
1087 Node* m = n->fast_out(i5); // Get user
1088 if (get_block_for_node(m) != block) {
1089 continue;
1090 }
1091 if( m->is_Phi() ) continue;
1092 if (m->_idx >= max_idx) { // new node, skip it
1093 assert(m->is_MachProj() && n->is_Mach() && n->as_Mach()->has_call(), "unexpected node types");
1094 continue;
1095 }
1096 int m_cnt = ready_cnt.at(m->_idx) - 1;
1097 ready_cnt.at_put(m->_idx, m_cnt);
1098 if( m_cnt == 0 )
1099 worklist.push(m);
1100 }
1101 }
1102
1103 if( phi_cnt != block->end_idx() ) {
1104 // did not schedule all. Retry, Bailout, or Die
1105 if (C->subsume_loads() == true && !C->failing()) {
1106 // Retry with subsume_loads == false
1107 // If this is the first failure, the sentinel string will "stick"
1108 // to the Compile object, and the C2Compiler will see it and retry.
1109 C->record_failure(C2Compiler::retry_no_subsuming_loads());
1110 }
1111 // assert( phi_cnt == end_idx(), "did not schedule all" );
1112 return false;
1113 }
1114
1115 if (OptoRegScheduling) {
1116 _regalloc->compute_exit_block_pressure(block);
1117 block->_reg_pressure = _regalloc->_sched_int_pressure.final_pressure();
1118 block->_freg_pressure = _regalloc->_sched_float_pressure.final_pressure();
1119 }
1120
1121 #ifndef PRODUCT
1122 if (trace_opto_pipelining()) {
1123 tty->print_cr("#");
1124 tty->print_cr("# after schedule_local");
1125 for (uint i = 0;i < block->number_of_nodes();i++) {
1126 tty->print("# ");
1127 block->get_node(i)->fast_dump();
1128 }
1129 tty->print_cr("# ");
1130
1131 if (OptoRegScheduling) {
1132 tty->print_cr("# pressure info : %d", block->_pre_order);
1133 _regalloc->print_pressure_info(_regalloc->_sched_int_pressure, "int register info");
1134 _regalloc->print_pressure_info(_regalloc->_sched_float_pressure, "float register info");
1135 }
1136 tty->cr();
1137 }
1138 #endif
1139
1140 return true;
1141 }
1142
1143 //--------------------------catch_cleanup_fix_all_inputs-----------------------
1144 static void catch_cleanup_fix_all_inputs(Node *use, Node *old_def, Node *new_def) {
1145 for (uint l = 0; l < use->len(); l++) {
1146 if (use->in(l) == old_def) {
1147 if (l < use->req()) {
1148 use->set_req(l, new_def);
1149 } else {
1150 use->rm_prec(l);
1151 use->add_prec(new_def);
1152 l--;
1153 }
1154 }
1155 }
1156 }
1157
1158 //------------------------------catch_cleanup_find_cloned_def------------------
1159 Node* PhaseCFG::catch_cleanup_find_cloned_def(Block *use_blk, Node *def, Block *def_blk, int n_clone_idx) {
1160 assert( use_blk != def_blk, "Inter-block cleanup only");
1161
1162 // The use is some block below the Catch. Find and return the clone of the def
1163 // that dominates the use. If there is no clone in a dominating block, then
1164 // create a phi for the def in a dominating block.
1165
1166 // Find which successor block dominates this use. The successor
1167 // blocks must all be single-entry (from the Catch only; I will have
1168 // split blocks to make this so), hence they all dominate.
1169 while( use_blk->_dom_depth > def_blk->_dom_depth+1 )
1170 use_blk = use_blk->_idom;
1171
1172 // Find the successor
1173 Node *fixup = NULL;
1174
1175 uint j;
1176 for( j = 0; j < def_blk->_num_succs; j++ )
1177 if( use_blk == def_blk->_succs[j] )
1178 break;
1179
1180 if( j == def_blk->_num_succs ) {
1181 // Block at same level in dom-tree is not a successor. It needs a
1182 // PhiNode, the PhiNode uses from the def and IT's uses need fixup.
1183 Node_Array inputs = new Node_List(Thread::current()->resource_area());
1184 for(uint k = 1; k < use_blk->num_preds(); k++) {
1185 Block* block = get_block_for_node(use_blk->pred(k));
1186 inputs.map(k, catch_cleanup_find_cloned_def(block, def, def_blk, n_clone_idx));
1187 }
1188
1189 // Check to see if the use_blk already has an identical phi inserted.
1190 // If it exists, it will be at the first position since all uses of a
1191 // def are processed together.
1192 Node *phi = use_blk->get_node(1);
1193 if( phi->is_Phi() ) {
1194 fixup = phi;
1195 for (uint k = 1; k < use_blk->num_preds(); k++) {
1196 if (phi->in(k) != inputs[k]) {
1197 // Not a match
1198 fixup = NULL;
1199 break;
1200 }
1201 }
1202 }
1203
1204 // If an existing PhiNode was not found, make a new one.
1205 if (fixup == NULL) {
1206 Node *new_phi = PhiNode::make(use_blk->head(), def);
1207 use_blk->insert_node(new_phi, 1);
1208 map_node_to_block(new_phi, use_blk);
1209 for (uint k = 1; k < use_blk->num_preds(); k++) {
1210 new_phi->set_req(k, inputs[k]);
1211 }
1212 fixup = new_phi;
1213 }
1214
1215 } else {
1216 // Found the use just below the Catch. Make it use the clone.
1217 fixup = use_blk->get_node(n_clone_idx);
1218 }
1219
1220 return fixup;
1221 }
1222
1223 //--------------------------catch_cleanup_intra_block--------------------------
1224 // Fix all input edges in use that reference "def". The use is in the same
1225 // block as the def and both have been cloned in each successor block.
1226 static void catch_cleanup_intra_block(Node *use, Node *def, Block *blk, int beg, int n_clone_idx) {
1227
1228 // Both the use and def have been cloned. For each successor block,
1229 // get the clone of the use, and make its input the clone of the def
1230 // found in that block.
1231
1232 uint use_idx = blk->find_node(use);
1233 uint offset_idx = use_idx - beg;
1234 for( uint k = 0; k < blk->_num_succs; k++ ) {
1235 // Get clone in each successor block
1236 Block *sb = blk->_succs[k];
1237 Node *clone = sb->get_node(offset_idx+1);
1238 assert( clone->Opcode() == use->Opcode(), "" );
1239
1240 // Make use-clone reference the def-clone
1241 catch_cleanup_fix_all_inputs(clone, def, sb->get_node(n_clone_idx));
1242 }
1243 }
1244
1245 //------------------------------catch_cleanup_inter_block---------------------
1246 // Fix all input edges in use that reference "def". The use is in a different
1247 // block than the def.
1248 void PhaseCFG::catch_cleanup_inter_block(Node *use, Block *use_blk, Node *def, Block *def_blk, int n_clone_idx) {
1249 if( !use_blk ) return; // Can happen if the use is a precedence edge
1250
1251 Node *new_def = catch_cleanup_find_cloned_def(use_blk, def, def_blk, n_clone_idx);
1252 catch_cleanup_fix_all_inputs(use, def, new_def);
1253 }
1254
1255 //------------------------------call_catch_cleanup-----------------------------
1256 // If we inserted any instructions between a Call and his CatchNode,
1257 // clone the instructions on all paths below the Catch.
1258 void PhaseCFG::call_catch_cleanup(Block* block) {
1259
1260 // End of region to clone
1261 uint end = block->end_idx();
1262 if( !block->get_node(end)->is_Catch() ) return;
1263 // Start of region to clone
1264 uint beg = end;
1265 while(!block->get_node(beg-1)->is_MachProj() ||
1266 !block->get_node(beg-1)->in(0)->is_MachCall() ) {
1267 beg--;
1268 assert(beg > 0,"Catch cleanup walking beyond block boundary");
1269 }
1270 // Range of inserted instructions is [beg, end)
1271 if( beg == end ) return;
1272
1273 // Clone along all Catch output paths. Clone area between the 'beg' and
1274 // 'end' indices.
1275 for( uint i = 0; i < block->_num_succs; i++ ) {
1276 Block *sb = block->_succs[i];
1277 // Clone the entire area; ignoring the edge fixup for now.
1278 for( uint j = end; j > beg; j-- ) {
1279 // It is safe here to clone a node with anti_dependence
1280 // since clones dominate on each path.
1281 Node *clone = block->get_node(j-1)->clone();
1282 sb->insert_node(clone, 1);
1283 map_node_to_block(clone, sb);
1284 }
1285 }
1286
1287
1288 // Fixup edges. Check the def-use info per cloned Node
1289 for(uint i2 = beg; i2 < end; i2++ ) {
1290 uint n_clone_idx = i2-beg+1; // Index of clone of n in each successor block
1291 Node *n = block->get_node(i2); // Node that got cloned
1292 // Need DU safe iterator because of edge manipulation in calls.
1293 Unique_Node_List *out = new Unique_Node_List(Thread::current()->resource_area());
1294 for (DUIterator_Fast j1max, j1 = n->fast_outs(j1max); j1 < j1max; j1++) {
1295 out->push(n->fast_out(j1));
1296 }
1297 uint max = out->size();
1298 for (uint j = 0; j < max; j++) {// For all users
1299 Node *use = out->pop();
1300 Block *buse = get_block_for_node(use);
1301 if( use->is_Phi() ) {
1302 for( uint k = 1; k < use->req(); k++ )
1303 if( use->in(k) == n ) {
1304 Block* b = get_block_for_node(buse->pred(k));
1305 Node *fixup = catch_cleanup_find_cloned_def(b, n, block, n_clone_idx);
1306 use->set_req(k, fixup);
1307 }
1308 } else {
1309 if (block == buse) {
1310 catch_cleanup_intra_block(use, n, block, beg, n_clone_idx);
1311 } else {
1312 catch_cleanup_inter_block(use, buse, n, block, n_clone_idx);
1313 }
1314 }
1315 } // End for all users
1316
1317 } // End of for all Nodes in cloned area
1318
1319 // Remove the now-dead cloned ops
1320 for(uint i3 = beg; i3 < end; i3++ ) {
1321 block->get_node(beg)->disconnect_inputs(NULL, C);
1322 block->remove_node(beg);
1323 }
1324
1325 // If the successor blocks have a CreateEx node, move it back to the top
1326 for(uint i4 = 0; i4 < block->_num_succs; i4++ ) {
1327 Block *sb = block->_succs[i4];
1328 uint new_cnt = end - beg;
1329 // Remove any newly created, but dead, nodes.
1330 for( uint j = new_cnt; j > 0; j-- ) {
1331 Node *n = sb->get_node(j);
1332 if (n->outcnt() == 0 &&
1333 (!n->is_Proj() || n->as_Proj()->in(0)->outcnt() == 1) ){
1334 n->disconnect_inputs(NULL, C);
1335 sb->remove_node(j);
1336 new_cnt--;
1337 }
1338 }
1339 // If any newly created nodes remain, move the CreateEx node to the top
1340 if (new_cnt > 0) {
1341 Node *cex = sb->get_node(1+new_cnt);
1342 if( cex->is_Mach() && cex->as_Mach()->ideal_Opcode() == Op_CreateEx ) {
1343 sb->remove_node(1+new_cnt);
1344 sb->insert_node(cex, 1);
1345 }
1346 }
1347 }
1348 }