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src/share/vm/opto/lcm.cpp

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  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #include "precompiled.hpp"
  26 #include "memory/allocation.inline.hpp"
  27 #include "opto/ad.hpp"
  28 #include "opto/block.hpp"
  29 #include "opto/c2compiler.hpp"
  30 #include "opto/callnode.hpp"
  31 #include "opto/cfgnode.hpp"
  32 #include "opto/machnode.hpp"
  33 #include "opto/runtime.hpp"

  34 #include "runtime/sharedRuntime.hpp"
  35 
  36 // Optimization - Graph Style
  37 
  38 // Check whether val is not-null-decoded compressed oop,
  39 // i.e. will grab into the base of the heap if it represents NULL.
  40 static bool accesses_heap_base_zone(Node *val) {
  41   if (Universe::narrow_oop_base() > 0) { // Implies UseCompressedOops.
  42     if (val && val->is_Mach()) {
  43       if (val->as_Mach()->ideal_Opcode() == Op_DecodeN) {
  44         // This assumes all Decodes with TypePtr::NotNull are matched to nodes that
  45         // decode NULL to point to the heap base (Decode_NN).
  46         if (val->bottom_type()->is_oopptr()->ptr() == TypePtr::NotNull) {
  47           return true;
  48         }
  49       }
  50       // Must recognize load operation with Decode matched in memory operand.
  51       // We should not reach here exept for PPC/AIX, as os::zero_page_read_protected()
  52       // returns true everywhere else. On PPC, no such memory operands
  53       // exist, therefore we did not yet implement a check for such operands.


 426       in->disconnect_inputs(NULL, C);
 427       block->find_remove(in);
 428     }
 429   }
 430 
 431   latency_from_uses(nul_chk);
 432   latency_from_uses(best);
 433 }
 434 
 435 
 436 //------------------------------select-----------------------------------------
 437 // Select a nice fellow from the worklist to schedule next. If there is only
 438 // one choice, then use it. Projections take top priority for correctness
 439 // reasons - if I see a projection, then it is next.  There are a number of
 440 // other special cases, for instructions that consume condition codes, et al.
 441 // These are chosen immediately. Some instructions are required to immediately
 442 // precede the last instruction in the block, and these are taken last. Of the
 443 // remaining cases (most), choose the instruction with the greatest latency
 444 // (that is, the most number of pseudo-cycles required to the end of the
 445 // routine). If there is a tie, choose the instruction with the most inputs.
 446 Node* PhaseCFG::select(Block* block, Node_List &worklist, GrowableArray<int> &ready_cnt, VectorSet &next_call, uint sched_slot) {






 447 
 448   // If only a single entry on the stack, use it
 449   uint cnt = worklist.size();
 450   if (cnt == 1) {
 451     Node *n = worklist[0];
 452     worklist.map(0,worklist.pop());
 453     return n;
 454   }
 455 
 456   uint choice  = 0; // Bigger is most important
 457   uint latency = 0; // Bigger is scheduled first
 458   uint score   = 0; // Bigger is better
 459   int idx = -1;     // Index in worklist
 460   int cand_cnt = 0; // Candidate count
 461 
 462   for( uint i=0; i<cnt; i++ ) { // Inspect entire worklist
 463     // Order in worklist is used to break ties.
 464     // See caller for how this is used to delay scheduling
 465     // of induction variable increments to after the other
 466     // uses of the phi are scheduled.


 522     // See if this has a predecessor that is "must_clone", i.e. sets the
 523     // condition code. If so, choose this first
 524     for (uint j = 0; j < n->req() ; j++) {
 525       Node *inn = n->in(j);
 526       if (inn) {
 527         if (inn->is_Mach() && must_clone[inn->as_Mach()->ideal_Opcode()] ) {
 528           n_choice = 3;
 529           break;
 530         }
 531       }
 532     }
 533 
 534     // MachTemps should be scheduled last so they are near their uses
 535     if (n->is_MachTemp()) {
 536       n_choice = 1;
 537     }
 538 
 539     uint n_latency = get_latency_for_node(n);
 540     uint n_score   = n->req();   // Many inputs get high score to break ties
 541 






































 542     // Keep best latency found
 543     cand_cnt++;
 544     if (choice < n_choice ||
 545         (choice == n_choice &&
 546          ((StressLCM && Compile::randomized_select(cand_cnt)) ||
 547           (!StressLCM &&
 548            (latency < n_latency ||
 549             (latency == n_latency &&
 550              (score < n_score))))))) {
 551       choice  = n_choice;
 552       latency = n_latency;
 553       score   = n_score;
 554       idx     = i;               // Also keep index in worklist
 555     }
 556   } // End of for all ready nodes in worklist
 557 
 558   assert(idx >= 0, "index should be set");
 559   Node *n = worklist[(uint)idx];      // Get the winner
 560 
 561   worklist.map((uint)idx, worklist.pop());     // Compress worklist
 562   return n;
 563 }
 564 






























































































 565 
 566 //------------------------------set_next_call----------------------------------
 567 void PhaseCFG::set_next_call(Block* block, Node* n, VectorSet& next_call) {
 568   if( next_call.test_set(n->_idx) ) return;
 569   for( uint i=0; i<n->len(); i++ ) {
 570     Node *m = n->in(i);
 571     if( !m ) continue;  // must see all nodes in block that precede call
 572     if (get_block_for_node(m) == block) {
 573       set_next_call(block, m, next_call);
 574     }
 575   }
 576 }
 577 
 578 //------------------------------needed_for_next_call---------------------------
 579 // Set the flag 'next_call' for each Node that is needed for the next call to
 580 // be scheduled.  This flag lets me bias scheduling so Nodes needed for the
 581 // next subroutine call get priority - basically it moves things NOT needed
 582 // for the next call till after the call.  This prevents me from trying to
 583 // carry lots of stuff live across a call.
 584 void PhaseCFG::needed_for_next_call(Block* block, Node* this_call, VectorSet& next_call) {


 627     assert( n->is_MachProj(), "" );
 628     int n_cnt = ready_cnt.at(n->_idx)-1;
 629     ready_cnt.at_put(n->_idx, n_cnt);
 630     assert( n_cnt == 0, "" );
 631     // Schedule next to call
 632     block->map_node(n, node_cnt++);
 633     // Collect defined registers
 634     regs.OR(n->out_RegMask());
 635     // Check for scheduling the next control-definer
 636     if( n->bottom_type() == Type::CONTROL )
 637       // Warm up next pile of heuristic bits
 638       needed_for_next_call(block, n, next_call);
 639 
 640     // Children of projections are now all ready
 641     for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) {
 642       Node* m = n->fast_out(j); // Get user
 643       if(get_block_for_node(m) != block) {
 644         continue;
 645       }
 646       if( m->is_Phi() ) continue;
 647       int m_cnt = ready_cnt.at(m->_idx)-1;
 648       ready_cnt.at_put(m->_idx, m_cnt);
 649       if( m_cnt == 0 )
 650         worklist.push(m);
 651     }
 652 
 653   }
 654 
 655   // Act as if the call defines the Frame Pointer.
 656   // Certainly the FP is alive and well after the call.
 657   regs.Insert(_matcher.c_frame_pointer());
 658 
 659   // Set all registers killed and not already defined by the call.
 660   uint r_cnt = mcall->tf()->range()->cnt();
 661   int op = mcall->ideal_Opcode();
 662   MachProjNode *proj = new MachProjNode( mcall, r_cnt+1, RegMask::Empty, MachProjNode::fat_proj );
 663   map_node_to_block(proj, block);
 664   block->insert_node(proj, node_cnt++);
 665 
 666   // Select the right register save policy.
 667   const char * save_policy;


 694   bool exclude_soe = op == Op_CallRuntime;
 695 
 696   // If the call is a MethodHandle invoke, we need to exclude the
 697   // register which is used to save the SP value over MH invokes from
 698   // the mask.  Otherwise this register could be used for
 699   // deoptimization information.
 700   if (op == Op_CallStaticJava) {
 701     MachCallStaticJavaNode* mcallstaticjava = (MachCallStaticJavaNode*) mcall;
 702     if (mcallstaticjava->_method_handle_invoke)
 703       proj->_rout.OR(Matcher::method_handle_invoke_SP_save_mask());
 704   }
 705 
 706   add_call_kills(proj, regs, save_policy, exclude_soe);
 707 
 708   return node_cnt;
 709 }
 710 
 711 
 712 //------------------------------schedule_local---------------------------------
 713 // Topological sort within a block.  Someday become a real scheduler.
 714 bool PhaseCFG::schedule_local(Block* block, GrowableArray<int>& ready_cnt, VectorSet& next_call) {
 715   // Already "sorted" are the block start Node (as the first entry), and
 716   // the block-ending Node and any trailing control projections.  We leave
 717   // these alone.  PhiNodes and ParmNodes are made to follow the block start
 718   // Node.  Everything else gets topo-sorted.
 719 
 720 #ifndef PRODUCT
 721     if (trace_opto_pipelining()) {
 722       tty->print_cr("# --- schedule_local B%d, before: ---", block->_pre_order);
 723       for (uint i = 0;i < block->number_of_nodes(); i++) {
 724         tty->print("# ");
 725         block->get_node(i)->fast_dump();
 726       }
 727       tty->print_cr("#");
 728     }
 729 #endif
 730 
 731   // RootNode is already sorted
 732   if (block->number_of_nodes() == 1) {
 733     return true;
 734   }
 735 













 736   // Move PhiNodes and ParmNodes from 1 to cnt up to the start
 737   uint node_cnt = block->end_idx();
 738   uint phi_cnt = 1;
 739   uint i;
 740   for( i = 1; i<node_cnt; i++ ) { // Scan for Phi
 741     Node *n = block->get_node(i);
 742     if( n->is_Phi() ||          // Found a PhiNode or ParmNode
 743         (n->is_Proj()  && n->in(0) == block->head()) ) {
 744       // Move guy at 'phi_cnt' to the end; makes a hole at phi_cnt
 745       block->map_node(block->get_node(phi_cnt), i);
 746       block->map_node(n, phi_cnt++);  // swap Phi/Parm up front




 747     } else {                    // All others
 748       // Count block-local inputs to 'n'
 749       uint cnt = n->len();      // Input count
 750       uint local = 0;
 751       for( uint j=0; j<cnt; j++ ) {
 752         Node *m = n->in(j);
 753         if( m && get_block_for_node(m) == block && !m->is_top() )
 754           local++;              // One more block-local input
 755       }
 756       ready_cnt.at_put(n->_idx, local); // Count em up
 757 
 758 #ifdef ASSERT
 759       if( UseConcMarkSweepGC || UseG1GC ) {
 760         if( n->is_Mach() && n->as_Mach()->ideal_Opcode() == Op_StoreCM ) {
 761           // Check the precedence edges
 762           for (uint prec = n->req(); prec < n->len(); prec++) {
 763             Node* oop_store = n->in(prec);
 764             if (oop_store != NULL) {
 765               assert(get_block_for_node(oop_store)->_dom_depth <= block->_dom_depth, "oop_store must dominate card-mark");
 766             }


 774       if( n->is_Mach() && n->req() > TypeFunc::Parms &&
 775           (n->as_Mach()->ideal_Opcode() == Op_MemBarAcquire ||
 776            n->as_Mach()->ideal_Opcode() == Op_MemBarVolatile) ) {
 777         // MemBarAcquire could be created without Precedent edge.
 778         // del_req() replaces the specified edge with the last input edge
 779         // and then removes the last edge. If the specified edge > number of
 780         // edges the last edge will be moved outside of the input edges array
 781         // and the edge will be lost. This is why this code should be
 782         // executed only when Precedent (== TypeFunc::Parms) edge is present.
 783         Node *x = n->in(TypeFunc::Parms);
 784         n->del_req(TypeFunc::Parms);
 785         n->add_prec(x);
 786       }
 787     }
 788   }
 789   for(uint i2=i; i2< block->number_of_nodes(); i2++ ) // Trailing guys get zapped count
 790     ready_cnt.at_put(block->get_node(i2)->_idx, 0);
 791 
 792   // All the prescheduled guys do not hold back internal nodes
 793   uint i3;
 794   for(i3 = 0; i3<phi_cnt; i3++ ) {  // For all pre-scheduled
 795     Node *n = block->get_node(i3);       // Get pre-scheduled
 796     for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) {
 797       Node* m = n->fast_out(j);
 798       if (get_block_for_node(m) == block) { // Local-block user
 799         int m_cnt = ready_cnt.at(m->_idx)-1;






 800         ready_cnt.at_put(m->_idx, m_cnt);   // Fix ready count
 801       }
 802     }
 803   }
 804 
 805   Node_List delay;
 806   // Make a worklist
 807   Node_List worklist;
 808   for(uint i4=i3; i4<node_cnt; i4++ ) {    // Put ready guys on worklist
 809     Node *m = block->get_node(i4);
 810     if( !ready_cnt.at(m->_idx) ) {   // Zero ready count?
 811       if (m->is_iteratively_computed()) {
 812         // Push induction variable increments last to allow other uses
 813         // of the phi to be scheduled first. The select() method breaks
 814         // ties in scheduling by worklist order.
 815         delay.push(m);
 816       } else if (m->is_Mach() && m->as_Mach()->ideal_Opcode() == Op_CreateEx) {
 817         // Force the CreateEx to the top of the list so it's processed
 818         // first and ends up at the start of the block.
 819         worklist.insert(0, m);
 820       } else {
 821         worklist.push(m);         // Then on to worklist!
 822       }
 823     }
 824   }
 825   while (delay.size()) {
 826     Node* d = delay.pop();
 827     worklist.push(d);
 828   }
 829 

















 830   // Warm up the 'next_call' heuristic bits
 831   needed_for_next_call(block, block->head(), next_call);
 832 
 833 #ifndef PRODUCT
 834     if (trace_opto_pipelining()) {
 835       for (uint j=0; j< block->number_of_nodes(); j++) {
 836         Node     *n = block->get_node(j);
 837         int     idx = n->_idx;
 838         tty->print("#   ready cnt:%3d  ", ready_cnt.at(idx));
 839         tty->print("latency:%3d  ", get_latency_for_node(n));
 840         tty->print("%4d: %s\n", idx, n->Name());
 841       }
 842     }
 843 #endif
 844 
 845   uint max_idx = (uint)ready_cnt.length();
 846   // Pull from worklist and schedule
 847   while( worklist.size() ) {    // Worklist is not ready
 848 
 849 #ifndef PRODUCT
 850     if (trace_opto_pipelining()) {
 851       tty->print("#   ready list:");
 852       for( uint i=0; i<worklist.size(); i++ ) { // Inspect entire worklist
 853         Node *n = worklist[i];      // Get Node on worklist
 854         tty->print(" %d", n->_idx);
 855       }
 856       tty->cr();
 857     }
 858 #endif
 859 
 860     // Select and pop a ready guy from worklist
 861     Node* n = select(block, worklist, ready_cnt, next_call, phi_cnt);
 862     block->map_node(n, phi_cnt++);    // Schedule him next
 863 









 864 #ifndef PRODUCT
 865     if (trace_opto_pipelining()) {
 866       tty->print("#    select %d: %s", n->_idx, n->Name());
 867       tty->print(", latency:%d", get_latency_for_node(n));
 868       n->dump();
 869       if (Verbose) {
 870         tty->print("#   ready list:");
 871         for( uint i=0; i<worklist.size(); i++ ) { // Inspect entire worklist
 872           Node *n = worklist[i];      // Get Node on worklist
 873           tty->print(" %d", n->_idx);
 874         }
 875         tty->cr();
 876       }
 877     }
 878 
 879 #endif
 880     if( n->is_MachCall() ) {
 881       MachCallNode *mcall = n->as_MachCall();
 882       phi_cnt = sched_call(block, phi_cnt, worklist, ready_cnt, mcall, next_call);
 883       continue;


 889       regs.OR(n->out_RegMask());
 890 
 891       MachProjNode *proj = new MachProjNode( n, 1, RegMask::Empty, MachProjNode::fat_proj );
 892       map_node_to_block(proj, block);
 893       block->insert_node(proj, phi_cnt++);
 894 
 895       add_call_kills(proj, regs, _matcher._c_reg_save_policy, false);
 896     }
 897 
 898     // Children are now all ready
 899     for (DUIterator_Fast i5max, i5 = n->fast_outs(i5max); i5 < i5max; i5++) {
 900       Node* m = n->fast_out(i5); // Get user
 901       if (get_block_for_node(m) != block) {
 902         continue;
 903       }
 904       if( m->is_Phi() ) continue;
 905       if (m->_idx >= max_idx) { // new node, skip it
 906         assert(m->is_MachProj() && n->is_Mach() && n->as_Mach()->has_call(), "unexpected node types");
 907         continue;
 908       }
 909       int m_cnt = ready_cnt.at(m->_idx)-1;
 910       ready_cnt.at_put(m->_idx, m_cnt);
 911       if( m_cnt == 0 )
 912         worklist.push(m);
 913     }
 914   }
 915 
 916   if( phi_cnt != block->end_idx() ) {
 917     // did not schedule all.  Retry, Bailout, or Die
 918     if (C->subsume_loads() == true && !C->failing()) {
 919       // Retry with subsume_loads == false
 920       // If this is the first failure, the sentinel string will "stick"
 921       // to the Compile object, and the C2Compiler will see it and retry.
 922       C->record_failure(C2Compiler::retry_no_subsuming_loads());
 923     }
 924     // assert( phi_cnt == end_idx(), "did not schedule all" );
 925     return false;
 926   }
 927 






 928 #ifndef PRODUCT
 929   if (trace_opto_pipelining()) {
 930     tty->print_cr("#");
 931     tty->print_cr("# after schedule_local");
 932     for (uint i = 0;i < block->number_of_nodes();i++) {
 933       tty->print("# ");
 934       block->get_node(i)->fast_dump();
 935     }







 936     tty->cr();
 937   }
 938 #endif
 939 
 940 
 941   return true;
 942 }
 943 
 944 //--------------------------catch_cleanup_fix_all_inputs-----------------------
 945 static void catch_cleanup_fix_all_inputs(Node *use, Node *old_def, Node *new_def) {
 946   for (uint l = 0; l < use->len(); l++) {
 947     if (use->in(l) == old_def) {
 948       if (l < use->req()) {
 949         use->set_req(l, new_def);
 950       } else {
 951         use->rm_prec(l);
 952         use->add_prec(new_def);
 953         l--;
 954       }
 955     }
 956   }
 957 }
 958 
 959 //------------------------------catch_cleanup_find_cloned_def------------------




  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #include "precompiled.hpp"
  26 #include "memory/allocation.inline.hpp"
  27 #include "opto/ad.hpp"
  28 #include "opto/block.hpp"
  29 #include "opto/c2compiler.hpp"
  30 #include "opto/callnode.hpp"
  31 #include "opto/cfgnode.hpp"
  32 #include "opto/machnode.hpp"
  33 #include "opto/runtime.hpp"
  34 #include "opto/chaitin.hpp"
  35 #include "runtime/sharedRuntime.hpp"
  36 
  37 // Optimization - Graph Style
  38 
  39 // Check whether val is not-null-decoded compressed oop,
  40 // i.e. will grab into the base of the heap if it represents NULL.
  41 static bool accesses_heap_base_zone(Node *val) {
  42   if (Universe::narrow_oop_base() > 0) { // Implies UseCompressedOops.
  43     if (val && val->is_Mach()) {
  44       if (val->as_Mach()->ideal_Opcode() == Op_DecodeN) {
  45         // This assumes all Decodes with TypePtr::NotNull are matched to nodes that
  46         // decode NULL to point to the heap base (Decode_NN).
  47         if (val->bottom_type()->is_oopptr()->ptr() == TypePtr::NotNull) {
  48           return true;
  49         }
  50       }
  51       // Must recognize load operation with Decode matched in memory operand.
  52       // We should not reach here exept for PPC/AIX, as os::zero_page_read_protected()
  53       // returns true everywhere else. On PPC, no such memory operands
  54       // exist, therefore we did not yet implement a check for such operands.


 427       in->disconnect_inputs(NULL, C);
 428       block->find_remove(in);
 429     }
 430   }
 431 
 432   latency_from_uses(nul_chk);
 433   latency_from_uses(best);
 434 }
 435 
 436 
 437 //------------------------------select-----------------------------------------
 438 // Select a nice fellow from the worklist to schedule next. If there is only
 439 // one choice, then use it. Projections take top priority for correctness
 440 // reasons - if I see a projection, then it is next.  There are a number of
 441 // other special cases, for instructions that consume condition codes, et al.
 442 // These are chosen immediately. Some instructions are required to immediately
 443 // precede the last instruction in the block, and these are taken last. Of the
 444 // remaining cases (most), choose the instruction with the greatest latency
 445 // (that is, the most number of pseudo-cycles required to the end of the
 446 // routine). If there is a tie, choose the instruction with the most inputs.
 447 Node* PhaseCFG::select(
 448   Block* block,
 449   Node_List &worklist,
 450   GrowableArray<int> &ready_cnt,
 451   VectorSet &next_call,
 452   uint sched_slot,
 453   intptr_t* recalc_pressure_nodes) {
 454 
 455   // If only a single entry on the stack, use it
 456   uint cnt = worklist.size();
 457   if (cnt == 1) {
 458     Node *n = worklist[0];
 459     worklist.map(0,worklist.pop());
 460     return n;
 461   }
 462 
 463   uint choice  = 0; // Bigger is most important
 464   uint latency = 0; // Bigger is scheduled first
 465   uint score   = 0; // Bigger is better
 466   int idx = -1;     // Index in worklist
 467   int cand_cnt = 0; // Candidate count
 468 
 469   for( uint i=0; i<cnt; i++ ) { // Inspect entire worklist
 470     // Order in worklist is used to break ties.
 471     // See caller for how this is used to delay scheduling
 472     // of induction variable increments to after the other
 473     // uses of the phi are scheduled.


 529     // See if this has a predecessor that is "must_clone", i.e. sets the
 530     // condition code. If so, choose this first
 531     for (uint j = 0; j < n->req() ; j++) {
 532       Node *inn = n->in(j);
 533       if (inn) {
 534         if (inn->is_Mach() && must_clone[inn->as_Mach()->ideal_Opcode()] ) {
 535           n_choice = 3;
 536           break;
 537         }
 538       }
 539     }
 540 
 541     // MachTemps should be scheduled last so they are near their uses
 542     if (n->is_MachTemp()) {
 543       n_choice = 1;
 544     }
 545 
 546     uint n_latency = get_latency_for_node(n);
 547     uint n_score = n->req();   // Many inputs get high score to break ties
 548 
 549     if (OptoRegScheduling) {
 550       if (recalc_pressure_nodes[n->_idx] == 0x7fff7fff) {
 551         _regalloc->_scratch_int_pressure.init(_regalloc->_sched_int_pressure.high_pressure_limit());
 552         _regalloc->_scratch_float_pressure.init(_regalloc->_sched_float_pressure.high_pressure_limit());
 553         // simulate the notion that we just picked this node to schedule
 554         n->add_flag(Node::Flag_is_scheduled);
 555         // now caculate its effect upon the graph if we did
 556         adjust_register_pressure(n, block, recalc_pressure_nodes, false);
 557         // return its state for finalize in case somebody else wins
 558         n->remove_flag(Node::Flag_is_scheduled);
 559         // now save the two final pressure components of register pressure, limiting pressure calcs to short size
 560         short int_pressure = (short)_regalloc->_scratch_int_pressure.current_pressure();
 561         short float_pressure = (short)_regalloc->_scratch_float_pressure.current_pressure();
 562         recalc_pressure_nodes[n->_idx] = int_pressure;
 563         recalc_pressure_nodes[n->_idx] |= (float_pressure << 16);
 564       }
 565 
 566       if (_scheduling_for_pressure) {
 567         latency = n_latency;
 568         if (n_choice != 3) {
 569           // Now evaluate each register pressure component based on threshold in the score.
 570           // In general the defining register type will dominate the score, ergo we will not see register pressure grow on both banks
 571           // on a single instruction, but we might see it shrink on both banks.
 572           if (_regalloc->_sched_int_pressure.current_pressure() > _regalloc->_sched_int_pressure.high_pressure_limit()) {
 573             short int_pressure = (short)recalc_pressure_nodes[n->_idx];
 574             n_score = (int_pressure < 0) ? ((score + n_score) - int_pressure) : (int_pressure > 0) ? 1 : n_score;
 575           }
 576           if (_regalloc->_sched_float_pressure.current_pressure() > _regalloc->_sched_float_pressure.high_pressure_limit()) {
 577             short float_pressure = (short)(recalc_pressure_nodes[n->_idx] >> 16);
 578             n_score = (float_pressure < 0) ? ((score + n_score) - float_pressure) : (float_pressure > 0) ? 1 : n_score;
 579           }
 580         } else {
 581           // make sure we choose these candidates
 582           score = 0;
 583         }
 584       }
 585     }
 586 
 587     // Keep best latency found
 588     cand_cnt++;
 589     if (choice < n_choice ||
 590         (choice == n_choice &&
 591          ((StressLCM && Compile::randomized_select(cand_cnt)) ||
 592           (!StressLCM &&
 593            (latency < n_latency ||
 594             (latency == n_latency &&
 595              (score < n_score))))))) {
 596       choice  = n_choice;
 597       latency = n_latency;
 598       score   = n_score;
 599       idx     = i;               // Also keep index in worklist
 600     }
 601   } // End of for all ready nodes in worklist
 602 
 603   assert(idx >= 0, "index should be set");
 604   Node *n = worklist[(uint)idx];      // Get the winner
 605 
 606   worklist.map((uint)idx, worklist.pop());     // Compress worklist
 607   return n;
 608 }
 609 
 610 //-------------------------adjust_register_pressure----------------------------
 611 void PhaseCFG::adjust_register_pressure(Node* n, Block* block, intptr_t* recalc_pressure_nodes, bool finalize_mode) {
 612   PhaseLive* liveinfo = _regalloc->get_live();
 613   IndexSet* liveout = liveinfo->live(block);
 614   // first adjust the register pressure for the sources
 615   for (uint i = 1; i < n->req(); i++) {
 616     bool lrg_ends = false;
 617     Node *src_n = n->in(i);
 618     if (src_n == NULL) continue;
 619     if (!src_n->is_Mach()) continue;
 620     uint src = _regalloc->_lrg_map.find(src_n);
 621     if (src == 0) continue;
 622     LRG& lrg_src = _regalloc->lrgs(src);
 623     // detect if the live range ends or not
 624     if (liveout->member(src) == false) {
 625       lrg_ends = true;
 626       for (DUIterator_Fast jmax, j = src_n->fast_outs(jmax); j < jmax; j++) {
 627         Node* m = src_n->fast_out(j); // Get user
 628         if (m == n) continue;
 629         if (!m->is_Mach()) continue;
 630         MachNode *mach = m->as_Mach();
 631         bool src_matches = false;
 632         int iop = mach->ideal_Opcode();
 633 
 634         switch (iop) {
 635         case Op_StoreB:
 636         case Op_StoreC:
 637         case Op_StoreCM:
 638         case Op_StoreD:
 639         case Op_StoreF:
 640         case Op_StoreI:
 641         case Op_StoreL:
 642         case Op_StoreP:
 643         case Op_StoreN:
 644         case Op_StoreVector:
 645         case Op_StoreNKlass:
 646           for (uint k = 1; k < m->req(); k++) {
 647             Node *in = m->in(k);
 648             if (in == src_n) {
 649               src_matches = true;
 650               break;
 651             }
 652           }
 653           break;
 654 
 655         default:
 656           src_matches = true;
 657           break;
 658         }
 659 
 660         // If we have a store as our use, ignore the non source operands
 661         if (src_matches == false) continue;
 662 
 663         // Mark every unscheduled use which is not n with a recalculation
 664         if ((get_block_for_node(m) == block) && (!m->is_scheduled())) {
 665           if (finalize_mode && !m->is_Phi()) {
 666             recalc_pressure_nodes[m->_idx] = 0x7fff7fff;
 667           }
 668           lrg_ends = false;
 669         }
 670       }
 671     }
 672     // if none, this live range ends and we can adjust register pressure
 673     if (lrg_ends) {
 674       if (finalize_mode) {
 675         _regalloc->lower_pressure(block, 0, lrg_src, NULL, _regalloc->_sched_int_pressure, _regalloc->_sched_float_pressure);
 676       } else {
 677         _regalloc->lower_pressure(block, 0, lrg_src, NULL, _regalloc->_scratch_int_pressure, _regalloc->_scratch_float_pressure);
 678       }
 679     }
 680   }
 681 
 682   // now add the register pressure from the dest and evaluate which heuristic we should use:
 683   // 1.) The default, latency scheduling
 684   // 2.) Register pressure scheduling based on the high pressure limit threshold for int or float register stacks
 685   uint dst = _regalloc->_lrg_map.find(n);
 686   if (dst != 0) {
 687     LRG& lrg_dst = _regalloc->lrgs(dst);
 688     if (finalize_mode) {
 689       _regalloc->raise_pressure(block, lrg_dst, _regalloc->_sched_int_pressure, _regalloc->_sched_float_pressure);
 690       // check to see if we fall over the register pressure cliff here
 691       if (_regalloc->_sched_int_pressure.current_pressure() > _regalloc->_sched_int_pressure.high_pressure_limit()) {
 692         _scheduling_for_pressure = true;
 693       } else if (_regalloc->_sched_float_pressure.current_pressure() > _regalloc->_sched_float_pressure.high_pressure_limit()) {
 694         _scheduling_for_pressure = true;
 695       } else {
 696         // restore latency scheduling mode
 697         _scheduling_for_pressure = false;
 698       }
 699     } else {
 700       _regalloc->raise_pressure(block, lrg_dst, _regalloc->_scratch_int_pressure, _regalloc->_scratch_float_pressure);
 701     }
 702   }
 703 }
 704 
 705 //------------------------------set_next_call----------------------------------
 706 void PhaseCFG::set_next_call(Block* block, Node* n, VectorSet& next_call) {
 707   if( next_call.test_set(n->_idx) ) return;
 708   for( uint i=0; i<n->len(); i++ ) {
 709     Node *m = n->in(i);
 710     if( !m ) continue;  // must see all nodes in block that precede call
 711     if (get_block_for_node(m) == block) {
 712       set_next_call(block, m, next_call);
 713     }
 714   }
 715 }
 716 
 717 //------------------------------needed_for_next_call---------------------------
 718 // Set the flag 'next_call' for each Node that is needed for the next call to
 719 // be scheduled.  This flag lets me bias scheduling so Nodes needed for the
 720 // next subroutine call get priority - basically it moves things NOT needed
 721 // for the next call till after the call.  This prevents me from trying to
 722 // carry lots of stuff live across a call.
 723 void PhaseCFG::needed_for_next_call(Block* block, Node* this_call, VectorSet& next_call) {


 766     assert( n->is_MachProj(), "" );
 767     int n_cnt = ready_cnt.at(n->_idx)-1;
 768     ready_cnt.at_put(n->_idx, n_cnt);
 769     assert( n_cnt == 0, "" );
 770     // Schedule next to call
 771     block->map_node(n, node_cnt++);
 772     // Collect defined registers
 773     regs.OR(n->out_RegMask());
 774     // Check for scheduling the next control-definer
 775     if( n->bottom_type() == Type::CONTROL )
 776       // Warm up next pile of heuristic bits
 777       needed_for_next_call(block, n, next_call);
 778 
 779     // Children of projections are now all ready
 780     for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) {
 781       Node* m = n->fast_out(j); // Get user
 782       if(get_block_for_node(m) != block) {
 783         continue;
 784       }
 785       if( m->is_Phi() ) continue;
 786       int m_cnt = ready_cnt.at(m->_idx) - 1;
 787       ready_cnt.at_put(m->_idx, m_cnt);
 788       if( m_cnt == 0 )
 789         worklist.push(m);
 790     }
 791 
 792   }
 793 
 794   // Act as if the call defines the Frame Pointer.
 795   // Certainly the FP is alive and well after the call.
 796   regs.Insert(_matcher.c_frame_pointer());
 797 
 798   // Set all registers killed and not already defined by the call.
 799   uint r_cnt = mcall->tf()->range()->cnt();
 800   int op = mcall->ideal_Opcode();
 801   MachProjNode *proj = new MachProjNode( mcall, r_cnt+1, RegMask::Empty, MachProjNode::fat_proj );
 802   map_node_to_block(proj, block);
 803   block->insert_node(proj, node_cnt++);
 804 
 805   // Select the right register save policy.
 806   const char * save_policy;


 833   bool exclude_soe = op == Op_CallRuntime;
 834 
 835   // If the call is a MethodHandle invoke, we need to exclude the
 836   // register which is used to save the SP value over MH invokes from
 837   // the mask.  Otherwise this register could be used for
 838   // deoptimization information.
 839   if (op == Op_CallStaticJava) {
 840     MachCallStaticJavaNode* mcallstaticjava = (MachCallStaticJavaNode*) mcall;
 841     if (mcallstaticjava->_method_handle_invoke)
 842       proj->_rout.OR(Matcher::method_handle_invoke_SP_save_mask());
 843   }
 844 
 845   add_call_kills(proj, regs, save_policy, exclude_soe);
 846 
 847   return node_cnt;
 848 }
 849 
 850 
 851 //------------------------------schedule_local---------------------------------
 852 // Topological sort within a block.  Someday become a real scheduler.
 853 bool PhaseCFG::schedule_local(Block* block, GrowableArray<int>& ready_cnt, VectorSet& next_call, intptr_t *recalc_pressure_nodes) {
 854   // Already "sorted" are the block start Node (as the first entry), and
 855   // the block-ending Node and any trailing control projections.  We leave
 856   // these alone.  PhiNodes and ParmNodes are made to follow the block start
 857   // Node.  Everything else gets topo-sorted.
 858 
 859 #ifndef PRODUCT
 860     if (trace_opto_pipelining()) {
 861       tty->print_cr("# --- schedule_local B%d, before: ---", block->_pre_order);
 862       for (uint i = 0;i < block->number_of_nodes(); i++) {
 863         tty->print("# ");
 864         block->get_node(i)->fast_dump();
 865       }
 866       tty->print_cr("#");
 867     }
 868 #endif
 869 
 870   // RootNode is already sorted
 871   if (block->number_of_nodes() == 1) {
 872     return true;
 873   }
 874 
 875   // We track the uses of local definitions as input dependences so that
 876   // we know when a given instruction is avialable to be scheduled.
 877   uint i;
 878   if (OptoRegScheduling) {
 879     for (i = 1; i < block->number_of_nodes(); i++) { // setup nodes for pressure calc
 880       Node *n = block->get_node(i);
 881       n->remove_flag(Node::Flag_is_scheduled);
 882       if (!n->is_Phi()) {
 883         recalc_pressure_nodes[n->_idx] = 0x7fff7fff;
 884       }
 885     }
 886   }
 887 
 888   // Move PhiNodes and ParmNodes from 1 to cnt up to the start
 889   uint node_cnt = block->end_idx();
 890   uint phi_cnt = 1;

 891   for( i = 1; i<node_cnt; i++ ) { // Scan for Phi
 892     Node *n = block->get_node(i);
 893     if( n->is_Phi() ||          // Found a PhiNode or ParmNode
 894         (n->is_Proj()  && n->in(0) == block->head()) ) {
 895       // Move guy at 'phi_cnt' to the end; makes a hole at phi_cnt
 896       block->map_node(block->get_node(phi_cnt), i);
 897       block->map_node(n, phi_cnt++);  // swap Phi/Parm up front
 898       if (OptoRegScheduling) {
 899         // mark n as scheduled
 900         n->add_flag(Node::Flag_is_scheduled);
 901       }
 902     } else {                    // All others
 903       // Count block-local inputs to 'n'
 904       uint cnt = n->len();      // Input count
 905       uint local = 0;
 906       for( uint j=0; j<cnt; j++ ) {
 907         Node *m = n->in(j);
 908         if( m && get_block_for_node(m) == block && !m->is_top() )
 909           local++;              // One more block-local input
 910       }
 911       ready_cnt.at_put(n->_idx, local); // Count em up
 912 
 913 #ifdef ASSERT
 914       if( UseConcMarkSweepGC || UseG1GC ) {
 915         if( n->is_Mach() && n->as_Mach()->ideal_Opcode() == Op_StoreCM ) {
 916           // Check the precedence edges
 917           for (uint prec = n->req(); prec < n->len(); prec++) {
 918             Node* oop_store = n->in(prec);
 919             if (oop_store != NULL) {
 920               assert(get_block_for_node(oop_store)->_dom_depth <= block->_dom_depth, "oop_store must dominate card-mark");
 921             }


 929       if( n->is_Mach() && n->req() > TypeFunc::Parms &&
 930           (n->as_Mach()->ideal_Opcode() == Op_MemBarAcquire ||
 931            n->as_Mach()->ideal_Opcode() == Op_MemBarVolatile) ) {
 932         // MemBarAcquire could be created without Precedent edge.
 933         // del_req() replaces the specified edge with the last input edge
 934         // and then removes the last edge. If the specified edge > number of
 935         // edges the last edge will be moved outside of the input edges array
 936         // and the edge will be lost. This is why this code should be
 937         // executed only when Precedent (== TypeFunc::Parms) edge is present.
 938         Node *x = n->in(TypeFunc::Parms);
 939         n->del_req(TypeFunc::Parms);
 940         n->add_prec(x);
 941       }
 942     }
 943   }
 944   for(uint i2=i; i2< block->number_of_nodes(); i2++ ) // Trailing guys get zapped count
 945     ready_cnt.at_put(block->get_node(i2)->_idx, 0);
 946 
 947   // All the prescheduled guys do not hold back internal nodes
 948   uint i3;
 949   for (i3 = 0; i3 < phi_cnt; i3++) {  // For all pre-scheduled
 950     Node *n = block->get_node(i3);       // Get pre-scheduled
 951     for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) {
 952       Node* m = n->fast_out(j);
 953       if (get_block_for_node(m) == block) { // Local-block user
 954         int m_cnt = ready_cnt.at(m->_idx)-1;
 955         if (OptoRegScheduling) {
 956           // mark m as scheduled
 957           if (m_cnt < 0) {
 958             m->add_flag(Node::Flag_is_scheduled);
 959           }
 960         }
 961         ready_cnt.at_put(m->_idx, m_cnt);   // Fix ready count
 962       }
 963     }
 964   }
 965 
 966   Node_List delay;
 967   // Make a worklist
 968   Node_List worklist;
 969   for(uint i4=i3; i4<node_cnt; i4++ ) {    // Put ready guys on worklist
 970     Node *m = block->get_node(i4);
 971     if( !ready_cnt.at(m->_idx) ) {   // Zero ready count?
 972       if (m->is_iteratively_computed()) {
 973         // Push induction variable increments last to allow other uses
 974         // of the phi to be scheduled first. The select() method breaks
 975         // ties in scheduling by worklist order.
 976         delay.push(m);
 977       } else if (m->is_Mach() && m->as_Mach()->ideal_Opcode() == Op_CreateEx) {
 978         // Force the CreateEx to the top of the list so it's processed
 979         // first and ends up at the start of the block.
 980         worklist.insert(0, m);
 981       } else {
 982         worklist.push(m);         // Then on to worklist!
 983       }
 984     }
 985   }
 986   while (delay.size()) {
 987     Node* d = delay.pop();
 988     worklist.push(d);
 989   }
 990 
 991   if (OptoRegScheduling) {
 992     // To stage register pressure calculations we need to examine the live set variables
 993     // breaking them up by register class to compartmentalize the calculations.
 994     uint float_pressure = FLOATPRESSURE;
 995 #ifdef _LP64
 996     if (UseAVX > 2) {
 997       float_pressure *= 2;
 998     }
 999 #endif
1000     _regalloc->_sched_int_pressure.init(INTPRESSURE);
1001     _regalloc->_sched_float_pressure.init(float_pressure);
1002     _regalloc->_scratch_int_pressure.init(INTPRESSURE);
1003     _regalloc->_scratch_float_pressure.init(float_pressure);
1004 
1005     _regalloc->compute_entry_block_pressure(block);
1006   }
1007 
1008   // Warm up the 'next_call' heuristic bits
1009   needed_for_next_call(block, block->head(), next_call);
1010 
1011 #ifndef PRODUCT
1012     if (trace_opto_pipelining()) {
1013       for (uint j=0; j< block->number_of_nodes(); j++) {
1014         Node     *n = block->get_node(j);
1015         int     idx = n->_idx;
1016         tty->print("#   ready cnt:%3d  ", ready_cnt.at(idx));
1017         tty->print("latency:%3d  ", get_latency_for_node(n));
1018         tty->print("%4d: %s\n", idx, n->Name());
1019       }
1020     }
1021 #endif
1022 
1023   uint max_idx = (uint)ready_cnt.length();
1024   // Pull from worklist and schedule
1025   while( worklist.size() ) {    // Worklist is not ready
1026 
1027 #ifndef PRODUCT
1028     if (trace_opto_pipelining()) {
1029       tty->print("#   ready list:");
1030       for( uint i=0; i<worklist.size(); i++ ) { // Inspect entire worklist
1031         Node *n = worklist[i];      // Get Node on worklist
1032         tty->print(" %d", n->_idx);
1033       }
1034       tty->cr();
1035     }
1036 #endif
1037 
1038     // Select and pop a ready guy from worklist
1039     Node* n = select(block, worklist, ready_cnt, next_call, phi_cnt, recalc_pressure_nodes);
1040     block->map_node(n, phi_cnt++);    // Schedule him next
1041 
1042     if (OptoRegScheduling) {
1043       n->add_flag(Node::Flag_is_scheduled);
1044 
1045       // Now adjust the resister pressure with the node we selected
1046       if (!n->is_Phi()) {
1047         adjust_register_pressure(n, block, recalc_pressure_nodes, true);
1048       }
1049     }
1050 
1051 #ifndef PRODUCT
1052     if (trace_opto_pipelining()) {
1053       tty->print("#    select %d: %s", n->_idx, n->Name());
1054       tty->print(", latency:%d", get_latency_for_node(n));
1055       n->dump();
1056       if (Verbose) {
1057         tty->print("#   ready list:");
1058         for( uint i=0; i<worklist.size(); i++ ) { // Inspect entire worklist
1059           Node *n = worklist[i];      // Get Node on worklist
1060           tty->print(" %d", n->_idx);
1061         }
1062         tty->cr();
1063       }
1064     }
1065 
1066 #endif
1067     if( n->is_MachCall() ) {
1068       MachCallNode *mcall = n->as_MachCall();
1069       phi_cnt = sched_call(block, phi_cnt, worklist, ready_cnt, mcall, next_call);
1070       continue;


1076       regs.OR(n->out_RegMask());
1077 
1078       MachProjNode *proj = new MachProjNode( n, 1, RegMask::Empty, MachProjNode::fat_proj );
1079       map_node_to_block(proj, block);
1080       block->insert_node(proj, phi_cnt++);
1081 
1082       add_call_kills(proj, regs, _matcher._c_reg_save_policy, false);
1083     }
1084 
1085     // Children are now all ready
1086     for (DUIterator_Fast i5max, i5 = n->fast_outs(i5max); i5 < i5max; i5++) {
1087       Node* m = n->fast_out(i5); // Get user
1088       if (get_block_for_node(m) != block) {
1089         continue;
1090       }
1091       if( m->is_Phi() ) continue;
1092       if (m->_idx >= max_idx) { // new node, skip it
1093         assert(m->is_MachProj() && n->is_Mach() && n->as_Mach()->has_call(), "unexpected node types");
1094         continue;
1095       }
1096       int m_cnt = ready_cnt.at(m->_idx) - 1;
1097       ready_cnt.at_put(m->_idx, m_cnt);
1098       if( m_cnt == 0 )
1099         worklist.push(m);
1100     }
1101   }
1102 
1103   if( phi_cnt != block->end_idx() ) {
1104     // did not schedule all.  Retry, Bailout, or Die
1105     if (C->subsume_loads() == true && !C->failing()) {
1106       // Retry with subsume_loads == false
1107       // If this is the first failure, the sentinel string will "stick"
1108       // to the Compile object, and the C2Compiler will see it and retry.
1109       C->record_failure(C2Compiler::retry_no_subsuming_loads());
1110     }
1111     // assert( phi_cnt == end_idx(), "did not schedule all" );
1112     return false;
1113   }
1114 
1115   if (OptoRegScheduling) {
1116     _regalloc->compute_exit_block_pressure(block);
1117     block->_reg_pressure = _regalloc->_sched_int_pressure.final_pressure();
1118     block->_freg_pressure = _regalloc->_sched_float_pressure.final_pressure();
1119   }
1120 
1121 #ifndef PRODUCT
1122   if (trace_opto_pipelining()) {
1123     tty->print_cr("#");
1124     tty->print_cr("# after schedule_local");
1125     for (uint i = 0;i < block->number_of_nodes();i++) {
1126       tty->print("# ");
1127       block->get_node(i)->fast_dump();
1128     }
1129     tty->print_cr("# ");
1130 
1131     if (OptoRegScheduling) {
1132       tty->print_cr("# pressure info : %d", block->_pre_order);
1133       _regalloc->print_pressure_info(_regalloc->_sched_int_pressure, "int register info");
1134       _regalloc->print_pressure_info(_regalloc->_sched_float_pressure, "float register info");
1135     }
1136     tty->cr();
1137   }
1138 #endif

1139 
1140   return true;
1141 }
1142 
1143 //--------------------------catch_cleanup_fix_all_inputs-----------------------
1144 static void catch_cleanup_fix_all_inputs(Node *use, Node *old_def, Node *new_def) {
1145   for (uint l = 0; l < use->len(); l++) {
1146     if (use->in(l) == old_def) {
1147       if (l < use->req()) {
1148         use->set_req(l, new_def);
1149       } else {
1150         use->rm_prec(l);
1151         use->add_prec(new_def);
1152         l--;
1153       }
1154     }
1155   }
1156 }
1157 
1158 //------------------------------catch_cleanup_find_cloned_def------------------


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