714 op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
715
716 break;
717 }
718
719 case lir_unwind: {
720 assert(op->as_Op1() != NULL, "must be");
721 LIR_Op1* op1 = (LIR_Op1*)op;
722
723 assert(op1->_info == NULL, "no info");
724 assert(op1->_opr->is_valid(), "exception oop"); do_input(op1->_opr);
725 assert(op1->_result->is_illegal(), "no result");
726
727 break;
728 }
729
730
731 case lir_tan:
732 case lir_sin:
733 case lir_cos:
734 case lir_log:
735 case lir_log10: {
736 assert(op->as_Op2() != NULL, "must be");
737 LIR_Op2* op2 = (LIR_Op2*)op;
738
739 // On x86 tan/sin/cos need two temporary fpu stack slots and
740 // log/log10 need one so handle opr2 and tmp as temp inputs.
741 // Register input operand as temp to guarantee that it doesn't
742 // overlap with the input.
743 assert(op2->_info == NULL, "not used");
744 assert(op2->_tmp5->is_illegal(), "not used");
745 assert(op2->_opr1->is_valid(), "used");
746 do_input(op2->_opr1); do_temp(op2->_opr1);
747
748 if (op2->_opr2->is_valid()) do_temp(op2->_opr2);
749 if (op2->_tmp1->is_valid()) do_temp(op2->_tmp1);
750 if (op2->_tmp2->is_valid()) do_temp(op2->_tmp2);
751 if (op2->_tmp3->is_valid()) do_temp(op2->_tmp3);
752 if (op2->_tmp4->is_valid()) do_temp(op2->_tmp4);
753 if (op2->_result->is_valid()) do_output(op2->_result);
754
1752 case lir_pack64: s = "pack64"; break;
1753 case lir_unpack64: s = "unpack64"; break;
1754 // LIR_Op2
1755 case lir_cmp: s = "cmp"; break;
1756 case lir_cmp_l2i: s = "cmp_l2i"; break;
1757 case lir_ucmp_fd2i: s = "ucomp_fd2i"; break;
1758 case lir_cmp_fd2i: s = "comp_fd2i"; break;
1759 case lir_cmove: s = "cmove"; break;
1760 case lir_add: s = "add"; break;
1761 case lir_sub: s = "sub"; break;
1762 case lir_mul: s = "mul"; break;
1763 case lir_mul_strictfp: s = "mul_strictfp"; break;
1764 case lir_div: s = "div"; break;
1765 case lir_div_strictfp: s = "div_strictfp"; break;
1766 case lir_rem: s = "rem"; break;
1767 case lir_abs: s = "abs"; break;
1768 case lir_sqrt: s = "sqrt"; break;
1769 case lir_sin: s = "sin"; break;
1770 case lir_cos: s = "cos"; break;
1771 case lir_tan: s = "tan"; break;
1772 case lir_log: s = "log"; break;
1773 case lir_log10: s = "log10"; break;
1774 case lir_pow: s = "pow"; break;
1775 case lir_logic_and: s = "logic_and"; break;
1776 case lir_logic_or: s = "logic_or"; break;
1777 case lir_logic_xor: s = "logic_xor"; break;
1778 case lir_shl: s = "shift_left"; break;
1779 case lir_shr: s = "shift_right"; break;
1780 case lir_ushr: s = "ushift_right"; break;
1781 case lir_alloc_array: s = "alloc_array"; break;
1782 case lir_xadd: s = "xadd"; break;
1783 case lir_xchg: s = "xchg"; break;
1784 // LIR_Op3
1785 case lir_idiv: s = "idiv"; break;
1786 case lir_irem: s = "irem"; break;
1787 // LIR_OpJavaCall
1788 case lir_static_call: s = "static"; break;
1789 case lir_optvirtual_call: s = "optvirtual"; break;
1790 case lir_icvirtual_call: s = "icvirtual"; break;
1791 case lir_virtual_call: s = "virtual"; break;
1792 case lir_dynamic_call: s = "dynamic"; break;
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714 op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
715
716 break;
717 }
718
719 case lir_unwind: {
720 assert(op->as_Op1() != NULL, "must be");
721 LIR_Op1* op1 = (LIR_Op1*)op;
722
723 assert(op1->_info == NULL, "no info");
724 assert(op1->_opr->is_valid(), "exception oop"); do_input(op1->_opr);
725 assert(op1->_result->is_illegal(), "no result");
726
727 break;
728 }
729
730
731 case lir_tan:
732 case lir_sin:
733 case lir_cos:
734 case lir_log10: {
735 assert(op->as_Op2() != NULL, "must be");
736 LIR_Op2* op2 = (LIR_Op2*)op;
737
738 // On x86 tan/sin/cos need two temporary fpu stack slots and
739 // log/log10 need one so handle opr2 and tmp as temp inputs.
740 // Register input operand as temp to guarantee that it doesn't
741 // overlap with the input.
742 assert(op2->_info == NULL, "not used");
743 assert(op2->_tmp5->is_illegal(), "not used");
744 assert(op2->_opr1->is_valid(), "used");
745 do_input(op2->_opr1); do_temp(op2->_opr1);
746
747 if (op2->_opr2->is_valid()) do_temp(op2->_opr2);
748 if (op2->_tmp1->is_valid()) do_temp(op2->_tmp1);
749 if (op2->_tmp2->is_valid()) do_temp(op2->_tmp2);
750 if (op2->_tmp3->is_valid()) do_temp(op2->_tmp3);
751 if (op2->_tmp4->is_valid()) do_temp(op2->_tmp4);
752 if (op2->_result->is_valid()) do_output(op2->_result);
753
1751 case lir_pack64: s = "pack64"; break;
1752 case lir_unpack64: s = "unpack64"; break;
1753 // LIR_Op2
1754 case lir_cmp: s = "cmp"; break;
1755 case lir_cmp_l2i: s = "cmp_l2i"; break;
1756 case lir_ucmp_fd2i: s = "ucomp_fd2i"; break;
1757 case lir_cmp_fd2i: s = "comp_fd2i"; break;
1758 case lir_cmove: s = "cmove"; break;
1759 case lir_add: s = "add"; break;
1760 case lir_sub: s = "sub"; break;
1761 case lir_mul: s = "mul"; break;
1762 case lir_mul_strictfp: s = "mul_strictfp"; break;
1763 case lir_div: s = "div"; break;
1764 case lir_div_strictfp: s = "div_strictfp"; break;
1765 case lir_rem: s = "rem"; break;
1766 case lir_abs: s = "abs"; break;
1767 case lir_sqrt: s = "sqrt"; break;
1768 case lir_sin: s = "sin"; break;
1769 case lir_cos: s = "cos"; break;
1770 case lir_tan: s = "tan"; break;
1771 case lir_log10: s = "log10"; break;
1772 case lir_pow: s = "pow"; break;
1773 case lir_logic_and: s = "logic_and"; break;
1774 case lir_logic_or: s = "logic_or"; break;
1775 case lir_logic_xor: s = "logic_xor"; break;
1776 case lir_shl: s = "shift_left"; break;
1777 case lir_shr: s = "shift_right"; break;
1778 case lir_ushr: s = "ushift_right"; break;
1779 case lir_alloc_array: s = "alloc_array"; break;
1780 case lir_xadd: s = "xadd"; break;
1781 case lir_xchg: s = "xchg"; break;
1782 // LIR_Op3
1783 case lir_idiv: s = "idiv"; break;
1784 case lir_irem: s = "irem"; break;
1785 // LIR_OpJavaCall
1786 case lir_static_call: s = "static"; break;
1787 case lir_optvirtual_call: s = "optvirtual"; break;
1788 case lir_icvirtual_call: s = "icvirtual"; break;
1789 case lir_virtual_call: s = "virtual"; break;
1790 case lir_dynamic_call: s = "dynamic"; break;
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