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src/cpu/aarch64/vm/aarch64.ad

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3446   __ end_a_stub();
3447   return offset;
3448 }
3449 
3450 // REQUIRED MATCHER CODE
3451 
3452 //=============================================================================
3453 
3454 const bool Matcher::match_rule_supported(int opcode) {
3455 
3456   // TODO
3457   // identify extra cases that we might want to provide match rules for
3458   // e.g. Op_StrEquals and other intrinsics
3459   if (!has_match_rule(opcode)) {
3460     return false;
3461   }
3462 
3463   return true;  // Per default match rules are supported.
3464 }
3465 















3466 const int Matcher::float_pressure(int default_pressure_threshold) {
3467   return default_pressure_threshold;
3468 }
3469 
3470 int Matcher::regnum_to_fpu_offset(int regnum)
3471 {
3472   Unimplemented();
3473   return 0;
3474 }
3475 
3476 bool Matcher::is_short_branch_offset(int rule, int br_size, int offset)
3477 {
3478   Unimplemented();
3479   return false;
3480 }
3481 
3482 const bool Matcher::isSimpleConstant64(jlong value) {
3483   // Will one (StoreL ConL) be cheaper than two (StoreI ConI)?.
3484   // Probably always true, even if a temp register is required.
3485   return true;




3446   __ end_a_stub();
3447   return offset;
3448 }
3449 
3450 // REQUIRED MATCHER CODE
3451 
3452 //=============================================================================
3453 
3454 const bool Matcher::match_rule_supported(int opcode) {
3455 
3456   // TODO
3457   // identify extra cases that we might want to provide match rules for
3458   // e.g. Op_StrEquals and other intrinsics
3459   if (!has_match_rule(opcode)) {
3460     return false;
3461   }
3462 
3463   return true;  // Per default match rules are supported.
3464 }
3465 
3466 const bool Matcher::match_rule_supported_vector(int opcode, int vlen) {
3467 
3468   // TODO
3469   // identify extra cases that we might want to provide match rules for
3470   // e.g. Op_ vector nodes and other intrinsics while guarding with vlen
3471   if (!has_match_rule(opcode)) {
3472     return false;
3473   }
3474 
3475   bool ret_value = match_rule_supported(opcode);
3476   // Add rules here.
3477 
3478   return ret_value;  // Per default match rules are supported.
3479 }
3480 
3481 const int Matcher::float_pressure(int default_pressure_threshold) {
3482   return default_pressure_threshold;
3483 }
3484 
3485 int Matcher::regnum_to_fpu_offset(int regnum)
3486 {
3487   Unimplemented();
3488   return 0;
3489 }
3490 
3491 bool Matcher::is_short_branch_offset(int rule, int br_size, int offset)
3492 {
3493   Unimplemented();
3494   return false;
3495 }
3496 
3497 const bool Matcher::isSimpleConstant64(jlong value) {
3498   // Will one (StoreL ConL) be cheaper than two (StoreI ConI)?.
3499   // Probably always true, even if a temp register is required.
3500   return true;


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