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src/cpu/x86/vm/vm_version_x86.hpp
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@@ -550,10 +550,23 @@
if (_cpuid_info.ymm_save[i] != ymm_test_value()) {
retVal = false;
break;
}
}
+ // zmm_save will be set on a EVEX enabled machine even if we choose AVX code gen
+ if (retVal == false) {
+ // Verify that OS save/restore all bits of EVEX registers
+ // during signal processing.
+ int nreg = 2 LP64_ONLY(+2);
+ retVal = true;
+ for (int i = 0; i < 16 * nreg; i++) { // 64 bytes per zmm register
+ if (_cpuid_info.zmm_save[i] != ymm_test_value()) {
+ retVal = false;
+ break;
+ }
+ }
+ }
}
return retVal;
}
static void get_processor_features();
@@ -704,10 +717,12 @@
static bool supports_avx512cd() { return (_cpuFeatures & CPU_AVX512CD) != 0; }
static bool supports_avx512bw() { return (_cpuFeatures & CPU_AVX512BW) != 0; }
static bool supports_avx512vl() { return (_cpuFeatures & CPU_AVX512VL) != 0; }
static bool supports_avx512vlbw() { return (supports_avx512bw() && supports_avx512vl()); }
static bool supports_avx512novl() { return (supports_evex() && !supports_avx512vl()); }
+ static bool supports_avx512nobw() { return (supports_evex() && !supports_avx512bw()); }
+ static bool supports_avx256only() { return (supports_avx2() && !supports_evex()); }
// Intel features
static bool is_intel_family_core() { return is_intel() &&
extended_cpu_family() == CPU_FAMILY_INTEL_CORE; }
static bool is_intel_tsc_synched_at_init() {
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