874 #endif // COMPILER2
875
876 // On new cpus instructions which update whole XMM register should be used
877 // to prevent partial register stall due to dependencies on high half.
878 //
879 // UseXmmLoadAndClearUpper == true --> movsd(xmm, mem)
880 // UseXmmLoadAndClearUpper == false --> movlpd(xmm, mem)
881 // UseXmmRegToRegMoveAll == true --> movaps(xmm, xmm), movapd(xmm, xmm).
882 // UseXmmRegToRegMoveAll == false --> movss(xmm, xmm), movsd(xmm, xmm).
883
884 if( is_amd() ) { // AMD cpus specific settings
885 if( supports_sse2() && FLAG_IS_DEFAULT(UseAddressNop) ) {
886 // Use it on new AMD cpus starting from Opteron.
887 UseAddressNop = true;
888 }
889 if( supports_sse2() && FLAG_IS_DEFAULT(UseNewLongLShift) ) {
890 // Use it on new AMD cpus starting from Opteron.
891 UseNewLongLShift = true;
892 }
893 if( FLAG_IS_DEFAULT(UseXmmLoadAndClearUpper) ) {
894 if( supports_sse4a() ) {
895 UseXmmLoadAndClearUpper = true; // use movsd only on '10h' Opteron
896 } else {
897 UseXmmLoadAndClearUpper = false;
898 }
899 }
900 if( FLAG_IS_DEFAULT(UseXmmRegToRegMoveAll) ) {
901 if( supports_sse4a() ) {
902 UseXmmRegToRegMoveAll = true; // use movaps, movapd only on '10h'
903 } else {
904 UseXmmRegToRegMoveAll = false;
905 }
906 }
907 if( FLAG_IS_DEFAULT(UseXmmI2F) ) {
908 if( supports_sse4a() ) {
909 UseXmmI2F = true;
910 } else {
911 UseXmmI2F = false;
912 }
913 }
914 if( FLAG_IS_DEFAULT(UseXmmI2D) ) {
|
874 #endif // COMPILER2
875
876 // On new cpus instructions which update whole XMM register should be used
877 // to prevent partial register stall due to dependencies on high half.
878 //
879 // UseXmmLoadAndClearUpper == true --> movsd(xmm, mem)
880 // UseXmmLoadAndClearUpper == false --> movlpd(xmm, mem)
881 // UseXmmRegToRegMoveAll == true --> movaps(xmm, xmm), movapd(xmm, xmm).
882 // UseXmmRegToRegMoveAll == false --> movss(xmm, xmm), movsd(xmm, xmm).
883
884 if( is_amd() ) { // AMD cpus specific settings
885 if( supports_sse2() && FLAG_IS_DEFAULT(UseAddressNop) ) {
886 // Use it on new AMD cpus starting from Opteron.
887 UseAddressNop = true;
888 }
889 if( supports_sse2() && FLAG_IS_DEFAULT(UseNewLongLShift) ) {
890 // Use it on new AMD cpus starting from Opteron.
891 UseNewLongLShift = true;
892 }
893 if( FLAG_IS_DEFAULT(UseXmmLoadAndClearUpper) ) {
894 if (supports_sse4a()) {
895 UseXmmLoadAndClearUpper = true; // use movsd only on '10h' Opteron
896 } else {
897 UseXmmLoadAndClearUpper = false;
898 }
899 }
900 if( FLAG_IS_DEFAULT(UseXmmRegToRegMoveAll) ) {
901 if( supports_sse4a() ) {
902 UseXmmRegToRegMoveAll = true; // use movaps, movapd only on '10h'
903 } else {
904 UseXmmRegToRegMoveAll = false;
905 }
906 }
907 if( FLAG_IS_DEFAULT(UseXmmI2F) ) {
908 if( supports_sse4a() ) {
909 UseXmmI2F = true;
910 } else {
911 UseXmmI2F = false;
912 }
913 }
914 if( FLAG_IS_DEFAULT(UseXmmI2D) ) {
|