--- old/src/cpu/x86/vm/x86_64.ad	2015-11-19 18:51:33.533094300 -0800
+++ new/src/cpu/x86/vm/x86_64.ad	2015-11-19 18:51:33.195060500 -0800
@@ -9821,23 +9821,6 @@
 %}
 
 // -----------Trig and Trancendental Instructions------------------------------
-instruct cosD_reg(regD dst) %{
-  match(Set dst (CosD dst));
-
-  format %{ "dcos   $dst\n\t" %}
-  opcode(0xD9, 0xFF);
-  ins_encode( Push_SrcXD(dst), OpcP, OpcS, Push_ResultXD(dst) );
-  ins_pipe( pipe_slow );
-%}
-
-instruct sinD_reg(regD dst) %{
-  match(Set dst (SinD dst));
-
-  format %{ "dsin   $dst\n\t" %}
-  opcode(0xD9, 0xFE);
-  ins_encode( Push_SrcXD(dst), OpcP, OpcS, Push_ResultXD(dst) );
-  ins_pipe( pipe_slow );
-%}
 
 instruct tanD_reg(regD dst) %{
   match(Set dst (TanD dst));