1 /*
2 * Copyright (c) 2000, 2015, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #ifndef SHARE_VM_C1_C1_LIR_HPP
26 #define SHARE_VM_C1_C1_LIR_HPP
27
28 #include "c1/c1_Defs.hpp"
29 #include "c1/c1_ValueType.hpp"
30 #include "oops/method.hpp"
31
32 class BlockBegin;
33 class BlockList;
34 class LIR_Assembler;
35 class CodeEmitInfo;
36 class CodeStub;
37 class CodeStubList;
38 class ArrayCopyStub;
39 class LIR_Op;
40 class ciType;
41 class ValueType;
42 class LIR_OpVisitState;
43 class FpuStackSim;
44
45 //---------------------------------------------------------------------
46 // LIR Operands
47 // LIR_OprDesc
48 // LIR_OprPtr
49 // LIR_Const
50 // LIR_Address
51 //---------------------------------------------------------------------
52 class LIR_OprDesc;
53 class LIR_OprPtr;
54 class LIR_Const;
55 class LIR_Address;
56 class LIR_OprVisitor;
57
58
59 typedef LIR_OprDesc* LIR_Opr;
60 typedef int RegNr;
61
62 define_array(LIR_OprArray, LIR_Opr)
63 define_stack(LIR_OprList, LIR_OprArray)
64
65 define_array(LIR_OprRefArray, LIR_Opr*)
66 define_stack(LIR_OprRefList, LIR_OprRefArray)
67
68 define_array(CodeEmitInfoArray, CodeEmitInfo*)
69 define_stack(CodeEmitInfoList, CodeEmitInfoArray)
70
71 define_array(LIR_OpArray, LIR_Op*)
72 define_stack(LIR_OpList, LIR_OpArray)
73
74 // define LIR_OprPtr early so LIR_OprDesc can refer to it
75 class LIR_OprPtr: public CompilationResourceObj {
76 public:
77 bool is_oop_pointer() const { return (type() == T_OBJECT); }
78 bool is_float_kind() const { BasicType t = type(); return (t == T_FLOAT) || (t == T_DOUBLE); }
79
80 virtual LIR_Const* as_constant() { return NULL; }
81 virtual LIR_Address* as_address() { return NULL; }
82 virtual BasicType type() const = 0;
83 virtual void print_value_on(outputStream* out) const = 0;
84 };
85
86
87
88 // LIR constants
89 class LIR_Const: public LIR_OprPtr {
90 private:
91 JavaValue _value;
92
93 void type_check(BasicType t) const { assert(type() == t, "type check"); }
94 void type_check(BasicType t1, BasicType t2) const { assert(type() == t1 || type() == t2, "type check"); }
95 void type_check(BasicType t1, BasicType t2, BasicType t3) const { assert(type() == t1 || type() == t2 || type() == t3, "type check"); }
96
97 public:
98 LIR_Const(jint i, bool is_address=false) { _value.set_type(is_address?T_ADDRESS:T_INT); _value.set_jint(i); }
99 LIR_Const(jlong l) { _value.set_type(T_LONG); _value.set_jlong(l); }
100 LIR_Const(jfloat f) { _value.set_type(T_FLOAT); _value.set_jfloat(f); }
101 LIR_Const(jdouble d) { _value.set_type(T_DOUBLE); _value.set_jdouble(d); }
102 LIR_Const(jobject o) { _value.set_type(T_OBJECT); _value.set_jobject(o); }
103 LIR_Const(void* p) {
104 #ifdef _LP64
105 assert(sizeof(jlong) >= sizeof(p), "too small");;
106 _value.set_type(T_LONG); _value.set_jlong((jlong)p);
107 #else
108 assert(sizeof(jint) >= sizeof(p), "too small");;
109 _value.set_type(T_INT); _value.set_jint((jint)p);
110 #endif
111 }
112 LIR_Const(Metadata* m) {
113 _value.set_type(T_METADATA);
114 #ifdef _LP64
115 _value.set_jlong((jlong)m);
116 #else
117 _value.set_jint((jint)m);
118 #endif // _LP64
119 }
120
121 virtual BasicType type() const { return _value.get_type(); }
122 virtual LIR_Const* as_constant() { return this; }
123
124 jint as_jint() const { type_check(T_INT, T_ADDRESS); return _value.get_jint(); }
125 jlong as_jlong() const { type_check(T_LONG ); return _value.get_jlong(); }
126 jfloat as_jfloat() const { type_check(T_FLOAT ); return _value.get_jfloat(); }
127 jdouble as_jdouble() const { type_check(T_DOUBLE); return _value.get_jdouble(); }
128 jobject as_jobject() const { type_check(T_OBJECT); return _value.get_jobject(); }
129 jint as_jint_lo() const { type_check(T_LONG ); return low(_value.get_jlong()); }
130 jint as_jint_hi() const { type_check(T_LONG ); return high(_value.get_jlong()); }
131
132 #ifdef _LP64
133 address as_pointer() const { type_check(T_LONG ); return (address)_value.get_jlong(); }
134 Metadata* as_metadata() const { type_check(T_METADATA); return (Metadata*)_value.get_jlong(); }
135 #else
136 address as_pointer() const { type_check(T_INT ); return (address)_value.get_jint(); }
137 Metadata* as_metadata() const { type_check(T_METADATA); return (Metadata*)_value.get_jint(); }
138 #endif
139
140
141 jint as_jint_bits() const { type_check(T_FLOAT, T_INT, T_ADDRESS); return _value.get_jint(); }
142 jint as_jint_lo_bits() const {
143 if (type() == T_DOUBLE) {
144 return low(jlong_cast(_value.get_jdouble()));
145 } else {
146 return as_jint_lo();
147 }
148 }
149 jint as_jint_hi_bits() const {
150 if (type() == T_DOUBLE) {
151 return high(jlong_cast(_value.get_jdouble()));
152 } else {
153 return as_jint_hi();
154 }
155 }
156 jlong as_jlong_bits() const {
157 if (type() == T_DOUBLE) {
158 return jlong_cast(_value.get_jdouble());
159 } else {
160 return as_jlong();
161 }
162 }
163
164 virtual void print_value_on(outputStream* out) const PRODUCT_RETURN;
165
166
167 bool is_zero_float() {
168 jfloat f = as_jfloat();
169 jfloat ok = 0.0f;
170 return jint_cast(f) == jint_cast(ok);
171 }
172
173 bool is_one_float() {
174 jfloat f = as_jfloat();
175 return !g_isnan(f) && g_isfinite(f) && f == 1.0;
176 }
177
178 bool is_zero_double() {
179 jdouble d = as_jdouble();
180 jdouble ok = 0.0;
181 return jlong_cast(d) == jlong_cast(ok);
182 }
183
184 bool is_one_double() {
185 jdouble d = as_jdouble();
186 return !g_isnan(d) && g_isfinite(d) && d == 1.0;
187 }
188 };
189
190
191 //---------------------LIR Operand descriptor------------------------------------
192 //
193 // The class LIR_OprDesc represents a LIR instruction operand;
194 // it can be a register (ALU/FPU), stack location or a constant;
195 // Constants and addresses are represented as resource area allocated
196 // structures (see above).
197 // Registers and stack locations are inlined into the this pointer
198 // (see value function).
199
200 class LIR_OprDesc: public CompilationResourceObj {
201 public:
202 // value structure:
203 // data opr-type opr-kind
204 // +--------------+-------+-------+
205 // [max...........|7 6 5 4|3 2 1 0]
206 // ^
207 // is_pointer bit
208 //
209 // lowest bit cleared, means it is a structure pointer
210 // we need 4 bits to represent types
211
212 private:
213 friend class LIR_OprFact;
214
215 // Conversion
216 intptr_t value() const { return (intptr_t) this; }
217
218 bool check_value_mask(intptr_t mask, intptr_t masked_value) const {
219 return (value() & mask) == masked_value;
220 }
221
222 enum OprKind {
223 pointer_value = 0
224 , stack_value = 1
225 , cpu_register = 3
226 , fpu_register = 5
227 , illegal_value = 7
228 };
229
230 enum OprBits {
231 pointer_bits = 1
232 , kind_bits = 3
233 , type_bits = 4
234 , size_bits = 2
235 , destroys_bits = 1
236 , virtual_bits = 1
237 , is_xmm_bits = 1
238 , last_use_bits = 1
239 , is_fpu_stack_offset_bits = 1 // used in assertion checking on x86 for FPU stack slot allocation
240 , non_data_bits = kind_bits + type_bits + size_bits + destroys_bits + last_use_bits +
241 is_fpu_stack_offset_bits + virtual_bits + is_xmm_bits
242 , data_bits = BitsPerInt - non_data_bits
243 , reg_bits = data_bits / 2 // for two registers in one value encoding
244 };
245
246 enum OprShift {
247 kind_shift = 0
248 , type_shift = kind_shift + kind_bits
249 , size_shift = type_shift + type_bits
250 , destroys_shift = size_shift + size_bits
251 , last_use_shift = destroys_shift + destroys_bits
252 , is_fpu_stack_offset_shift = last_use_shift + last_use_bits
253 , virtual_shift = is_fpu_stack_offset_shift + is_fpu_stack_offset_bits
254 , is_xmm_shift = virtual_shift + virtual_bits
255 , data_shift = is_xmm_shift + is_xmm_bits
256 , reg1_shift = data_shift
257 , reg2_shift = data_shift + reg_bits
258
259 };
260
261 enum OprSize {
262 single_size = 0 << size_shift
263 , double_size = 1 << size_shift
264 };
265
266 enum OprMask {
267 kind_mask = right_n_bits(kind_bits)
268 , type_mask = right_n_bits(type_bits) << type_shift
269 , size_mask = right_n_bits(size_bits) << size_shift
270 , last_use_mask = right_n_bits(last_use_bits) << last_use_shift
271 , is_fpu_stack_offset_mask = right_n_bits(is_fpu_stack_offset_bits) << is_fpu_stack_offset_shift
272 , virtual_mask = right_n_bits(virtual_bits) << virtual_shift
273 , is_xmm_mask = right_n_bits(is_xmm_bits) << is_xmm_shift
274 , pointer_mask = right_n_bits(pointer_bits)
275 , lower_reg_mask = right_n_bits(reg_bits)
276 , no_type_mask = (int)(~(type_mask | last_use_mask | is_fpu_stack_offset_mask))
277 };
278
279 uintptr_t data() const { return value() >> data_shift; }
280 int lo_reg_half() const { return data() & lower_reg_mask; }
281 int hi_reg_half() const { return (data() >> reg_bits) & lower_reg_mask; }
282 OprKind kind_field() const { return (OprKind)(value() & kind_mask); }
283 OprSize size_field() const { return (OprSize)(value() & size_mask); }
284
285 static char type_char(BasicType t);
286
287 public:
288 enum {
289 vreg_base = ConcreteRegisterImpl::number_of_registers,
290 vreg_max = (1 << data_bits) - 1
291 };
292
293 static inline LIR_Opr illegalOpr();
294
295 enum OprType {
296 unknown_type = 0 << type_shift // means: not set (catch uninitialized types)
297 , int_type = 1 << type_shift
298 , long_type = 2 << type_shift
299 , object_type = 3 << type_shift
300 , address_type = 4 << type_shift
301 , float_type = 5 << type_shift
302 , double_type = 6 << type_shift
303 , metadata_type = 7 << type_shift
304 };
305 friend OprType as_OprType(BasicType t);
306 friend BasicType as_BasicType(OprType t);
307
308 OprType type_field_valid() const { assert(is_register() || is_stack(), "should not be called otherwise"); return (OprType)(value() & type_mask); }
309 OprType type_field() const { return is_illegal() ? unknown_type : (OprType)(value() & type_mask); }
310
311 static OprSize size_for(BasicType t) {
312 switch (t) {
313 case T_LONG:
314 case T_DOUBLE:
315 return double_size;
316 break;
317
318 case T_FLOAT:
319 case T_BOOLEAN:
320 case T_CHAR:
321 case T_BYTE:
322 case T_SHORT:
323 case T_INT:
324 case T_ADDRESS:
325 case T_OBJECT:
326 case T_ARRAY:
327 case T_METADATA:
328 return single_size;
329 break;
330
331 default:
332 ShouldNotReachHere();
333 return single_size;
334 }
335 }
336
337
338 void validate_type() const PRODUCT_RETURN;
339
340 BasicType type() const {
341 if (is_pointer()) {
342 return pointer()->type();
343 }
344 return as_BasicType(type_field());
345 }
346
347
348 ValueType* value_type() const { return as_ValueType(type()); }
349
350 char type_char() const { return type_char((is_pointer()) ? pointer()->type() : type()); }
351
352 bool is_equal(LIR_Opr opr) const { return this == opr; }
353 // checks whether types are same
354 bool is_same_type(LIR_Opr opr) const {
355 assert(type_field() != unknown_type &&
356 opr->type_field() != unknown_type, "shouldn't see unknown_type");
357 return type_field() == opr->type_field();
358 }
359 bool is_same_register(LIR_Opr opr) {
360 return (is_register() && opr->is_register() &&
361 kind_field() == opr->kind_field() &&
362 (value() & no_type_mask) == (opr->value() & no_type_mask));
363 }
364
365 bool is_pointer() const { return check_value_mask(pointer_mask, pointer_value); }
366 bool is_illegal() const { return kind_field() == illegal_value; }
367 bool is_valid() const { return kind_field() != illegal_value; }
368
369 bool is_register() const { return is_cpu_register() || is_fpu_register(); }
370 bool is_virtual() const { return is_virtual_cpu() || is_virtual_fpu(); }
371
372 bool is_constant() const { return is_pointer() && pointer()->as_constant() != NULL; }
373 bool is_address() const { return is_pointer() && pointer()->as_address() != NULL; }
374
375 bool is_float_kind() const { return is_pointer() ? pointer()->is_float_kind() : (kind_field() == fpu_register); }
376 bool is_oop() const;
377
378 // semantic for fpu- and xmm-registers:
379 // * is_float and is_double return true for xmm_registers
380 // (so is_single_fpu and is_single_xmm are true)
381 // * So you must always check for is_???_xmm prior to is_???_fpu to
382 // distinguish between fpu- and xmm-registers
383
384 bool is_stack() const { validate_type(); return check_value_mask(kind_mask, stack_value); }
385 bool is_single_stack() const { validate_type(); return check_value_mask(kind_mask | size_mask, stack_value | single_size); }
386 bool is_double_stack() const { validate_type(); return check_value_mask(kind_mask | size_mask, stack_value | double_size); }
387
388 bool is_cpu_register() const { validate_type(); return check_value_mask(kind_mask, cpu_register); }
389 bool is_virtual_cpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, cpu_register | virtual_mask); }
390 bool is_fixed_cpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, cpu_register); }
391 bool is_single_cpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, cpu_register | single_size); }
392 bool is_double_cpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, cpu_register | double_size); }
393
394 bool is_fpu_register() const { validate_type(); return check_value_mask(kind_mask, fpu_register); }
395 bool is_virtual_fpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, fpu_register | virtual_mask); }
396 bool is_fixed_fpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, fpu_register); }
397 bool is_single_fpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, fpu_register | single_size); }
398 bool is_double_fpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, fpu_register | double_size); }
399
400 bool is_xmm_register() const { validate_type(); return check_value_mask(kind_mask | is_xmm_mask, fpu_register | is_xmm_mask); }
401 bool is_single_xmm() const { validate_type(); return check_value_mask(kind_mask | size_mask | is_xmm_mask, fpu_register | single_size | is_xmm_mask); }
402 bool is_double_xmm() const { validate_type(); return check_value_mask(kind_mask | size_mask | is_xmm_mask, fpu_register | double_size | is_xmm_mask); }
403
404 // fast accessor functions for special bits that do not work for pointers
405 // (in this functions, the check for is_pointer() is omitted)
406 bool is_single_word() const { assert(is_register() || is_stack(), "type check"); return check_value_mask(size_mask, single_size); }
407 bool is_double_word() const { assert(is_register() || is_stack(), "type check"); return check_value_mask(size_mask, double_size); }
408 bool is_virtual_register() const { assert(is_register(), "type check"); return check_value_mask(virtual_mask, virtual_mask); }
409 bool is_oop_register() const { assert(is_register() || is_stack(), "type check"); return type_field_valid() == object_type; }
410 BasicType type_register() const { assert(is_register() || is_stack(), "type check"); return as_BasicType(type_field_valid()); }
411
412 bool is_last_use() const { assert(is_register(), "only works for registers"); return (value() & last_use_mask) != 0; }
413 bool is_fpu_stack_offset() const { assert(is_register(), "only works for registers"); return (value() & is_fpu_stack_offset_mask) != 0; }
414 LIR_Opr make_last_use() { assert(is_register(), "only works for registers"); return (LIR_Opr)(value() | last_use_mask); }
415 LIR_Opr make_fpu_stack_offset() { assert(is_register(), "only works for registers"); return (LIR_Opr)(value() | is_fpu_stack_offset_mask); }
416
417
418 int single_stack_ix() const { assert(is_single_stack() && !is_virtual(), "type check"); return (int)data(); }
419 int double_stack_ix() const { assert(is_double_stack() && !is_virtual(), "type check"); return (int)data(); }
420 RegNr cpu_regnr() const { assert(is_single_cpu() && !is_virtual(), "type check"); return (RegNr)data(); }
421 RegNr cpu_regnrLo() const { assert(is_double_cpu() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); }
422 RegNr cpu_regnrHi() const { assert(is_double_cpu() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); }
423 RegNr fpu_regnr() const { assert(is_single_fpu() && !is_virtual(), "type check"); return (RegNr)data(); }
424 RegNr fpu_regnrLo() const { assert(is_double_fpu() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); }
425 RegNr fpu_regnrHi() const { assert(is_double_fpu() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); }
426 RegNr xmm_regnr() const { assert(is_single_xmm() && !is_virtual(), "type check"); return (RegNr)data(); }
427 RegNr xmm_regnrLo() const { assert(is_double_xmm() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); }
428 RegNr xmm_regnrHi() const { assert(is_double_xmm() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); }
429 int vreg_number() const { assert(is_virtual(), "type check"); return (RegNr)data(); }
430
431 LIR_OprPtr* pointer() const { assert(is_pointer(), "type check"); return (LIR_OprPtr*)this; }
432 LIR_Const* as_constant_ptr() const { return pointer()->as_constant(); }
433 LIR_Address* as_address_ptr() const { return pointer()->as_address(); }
434
435 Register as_register() const;
436 Register as_register_lo() const;
437 Register as_register_hi() const;
438
439 Register as_pointer_register() {
440 #ifdef _LP64
441 if (is_double_cpu()) {
442 assert(as_register_lo() == as_register_hi(), "should be a single register");
443 return as_register_lo();
444 }
445 #endif
446 return as_register();
447 }
448
449 #ifdef X86
450 XMMRegister as_xmm_float_reg() const;
451 XMMRegister as_xmm_double_reg() const;
452 // for compatibility with RInfo
453 int fpu () const { return lo_reg_half(); }
454 #endif
455 #if defined(SPARC) || defined(ARM) || defined(PPC) || defined(AARCH64)
456 FloatRegister as_float_reg () const;
457 FloatRegister as_double_reg () const;
458 #endif
459
460 jint as_jint() const { return as_constant_ptr()->as_jint(); }
461 jlong as_jlong() const { return as_constant_ptr()->as_jlong(); }
462 jfloat as_jfloat() const { return as_constant_ptr()->as_jfloat(); }
463 jdouble as_jdouble() const { return as_constant_ptr()->as_jdouble(); }
464 jobject as_jobject() const { return as_constant_ptr()->as_jobject(); }
465
466 void print() const PRODUCT_RETURN;
467 void print(outputStream* out) const PRODUCT_RETURN;
468 };
469
470
471 inline LIR_OprDesc::OprType as_OprType(BasicType type) {
472 switch (type) {
473 case T_INT: return LIR_OprDesc::int_type;
474 case T_LONG: return LIR_OprDesc::long_type;
475 case T_FLOAT: return LIR_OprDesc::float_type;
476 case T_DOUBLE: return LIR_OprDesc::double_type;
477 case T_OBJECT:
478 case T_ARRAY: return LIR_OprDesc::object_type;
479 case T_ADDRESS: return LIR_OprDesc::address_type;
480 case T_METADATA: return LIR_OprDesc::metadata_type;
481 case T_ILLEGAL: // fall through
482 default: ShouldNotReachHere(); return LIR_OprDesc::unknown_type;
483 }
484 }
485
486 inline BasicType as_BasicType(LIR_OprDesc::OprType t) {
487 switch (t) {
488 case LIR_OprDesc::int_type: return T_INT;
489 case LIR_OprDesc::long_type: return T_LONG;
490 case LIR_OprDesc::float_type: return T_FLOAT;
491 case LIR_OprDesc::double_type: return T_DOUBLE;
492 case LIR_OprDesc::object_type: return T_OBJECT;
493 case LIR_OprDesc::address_type: return T_ADDRESS;
494 case LIR_OprDesc::metadata_type:return T_METADATA;
495 case LIR_OprDesc::unknown_type: // fall through
496 default: ShouldNotReachHere(); return T_ILLEGAL;
497 }
498 }
499
500
501 // LIR_Address
502 class LIR_Address: public LIR_OprPtr {
503 friend class LIR_OpVisitState;
504
505 public:
506 // NOTE: currently these must be the log2 of the scale factor (and
507 // must also be equivalent to the ScaleFactor enum in
508 // assembler_i486.hpp)
509 enum Scale {
510 times_1 = 0,
511 times_2 = 1,
512 times_4 = 2,
513 times_8 = 3
514 };
515
516 private:
517 LIR_Opr _base;
518 LIR_Opr _index;
519 Scale _scale;
520 intx _disp;
521 BasicType _type;
522
523 public:
524 LIR_Address(LIR_Opr base, LIR_Opr index, BasicType type):
525 _base(base)
526 , _index(index)
527 , _scale(times_1)
528 , _type(type)
529 , _disp(0) { verify(); }
530
531 LIR_Address(LIR_Opr base, intx disp, BasicType type):
532 _base(base)
533 , _index(LIR_OprDesc::illegalOpr())
534 , _scale(times_1)
535 , _type(type)
536 , _disp(disp) { verify(); }
537
538 LIR_Address(LIR_Opr base, BasicType type):
539 _base(base)
540 , _index(LIR_OprDesc::illegalOpr())
541 , _scale(times_1)
542 , _type(type)
543 , _disp(0) { verify(); }
544
545 #if defined(X86) || defined(ARM) || defined(AARCH64)
546 LIR_Address(LIR_Opr base, LIR_Opr index, Scale scale, intx disp, BasicType type):
547 _base(base)
548 , _index(index)
549 , _scale(scale)
550 , _type(type)
551 , _disp(disp) { verify(); }
552 #endif // X86 || ARM
553
554 LIR_Opr base() const { return _base; }
555 LIR_Opr index() const { return _index; }
556 Scale scale() const { return _scale; }
557 intx disp() const { return _disp; }
558
559 bool equals(LIR_Address* other) const { return base() == other->base() && index() == other->index() && disp() == other->disp() && scale() == other->scale(); }
560
561 virtual LIR_Address* as_address() { return this; }
562 virtual BasicType type() const { return _type; }
563 virtual void print_value_on(outputStream* out) const PRODUCT_RETURN;
564
565 void verify0() const PRODUCT_RETURN;
566 #if defined(LIR_ADDRESS_PD_VERIFY) && !defined(PRODUCT)
567 void pd_verify() const;
568 void verify() const { pd_verify(); }
569 #else
570 void verify() const { verify0(); }
571 #endif
572
573 static Scale scale(BasicType type);
574 };
575
576
577 // operand factory
578 class LIR_OprFact: public AllStatic {
579 public:
580
581 static LIR_Opr illegalOpr;
582
583 static LIR_Opr single_cpu(int reg) {
584 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
585 LIR_OprDesc::int_type |
586 LIR_OprDesc::cpu_register |
587 LIR_OprDesc::single_size);
588 }
589 static LIR_Opr single_cpu_oop(int reg) {
590 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
591 LIR_OprDesc::object_type |
592 LIR_OprDesc::cpu_register |
593 LIR_OprDesc::single_size);
594 }
595 static LIR_Opr single_cpu_address(int reg) {
596 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
597 LIR_OprDesc::address_type |
598 LIR_OprDesc::cpu_register |
599 LIR_OprDesc::single_size);
600 }
601 static LIR_Opr single_cpu_metadata(int reg) {
602 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
603 LIR_OprDesc::metadata_type |
604 LIR_OprDesc::cpu_register |
605 LIR_OprDesc::single_size);
606 }
607 static LIR_Opr double_cpu(int reg1, int reg2) {
608 LP64_ONLY(assert(reg1 == reg2, "must be identical"));
609 return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) |
610 (reg2 << LIR_OprDesc::reg2_shift) |
611 LIR_OprDesc::long_type |
612 LIR_OprDesc::cpu_register |
613 LIR_OprDesc::double_size);
614 }
615
616 static LIR_Opr single_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
617 LIR_OprDesc::float_type |
618 LIR_OprDesc::fpu_register |
619 LIR_OprDesc::single_size); }
620 #if defined(ARM32)
621 static LIR_Opr double_fpu(int reg1, int reg2) { return (LIR_Opr)((reg1 << LIR_OprDesc::reg1_shift) | (reg2 << LIR_OprDesc::reg2_shift) | LIR_OprDesc::double_type | LIR_OprDesc::fpu_register | LIR_OprDesc::double_size); }
622 static LIR_Opr single_softfp(int reg) { return (LIR_Opr)((reg << LIR_OprDesc::reg1_shift) | LIR_OprDesc::float_type | LIR_OprDesc::cpu_register | LIR_OprDesc::single_size); }
623 static LIR_Opr double_softfp(int reg1, int reg2) { return (LIR_Opr)((reg1 << LIR_OprDesc::reg1_shift) | (reg2 << LIR_OprDesc::reg2_shift) | LIR_OprDesc::double_type | LIR_OprDesc::cpu_register | LIR_OprDesc::double_size); }
624 #endif
625 #ifdef SPARC
626 static LIR_Opr double_fpu(int reg1, int reg2) { return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) |
627 (reg2 << LIR_OprDesc::reg2_shift) |
628 LIR_OprDesc::double_type |
629 LIR_OprDesc::fpu_register |
630 LIR_OprDesc::double_size); }
631 #endif
632 #if defined(X86) || defined(AARCH64)
633 static LIR_Opr double_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
634 (reg << LIR_OprDesc::reg2_shift) |
635 LIR_OprDesc::double_type |
636 LIR_OprDesc::fpu_register |
637 LIR_OprDesc::double_size); }
638
639 static LIR_Opr single_xmm(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
640 LIR_OprDesc::float_type |
641 LIR_OprDesc::fpu_register |
642 LIR_OprDesc::single_size |
643 LIR_OprDesc::is_xmm_mask); }
644 static LIR_Opr double_xmm(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
645 (reg << LIR_OprDesc::reg2_shift) |
646 LIR_OprDesc::double_type |
647 LIR_OprDesc::fpu_register |
648 LIR_OprDesc::double_size |
649 LIR_OprDesc::is_xmm_mask); }
650 #endif // X86
651 #ifdef PPC
652 static LIR_Opr double_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
653 (reg << LIR_OprDesc::reg2_shift) |
654 LIR_OprDesc::double_type |
655 LIR_OprDesc::fpu_register |
656 LIR_OprDesc::double_size); }
657 static LIR_Opr single_softfp(int reg) { return (LIR_Opr)((reg << LIR_OprDesc::reg1_shift) |
658 LIR_OprDesc::float_type |
659 LIR_OprDesc::cpu_register |
660 LIR_OprDesc::single_size); }
661 static LIR_Opr double_softfp(int reg1, int reg2) { return (LIR_Opr)((reg2 << LIR_OprDesc::reg1_shift) |
662 (reg1 << LIR_OprDesc::reg2_shift) |
663 LIR_OprDesc::double_type |
664 LIR_OprDesc::cpu_register |
665 LIR_OprDesc::double_size); }
666 #endif // PPC
667
668 static LIR_Opr virtual_register(int index, BasicType type) {
669 LIR_Opr res;
670 switch (type) {
671 case T_OBJECT: // fall through
672 case T_ARRAY:
673 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
674 LIR_OprDesc::object_type |
675 LIR_OprDesc::cpu_register |
676 LIR_OprDesc::single_size |
677 LIR_OprDesc::virtual_mask);
678 break;
679
680 case T_METADATA:
681 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
682 LIR_OprDesc::metadata_type|
683 LIR_OprDesc::cpu_register |
684 LIR_OprDesc::single_size |
685 LIR_OprDesc::virtual_mask);
686 break;
687
688 case T_INT:
689 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
690 LIR_OprDesc::int_type |
691 LIR_OprDesc::cpu_register |
692 LIR_OprDesc::single_size |
693 LIR_OprDesc::virtual_mask);
694 break;
695
696 case T_ADDRESS:
697 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
698 LIR_OprDesc::address_type |
699 LIR_OprDesc::cpu_register |
700 LIR_OprDesc::single_size |
701 LIR_OprDesc::virtual_mask);
702 break;
703
704 case T_LONG:
705 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
706 LIR_OprDesc::long_type |
707 LIR_OprDesc::cpu_register |
708 LIR_OprDesc::double_size |
709 LIR_OprDesc::virtual_mask);
710 break;
711
712 #ifdef __SOFTFP__
713 case T_FLOAT:
714 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
715 LIR_OprDesc::float_type |
716 LIR_OprDesc::cpu_register |
717 LIR_OprDesc::single_size |
718 LIR_OprDesc::virtual_mask);
719 break;
720 case T_DOUBLE:
721 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
722 LIR_OprDesc::double_type |
723 LIR_OprDesc::cpu_register |
724 LIR_OprDesc::double_size |
725 LIR_OprDesc::virtual_mask);
726 break;
727 #else // __SOFTFP__
728 case T_FLOAT:
729 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
730 LIR_OprDesc::float_type |
731 LIR_OprDesc::fpu_register |
732 LIR_OprDesc::single_size |
733 LIR_OprDesc::virtual_mask);
734 break;
735
736 case
737 T_DOUBLE: res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
738 LIR_OprDesc::double_type |
739 LIR_OprDesc::fpu_register |
740 LIR_OprDesc::double_size |
741 LIR_OprDesc::virtual_mask);
742 break;
743 #endif // __SOFTFP__
744 default: ShouldNotReachHere(); res = illegalOpr;
745 }
746
747 #ifdef ASSERT
748 res->validate_type();
749 assert(res->vreg_number() == index, "conversion check");
750 assert(index >= LIR_OprDesc::vreg_base, "must start at vreg_base");
751 assert(index <= (max_jint >> LIR_OprDesc::data_shift), "index is too big");
752
753 // old-style calculation; check if old and new method are equal
754 LIR_OprDesc::OprType t = as_OprType(type);
755 #ifdef __SOFTFP__
756 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
757 t |
758 LIR_OprDesc::cpu_register |
759 LIR_OprDesc::size_for(type) | LIR_OprDesc::virtual_mask);
760 #else // __SOFTFP__
761 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | t |
762 ((type == T_FLOAT || type == T_DOUBLE) ? LIR_OprDesc::fpu_register : LIR_OprDesc::cpu_register) |
763 LIR_OprDesc::size_for(type) | LIR_OprDesc::virtual_mask);
764 assert(res == old_res, "old and new method not equal");
765 #endif // __SOFTFP__
766 #endif // ASSERT
767
768 return res;
769 }
770
771 // 'index' is computed by FrameMap::local_stack_pos(index); do not use other parameters as
772 // the index is platform independent; a double stack useing indeces 2 and 3 has always
773 // index 2.
774 static LIR_Opr stack(int index, BasicType type) {
775 LIR_Opr res;
776 switch (type) {
777 case T_OBJECT: // fall through
778 case T_ARRAY:
779 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
780 LIR_OprDesc::object_type |
781 LIR_OprDesc::stack_value |
782 LIR_OprDesc::single_size);
783 break;
784
785 case T_METADATA:
786 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
787 LIR_OprDesc::metadata_type |
788 LIR_OprDesc::stack_value |
789 LIR_OprDesc::single_size);
790 break;
791 case T_INT:
792 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
793 LIR_OprDesc::int_type |
794 LIR_OprDesc::stack_value |
795 LIR_OprDesc::single_size);
796 break;
797
798 case T_ADDRESS:
799 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
800 LIR_OprDesc::address_type |
801 LIR_OprDesc::stack_value |
802 LIR_OprDesc::single_size);
803 break;
804
805 case T_LONG:
806 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
807 LIR_OprDesc::long_type |
808 LIR_OprDesc::stack_value |
809 LIR_OprDesc::double_size);
810 break;
811
812 case T_FLOAT:
813 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
814 LIR_OprDesc::float_type |
815 LIR_OprDesc::stack_value |
816 LIR_OprDesc::single_size);
817 break;
818 case T_DOUBLE:
819 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
820 LIR_OprDesc::double_type |
821 LIR_OprDesc::stack_value |
822 LIR_OprDesc::double_size);
823 break;
824
825 default: ShouldNotReachHere(); res = illegalOpr;
826 }
827
828 #ifdef ASSERT
829 assert(index >= 0, "index must be positive");
830 assert(index <= (max_jint >> LIR_OprDesc::data_shift), "index is too big");
831
832 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
833 LIR_OprDesc::stack_value |
834 as_OprType(type) |
835 LIR_OprDesc::size_for(type));
836 assert(res == old_res, "old and new method not equal");
837 #endif
838
839 return res;
840 }
841
842 static LIR_Opr intConst(jint i) { return (LIR_Opr)(new LIR_Const(i)); }
843 static LIR_Opr longConst(jlong l) { return (LIR_Opr)(new LIR_Const(l)); }
844 static LIR_Opr floatConst(jfloat f) { return (LIR_Opr)(new LIR_Const(f)); }
845 static LIR_Opr doubleConst(jdouble d) { return (LIR_Opr)(new LIR_Const(d)); }
846 static LIR_Opr oopConst(jobject o) { return (LIR_Opr)(new LIR_Const(o)); }
847 static LIR_Opr address(LIR_Address* a) { return (LIR_Opr)a; }
848 static LIR_Opr intptrConst(void* p) { return (LIR_Opr)(new LIR_Const(p)); }
849 static LIR_Opr intptrConst(intptr_t v) { return (LIR_Opr)(new LIR_Const((void*)v)); }
850 static LIR_Opr illegal() { return (LIR_Opr)-1; }
851 static LIR_Opr addressConst(jint i) { return (LIR_Opr)(new LIR_Const(i, true)); }
852 static LIR_Opr metadataConst(Metadata* m) { return (LIR_Opr)(new LIR_Const(m)); }
853
854 static LIR_Opr value_type(ValueType* type);
855 static LIR_Opr dummy_value_type(ValueType* type);
856 };
857
858
859 //-------------------------------------------------------------------------------
860 // LIR Instructions
861 //-------------------------------------------------------------------------------
862 //
863 // Note:
864 // - every instruction has a result operand
865 // - every instruction has an CodeEmitInfo operand (can be revisited later)
866 // - every instruction has a LIR_OpCode operand
867 // - LIR_OpN, means an instruction that has N input operands
868 //
869 // class hierarchy:
870 //
871 class LIR_Op;
872 class LIR_Op0;
873 class LIR_OpLabel;
874 class LIR_Op1;
875 class LIR_OpBranch;
876 class LIR_OpConvert;
877 class LIR_OpAllocObj;
878 class LIR_OpRoundFP;
879 class LIR_Op2;
880 class LIR_OpDelay;
881 class LIR_Op3;
882 class LIR_OpAllocArray;
883 class LIR_OpCall;
884 class LIR_OpJavaCall;
885 class LIR_OpRTCall;
886 class LIR_OpArrayCopy;
887 class LIR_OpUpdateCRC32;
888 class LIR_OpLock;
889 class LIR_OpTypeCheck;
890 class LIR_OpCompareAndSwap;
891 class LIR_OpProfileCall;
892 class LIR_OpProfileType;
893 #ifdef ASSERT
894 class LIR_OpAssert;
895 #endif
896
897 // LIR operation codes
898 enum LIR_Code {
899 lir_none
900 , begin_op0
901 , lir_word_align
902 , lir_label
903 , lir_nop
904 , lir_backwardbranch_target
905 , lir_std_entry
906 , lir_osr_entry
907 , lir_build_frame
908 , lir_fpop_raw
909 , lir_24bit_FPU
910 , lir_reset_FPU
911 , lir_breakpoint
912 , lir_rtcall
913 , lir_membar
914 , lir_membar_acquire
915 , lir_membar_release
916 , lir_membar_loadload
917 , lir_membar_storestore
918 , lir_membar_loadstore
919 , lir_membar_storeload
920 , lir_get_thread
921 , end_op0
922 , begin_op1
923 , lir_fxch
924 , lir_fld
925 , lir_ffree
926 , lir_push
927 , lir_pop
928 , lir_null_check
929 , lir_return
930 , lir_leal
931 , lir_neg
932 , lir_branch
933 , lir_cond_float_branch
934 , lir_move
935 , lir_convert
936 , lir_alloc_object
937 , lir_monaddr
938 , lir_roundfp
939 , lir_safepoint
940 , lir_pack64
941 , lir_unpack64
942 , lir_unwind
943 , end_op1
944 , begin_op2
945 , lir_cmp
946 , lir_cmp_l2i
947 , lir_ucmp_fd2i
948 , lir_cmp_fd2i
949 , lir_cmove
950 , lir_add
951 , lir_sub
952 , lir_mul
953 , lir_mul_strictfp
954 , lir_div
955 , lir_div_strictfp
956 , lir_rem
957 , lir_sqrt
958 , lir_abs
959 , lir_tan
960 , lir_log10
961 , lir_pow
962 , lir_logic_and
963 , lir_logic_or
964 , lir_logic_xor
965 , lir_shl
966 , lir_shr
967 , lir_ushr
968 , lir_alloc_array
969 , lir_throw
970 , lir_compare_to
971 , lir_xadd
972 , lir_xchg
973 , end_op2
974 , begin_op3
975 , lir_idiv
976 , lir_irem
977 , end_op3
978 , begin_opJavaCall
979 , lir_static_call
980 , lir_optvirtual_call
981 , lir_icvirtual_call
982 , lir_virtual_call
983 , lir_dynamic_call
984 , end_opJavaCall
985 , begin_opArrayCopy
986 , lir_arraycopy
987 , end_opArrayCopy
988 , begin_opUpdateCRC32
989 , lir_updatecrc32
990 , end_opUpdateCRC32
991 , begin_opLock
992 , lir_lock
993 , lir_unlock
994 , end_opLock
995 , begin_delay_slot
996 , lir_delay_slot
997 , end_delay_slot
998 , begin_opTypeCheck
999 , lir_instanceof
1000 , lir_checkcast
1001 , lir_store_check
1002 , end_opTypeCheck
1003 , begin_opCompareAndSwap
1004 , lir_cas_long
1005 , lir_cas_obj
1006 , lir_cas_int
1007 , end_opCompareAndSwap
1008 , begin_opMDOProfile
1009 , lir_profile_call
1010 , lir_profile_type
1011 , end_opMDOProfile
1012 , begin_opAssert
1013 , lir_assert
1014 , end_opAssert
1015 };
1016
1017
1018 enum LIR_Condition {
1019 lir_cond_equal
1020 , lir_cond_notEqual
1021 , lir_cond_less
1022 , lir_cond_lessEqual
1023 , lir_cond_greaterEqual
1024 , lir_cond_greater
1025 , lir_cond_belowEqual
1026 , lir_cond_aboveEqual
1027 , lir_cond_always
1028 , lir_cond_unknown = -1
1029 };
1030
1031
1032 enum LIR_PatchCode {
1033 lir_patch_none,
1034 lir_patch_low,
1035 lir_patch_high,
1036 lir_patch_normal
1037 };
1038
1039
1040 enum LIR_MoveKind {
1041 lir_move_normal,
1042 lir_move_volatile,
1043 lir_move_unaligned,
1044 lir_move_wide,
1045 lir_move_max_flag
1046 };
1047
1048
1049 // --------------------------------------------------
1050 // LIR_Op
1051 // --------------------------------------------------
1052 class LIR_Op: public CompilationResourceObj {
1053 friend class LIR_OpVisitState;
1054
1055 #ifdef ASSERT
1056 private:
1057 const char * _file;
1058 int _line;
1059 #endif
1060
1061 protected:
1062 LIR_Opr _result;
1063 unsigned short _code;
1064 unsigned short _flags;
1065 CodeEmitInfo* _info;
1066 int _id; // value id for register allocation
1067 int _fpu_pop_count;
1068 Instruction* _source; // for debugging
1069
1070 static void print_condition(outputStream* out, LIR_Condition cond) PRODUCT_RETURN;
1071
1072 protected:
1073 static bool is_in_range(LIR_Code test, LIR_Code start, LIR_Code end) { return start < test && test < end; }
1074
1075 public:
1076 LIR_Op()
1077 : _result(LIR_OprFact::illegalOpr)
1078 , _code(lir_none)
1079 , _flags(0)
1080 , _info(NULL)
1081 #ifdef ASSERT
1082 , _file(NULL)
1083 , _line(0)
1084 #endif
1085 , _fpu_pop_count(0)
1086 , _source(NULL)
1087 , _id(-1) {}
1088
1089 LIR_Op(LIR_Code code, LIR_Opr result, CodeEmitInfo* info)
1090 : _result(result)
1091 , _code(code)
1092 , _flags(0)
1093 , _info(info)
1094 #ifdef ASSERT
1095 , _file(NULL)
1096 , _line(0)
1097 #endif
1098 , _fpu_pop_count(0)
1099 , _source(NULL)
1100 , _id(-1) {}
1101
1102 CodeEmitInfo* info() const { return _info; }
1103 LIR_Code code() const { return (LIR_Code)_code; }
1104 LIR_Opr result_opr() const { return _result; }
1105 void set_result_opr(LIR_Opr opr) { _result = opr; }
1106
1107 #ifdef ASSERT
1108 void set_file_and_line(const char * file, int line) {
1109 _file = file;
1110 _line = line;
1111 }
1112 #endif
1113
1114 virtual const char * name() const PRODUCT_RETURN0;
1115
1116 int id() const { return _id; }
1117 void set_id(int id) { _id = id; }
1118
1119 // FPU stack simulation helpers -- only used on Intel
1120 void set_fpu_pop_count(int count) { assert(count >= 0 && count <= 1, "currently only 0 and 1 are valid"); _fpu_pop_count = count; }
1121 int fpu_pop_count() const { return _fpu_pop_count; }
1122 bool pop_fpu_stack() { return _fpu_pop_count > 0; }
1123
1124 Instruction* source() const { return _source; }
1125 void set_source(Instruction* ins) { _source = ins; }
1126
1127 virtual void emit_code(LIR_Assembler* masm) = 0;
1128 virtual void print_instr(outputStream* out) const = 0;
1129 virtual void print_on(outputStream* st) const PRODUCT_RETURN;
1130
1131 virtual bool is_patching() { return false; }
1132 virtual LIR_OpCall* as_OpCall() { return NULL; }
1133 virtual LIR_OpJavaCall* as_OpJavaCall() { return NULL; }
1134 virtual LIR_OpLabel* as_OpLabel() { return NULL; }
1135 virtual LIR_OpDelay* as_OpDelay() { return NULL; }
1136 virtual LIR_OpLock* as_OpLock() { return NULL; }
1137 virtual LIR_OpAllocArray* as_OpAllocArray() { return NULL; }
1138 virtual LIR_OpAllocObj* as_OpAllocObj() { return NULL; }
1139 virtual LIR_OpRoundFP* as_OpRoundFP() { return NULL; }
1140 virtual LIR_OpBranch* as_OpBranch() { return NULL; }
1141 virtual LIR_OpRTCall* as_OpRTCall() { return NULL; }
1142 virtual LIR_OpConvert* as_OpConvert() { return NULL; }
1143 virtual LIR_Op0* as_Op0() { return NULL; }
1144 virtual LIR_Op1* as_Op1() { return NULL; }
1145 virtual LIR_Op2* as_Op2() { return NULL; }
1146 virtual LIR_Op3* as_Op3() { return NULL; }
1147 virtual LIR_OpArrayCopy* as_OpArrayCopy() { return NULL; }
1148 virtual LIR_OpUpdateCRC32* as_OpUpdateCRC32() { return NULL; }
1149 virtual LIR_OpTypeCheck* as_OpTypeCheck() { return NULL; }
1150 virtual LIR_OpCompareAndSwap* as_OpCompareAndSwap() { return NULL; }
1151 virtual LIR_OpProfileCall* as_OpProfileCall() { return NULL; }
1152 virtual LIR_OpProfileType* as_OpProfileType() { return NULL; }
1153 #ifdef ASSERT
1154 virtual LIR_OpAssert* as_OpAssert() { return NULL; }
1155 #endif
1156
1157 virtual void verify() const {}
1158 };
1159
1160 // for calls
1161 class LIR_OpCall: public LIR_Op {
1162 friend class LIR_OpVisitState;
1163
1164 protected:
1165 address _addr;
1166 LIR_OprList* _arguments;
1167 protected:
1168 LIR_OpCall(LIR_Code code, address addr, LIR_Opr result,
1169 LIR_OprList* arguments, CodeEmitInfo* info = NULL)
1170 : LIR_Op(code, result, info)
1171 , _arguments(arguments)
1172 , _addr(addr) {}
1173
1174 public:
1175 address addr() const { return _addr; }
1176 const LIR_OprList* arguments() const { return _arguments; }
1177 virtual LIR_OpCall* as_OpCall() { return this; }
1178 };
1179
1180
1181 // --------------------------------------------------
1182 // LIR_OpJavaCall
1183 // --------------------------------------------------
1184 class LIR_OpJavaCall: public LIR_OpCall {
1185 friend class LIR_OpVisitState;
1186
1187 private:
1188 ciMethod* _method;
1189 LIR_Opr _receiver;
1190 LIR_Opr _method_handle_invoke_SP_save_opr; // Used in LIR_OpVisitState::visit to store the reference to FrameMap::method_handle_invoke_SP_save_opr.
1191
1192 public:
1193 LIR_OpJavaCall(LIR_Code code, ciMethod* method,
1194 LIR_Opr receiver, LIR_Opr result,
1195 address addr, LIR_OprList* arguments,
1196 CodeEmitInfo* info)
1197 : LIR_OpCall(code, addr, result, arguments, info)
1198 , _receiver(receiver)
1199 , _method(method)
1200 , _method_handle_invoke_SP_save_opr(LIR_OprFact::illegalOpr)
1201 { assert(is_in_range(code, begin_opJavaCall, end_opJavaCall), "code check"); }
1202
1203 LIR_OpJavaCall(LIR_Code code, ciMethod* method,
1204 LIR_Opr receiver, LIR_Opr result, intptr_t vtable_offset,
1205 LIR_OprList* arguments, CodeEmitInfo* info)
1206 : LIR_OpCall(code, (address)vtable_offset, result, arguments, info)
1207 , _receiver(receiver)
1208 , _method(method)
1209 , _method_handle_invoke_SP_save_opr(LIR_OprFact::illegalOpr)
1210 { assert(is_in_range(code, begin_opJavaCall, end_opJavaCall), "code check"); }
1211
1212 LIR_Opr receiver() const { return _receiver; }
1213 ciMethod* method() const { return _method; }
1214
1215 // JSR 292 support.
1216 bool is_invokedynamic() const { return code() == lir_dynamic_call; }
1217 bool is_method_handle_invoke() const {
1218 return method()->is_compiled_lambda_form() || // Java-generated lambda form
1219 method()->is_method_handle_intrinsic(); // JVM-generated MH intrinsic
1220 }
1221
1222 intptr_t vtable_offset() const {
1223 assert(_code == lir_virtual_call, "only have vtable for real vcall");
1224 return (intptr_t) addr();
1225 }
1226
1227 virtual void emit_code(LIR_Assembler* masm);
1228 virtual LIR_OpJavaCall* as_OpJavaCall() { return this; }
1229 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1230 };
1231
1232 // --------------------------------------------------
1233 // LIR_OpLabel
1234 // --------------------------------------------------
1235 // Location where a branch can continue
1236 class LIR_OpLabel: public LIR_Op {
1237 friend class LIR_OpVisitState;
1238
1239 private:
1240 Label* _label;
1241 public:
1242 LIR_OpLabel(Label* lbl)
1243 : LIR_Op(lir_label, LIR_OprFact::illegalOpr, NULL)
1244 , _label(lbl) {}
1245 Label* label() const { return _label; }
1246
1247 virtual void emit_code(LIR_Assembler* masm);
1248 virtual LIR_OpLabel* as_OpLabel() { return this; }
1249 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1250 };
1251
1252 // LIR_OpArrayCopy
1253 class LIR_OpArrayCopy: public LIR_Op {
1254 friend class LIR_OpVisitState;
1255
1256 private:
1257 ArrayCopyStub* _stub;
1258 LIR_Opr _src;
1259 LIR_Opr _src_pos;
1260 LIR_Opr _dst;
1261 LIR_Opr _dst_pos;
1262 LIR_Opr _length;
1263 LIR_Opr _tmp;
1264 ciArrayKlass* _expected_type;
1265 int _flags;
1266
1267 public:
1268 enum Flags {
1269 src_null_check = 1 << 0,
1270 dst_null_check = 1 << 1,
1271 src_pos_positive_check = 1 << 2,
1272 dst_pos_positive_check = 1 << 3,
1273 length_positive_check = 1 << 4,
1274 src_range_check = 1 << 5,
1275 dst_range_check = 1 << 6,
1276 type_check = 1 << 7,
1277 overlapping = 1 << 8,
1278 unaligned = 1 << 9,
1279 src_objarray = 1 << 10,
1280 dst_objarray = 1 << 11,
1281 all_flags = (1 << 12) - 1
1282 };
1283
1284 LIR_OpArrayCopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, LIR_Opr tmp,
1285 ciArrayKlass* expected_type, int flags, CodeEmitInfo* info);
1286
1287 LIR_Opr src() const { return _src; }
1288 LIR_Opr src_pos() const { return _src_pos; }
1289 LIR_Opr dst() const { return _dst; }
1290 LIR_Opr dst_pos() const { return _dst_pos; }
1291 LIR_Opr length() const { return _length; }
1292 LIR_Opr tmp() const { return _tmp; }
1293 int flags() const { return _flags; }
1294 ciArrayKlass* expected_type() const { return _expected_type; }
1295 ArrayCopyStub* stub() const { return _stub; }
1296
1297 virtual void emit_code(LIR_Assembler* masm);
1298 virtual LIR_OpArrayCopy* as_OpArrayCopy() { return this; }
1299 void print_instr(outputStream* out) const PRODUCT_RETURN;
1300 };
1301
1302 // LIR_OpUpdateCRC32
1303 class LIR_OpUpdateCRC32: public LIR_Op {
1304 friend class LIR_OpVisitState;
1305
1306 private:
1307 LIR_Opr _crc;
1308 LIR_Opr _val;
1309
1310 public:
1311
1312 LIR_OpUpdateCRC32(LIR_Opr crc, LIR_Opr val, LIR_Opr res);
1313
1314 LIR_Opr crc() const { return _crc; }
1315 LIR_Opr val() const { return _val; }
1316
1317 virtual void emit_code(LIR_Assembler* masm);
1318 virtual LIR_OpUpdateCRC32* as_OpUpdateCRC32() { return this; }
1319 void print_instr(outputStream* out) const PRODUCT_RETURN;
1320 };
1321
1322 // --------------------------------------------------
1323 // LIR_Op0
1324 // --------------------------------------------------
1325 class LIR_Op0: public LIR_Op {
1326 friend class LIR_OpVisitState;
1327
1328 public:
1329 LIR_Op0(LIR_Code code)
1330 : LIR_Op(code, LIR_OprFact::illegalOpr, NULL) { assert(is_in_range(code, begin_op0, end_op0), "code check"); }
1331 LIR_Op0(LIR_Code code, LIR_Opr result, CodeEmitInfo* info = NULL)
1332 : LIR_Op(code, result, info) { assert(is_in_range(code, begin_op0, end_op0), "code check"); }
1333
1334 virtual void emit_code(LIR_Assembler* masm);
1335 virtual LIR_Op0* as_Op0() { return this; }
1336 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1337 };
1338
1339
1340 // --------------------------------------------------
1341 // LIR_Op1
1342 // --------------------------------------------------
1343
1344 class LIR_Op1: public LIR_Op {
1345 friend class LIR_OpVisitState;
1346
1347 protected:
1348 LIR_Opr _opr; // input operand
1349 BasicType _type; // Operand types
1350 LIR_PatchCode _patch; // only required with patchin (NEEDS_CLEANUP: do we want a special instruction for patching?)
1351
1352 static void print_patch_code(outputStream* out, LIR_PatchCode code);
1353
1354 void set_kind(LIR_MoveKind kind) {
1355 assert(code() == lir_move, "must be");
1356 _flags = kind;
1357 }
1358
1359 public:
1360 LIR_Op1(LIR_Code code, LIR_Opr opr, LIR_Opr result = LIR_OprFact::illegalOpr, BasicType type = T_ILLEGAL, LIR_PatchCode patch = lir_patch_none, CodeEmitInfo* info = NULL)
1361 : LIR_Op(code, result, info)
1362 , _opr(opr)
1363 , _patch(patch)
1364 , _type(type) { assert(is_in_range(code, begin_op1, end_op1), "code check"); }
1365
1366 LIR_Op1(LIR_Code code, LIR_Opr opr, LIR_Opr result, BasicType type, LIR_PatchCode patch, CodeEmitInfo* info, LIR_MoveKind kind)
1367 : LIR_Op(code, result, info)
1368 , _opr(opr)
1369 , _patch(patch)
1370 , _type(type) {
1371 assert(code == lir_move, "must be");
1372 set_kind(kind);
1373 }
1374
1375 LIR_Op1(LIR_Code code, LIR_Opr opr, CodeEmitInfo* info)
1376 : LIR_Op(code, LIR_OprFact::illegalOpr, info)
1377 , _opr(opr)
1378 , _patch(lir_patch_none)
1379 , _type(T_ILLEGAL) { assert(is_in_range(code, begin_op1, end_op1), "code check"); }
1380
1381 LIR_Opr in_opr() const { return _opr; }
1382 LIR_PatchCode patch_code() const { return _patch; }
1383 BasicType type() const { return _type; }
1384
1385 LIR_MoveKind move_kind() const {
1386 assert(code() == lir_move, "must be");
1387 return (LIR_MoveKind)_flags;
1388 }
1389
1390 virtual bool is_patching() { return _patch != lir_patch_none; }
1391 virtual void emit_code(LIR_Assembler* masm);
1392 virtual LIR_Op1* as_Op1() { return this; }
1393 virtual const char * name() const PRODUCT_RETURN0;
1394
1395 void set_in_opr(LIR_Opr opr) { _opr = opr; }
1396
1397 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1398 virtual void verify() const;
1399 };
1400
1401
1402 // for runtime calls
1403 class LIR_OpRTCall: public LIR_OpCall {
1404 friend class LIR_OpVisitState;
1405
1406 private:
1407 LIR_Opr _tmp;
1408 public:
1409 LIR_OpRTCall(address addr, LIR_Opr tmp,
1410 LIR_Opr result, LIR_OprList* arguments, CodeEmitInfo* info = NULL)
1411 : LIR_OpCall(lir_rtcall, addr, result, arguments, info)
1412 , _tmp(tmp) {}
1413
1414 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1415 virtual void emit_code(LIR_Assembler* masm);
1416 virtual LIR_OpRTCall* as_OpRTCall() { return this; }
1417
1418 LIR_Opr tmp() const { return _tmp; }
1419
1420 virtual void verify() const;
1421 };
1422
1423
1424 class LIR_OpBranch: public LIR_Op {
1425 friend class LIR_OpVisitState;
1426
1427 private:
1428 LIR_Condition _cond;
1429 BasicType _type;
1430 Label* _label;
1431 BlockBegin* _block; // if this is a branch to a block, this is the block
1432 BlockBegin* _ublock; // if this is a float-branch, this is the unorderd block
1433 CodeStub* _stub; // if this is a branch to a stub, this is the stub
1434
1435 public:
1436 LIR_OpBranch(LIR_Condition cond, BasicType type, Label* lbl)
1437 : LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*) NULL)
1438 , _cond(cond)
1439 , _type(type)
1440 , _label(lbl)
1441 , _block(NULL)
1442 , _ublock(NULL)
1443 , _stub(NULL) { }
1444
1445 LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block);
1446 LIR_OpBranch(LIR_Condition cond, BasicType type, CodeStub* stub);
1447
1448 // for unordered comparisons
1449 LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* ublock);
1450
1451 LIR_Condition cond() const { return _cond; }
1452 BasicType type() const { return _type; }
1453 Label* label() const { return _label; }
1454 BlockBegin* block() const { return _block; }
1455 BlockBegin* ublock() const { return _ublock; }
1456 CodeStub* stub() const { return _stub; }
1457
1458 void change_block(BlockBegin* b);
1459 void change_ublock(BlockBegin* b);
1460 void negate_cond();
1461
1462 virtual void emit_code(LIR_Assembler* masm);
1463 virtual LIR_OpBranch* as_OpBranch() { return this; }
1464 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1465 };
1466
1467
1468 class ConversionStub;
1469
1470 class LIR_OpConvert: public LIR_Op1 {
1471 friend class LIR_OpVisitState;
1472
1473 private:
1474 Bytecodes::Code _bytecode;
1475 ConversionStub* _stub;
1476 #ifdef PPC
1477 LIR_Opr _tmp1;
1478 LIR_Opr _tmp2;
1479 #endif
1480
1481 public:
1482 LIR_OpConvert(Bytecodes::Code code, LIR_Opr opr, LIR_Opr result, ConversionStub* stub)
1483 : LIR_Op1(lir_convert, opr, result)
1484 , _stub(stub)
1485 #ifdef PPC
1486 , _tmp1(LIR_OprDesc::illegalOpr())
1487 , _tmp2(LIR_OprDesc::illegalOpr())
1488 #endif
1489 , _bytecode(code) {}
1490
1491 #ifdef PPC
1492 LIR_OpConvert(Bytecodes::Code code, LIR_Opr opr, LIR_Opr result, ConversionStub* stub
1493 ,LIR_Opr tmp1, LIR_Opr tmp2)
1494 : LIR_Op1(lir_convert, opr, result)
1495 , _stub(stub)
1496 , _tmp1(tmp1)
1497 , _tmp2(tmp2)
1498 , _bytecode(code) {}
1499 #endif
1500
1501 Bytecodes::Code bytecode() const { return _bytecode; }
1502 ConversionStub* stub() const { return _stub; }
1503 #ifdef PPC
1504 LIR_Opr tmp1() const { return _tmp1; }
1505 LIR_Opr tmp2() const { return _tmp2; }
1506 #endif
1507
1508 virtual void emit_code(LIR_Assembler* masm);
1509 virtual LIR_OpConvert* as_OpConvert() { return this; }
1510 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1511
1512 static void print_bytecode(outputStream* out, Bytecodes::Code code) PRODUCT_RETURN;
1513 };
1514
1515
1516 // LIR_OpAllocObj
1517 class LIR_OpAllocObj : public LIR_Op1 {
1518 friend class LIR_OpVisitState;
1519
1520 private:
1521 LIR_Opr _tmp1;
1522 LIR_Opr _tmp2;
1523 LIR_Opr _tmp3;
1524 LIR_Opr _tmp4;
1525 int _hdr_size;
1526 int _obj_size;
1527 CodeStub* _stub;
1528 bool _init_check;
1529
1530 public:
1531 LIR_OpAllocObj(LIR_Opr klass, LIR_Opr result,
1532 LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4,
1533 int hdr_size, int obj_size, bool init_check, CodeStub* stub)
1534 : LIR_Op1(lir_alloc_object, klass, result)
1535 , _tmp1(t1)
1536 , _tmp2(t2)
1537 , _tmp3(t3)
1538 , _tmp4(t4)
1539 , _hdr_size(hdr_size)
1540 , _obj_size(obj_size)
1541 , _init_check(init_check)
1542 , _stub(stub) { }
1543
1544 LIR_Opr klass() const { return in_opr(); }
1545 LIR_Opr obj() const { return result_opr(); }
1546 LIR_Opr tmp1() const { return _tmp1; }
1547 LIR_Opr tmp2() const { return _tmp2; }
1548 LIR_Opr tmp3() const { return _tmp3; }
1549 LIR_Opr tmp4() const { return _tmp4; }
1550 int header_size() const { return _hdr_size; }
1551 int object_size() const { return _obj_size; }
1552 bool init_check() const { return _init_check; }
1553 CodeStub* stub() const { return _stub; }
1554
1555 virtual void emit_code(LIR_Assembler* masm);
1556 virtual LIR_OpAllocObj * as_OpAllocObj () { return this; }
1557 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1558 };
1559
1560
1561 // LIR_OpRoundFP
1562 class LIR_OpRoundFP : public LIR_Op1 {
1563 friend class LIR_OpVisitState;
1564
1565 private:
1566 LIR_Opr _tmp;
1567
1568 public:
1569 LIR_OpRoundFP(LIR_Opr reg, LIR_Opr stack_loc_temp, LIR_Opr result)
1570 : LIR_Op1(lir_roundfp, reg, result)
1571 , _tmp(stack_loc_temp) {}
1572
1573 LIR_Opr tmp() const { return _tmp; }
1574 virtual LIR_OpRoundFP* as_OpRoundFP() { return this; }
1575 void print_instr(outputStream* out) const PRODUCT_RETURN;
1576 };
1577
1578 // LIR_OpTypeCheck
1579 class LIR_OpTypeCheck: public LIR_Op {
1580 friend class LIR_OpVisitState;
1581
1582 private:
1583 LIR_Opr _object;
1584 LIR_Opr _array;
1585 ciKlass* _klass;
1586 LIR_Opr _tmp1;
1587 LIR_Opr _tmp2;
1588 LIR_Opr _tmp3;
1589 bool _fast_check;
1590 CodeEmitInfo* _info_for_patch;
1591 CodeEmitInfo* _info_for_exception;
1592 CodeStub* _stub;
1593 ciMethod* _profiled_method;
1594 int _profiled_bci;
1595 bool _should_profile;
1596
1597 public:
1598 LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass,
1599 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check,
1600 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub);
1601 LIR_OpTypeCheck(LIR_Code code, LIR_Opr object, LIR_Opr array,
1602 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception);
1603
1604 LIR_Opr object() const { return _object; }
1605 LIR_Opr array() const { assert(code() == lir_store_check, "not valid"); return _array; }
1606 LIR_Opr tmp1() const { return _tmp1; }
1607 LIR_Opr tmp2() const { return _tmp2; }
1608 LIR_Opr tmp3() const { return _tmp3; }
1609 ciKlass* klass() const { assert(code() == lir_instanceof || code() == lir_checkcast, "not valid"); return _klass; }
1610 bool fast_check() const { assert(code() == lir_instanceof || code() == lir_checkcast, "not valid"); return _fast_check; }
1611 CodeEmitInfo* info_for_patch() const { return _info_for_patch; }
1612 CodeEmitInfo* info_for_exception() const { return _info_for_exception; }
1613 CodeStub* stub() const { return _stub; }
1614
1615 // MethodData* profiling
1616 void set_profiled_method(ciMethod *method) { _profiled_method = method; }
1617 void set_profiled_bci(int bci) { _profiled_bci = bci; }
1618 void set_should_profile(bool b) { _should_profile = b; }
1619 ciMethod* profiled_method() const { return _profiled_method; }
1620 int profiled_bci() const { return _profiled_bci; }
1621 bool should_profile() const { return _should_profile; }
1622
1623 virtual bool is_patching() { return _info_for_patch != NULL; }
1624 virtual void emit_code(LIR_Assembler* masm);
1625 virtual LIR_OpTypeCheck* as_OpTypeCheck() { return this; }
1626 void print_instr(outputStream* out) const PRODUCT_RETURN;
1627 };
1628
1629 // LIR_Op2
1630 class LIR_Op2: public LIR_Op {
1631 friend class LIR_OpVisitState;
1632
1633 int _fpu_stack_size; // for sin/cos implementation on Intel
1634
1635 protected:
1636 LIR_Opr _opr1;
1637 LIR_Opr _opr2;
1638 BasicType _type;
1639 LIR_Opr _tmp1;
1640 LIR_Opr _tmp2;
1641 LIR_Opr _tmp3;
1642 LIR_Opr _tmp4;
1643 LIR_Opr _tmp5;
1644 LIR_Condition _condition;
1645
1646 void verify() const;
1647
1648 public:
1649 LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, CodeEmitInfo* info = NULL)
1650 : LIR_Op(code, LIR_OprFact::illegalOpr, info)
1651 , _opr1(opr1)
1652 , _opr2(opr2)
1653 , _type(T_ILLEGAL)
1654 , _condition(condition)
1655 , _fpu_stack_size(0)
1656 , _tmp1(LIR_OprFact::illegalOpr)
1657 , _tmp2(LIR_OprFact::illegalOpr)
1658 , _tmp3(LIR_OprFact::illegalOpr)
1659 , _tmp4(LIR_OprFact::illegalOpr)
1660 , _tmp5(LIR_OprFact::illegalOpr) {
1661 assert(code == lir_cmp || code == lir_assert, "code check");
1662 }
1663
1664 LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, BasicType type)
1665 : LIR_Op(code, result, NULL)
1666 , _opr1(opr1)
1667 , _opr2(opr2)
1668 , _type(type)
1669 , _condition(condition)
1670 , _fpu_stack_size(0)
1671 , _tmp1(LIR_OprFact::illegalOpr)
1672 , _tmp2(LIR_OprFact::illegalOpr)
1673 , _tmp3(LIR_OprFact::illegalOpr)
1674 , _tmp4(LIR_OprFact::illegalOpr)
1675 , _tmp5(LIR_OprFact::illegalOpr) {
1676 assert(code == lir_cmove, "code check");
1677 assert(type != T_ILLEGAL, "cmove should have type");
1678 }
1679
1680 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result = LIR_OprFact::illegalOpr,
1681 CodeEmitInfo* info = NULL, BasicType type = T_ILLEGAL)
1682 : LIR_Op(code, result, info)
1683 , _opr1(opr1)
1684 , _opr2(opr2)
1685 , _type(type)
1686 , _condition(lir_cond_unknown)
1687 , _fpu_stack_size(0)
1688 , _tmp1(LIR_OprFact::illegalOpr)
1689 , _tmp2(LIR_OprFact::illegalOpr)
1690 , _tmp3(LIR_OprFact::illegalOpr)
1691 , _tmp4(LIR_OprFact::illegalOpr)
1692 , _tmp5(LIR_OprFact::illegalOpr) {
1693 assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check");
1694 }
1695
1696 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, LIR_Opr tmp1, LIR_Opr tmp2 = LIR_OprFact::illegalOpr,
1697 LIR_Opr tmp3 = LIR_OprFact::illegalOpr, LIR_Opr tmp4 = LIR_OprFact::illegalOpr, LIR_Opr tmp5 = LIR_OprFact::illegalOpr)
1698 : LIR_Op(code, result, NULL)
1699 , _opr1(opr1)
1700 , _opr2(opr2)
1701 , _type(T_ILLEGAL)
1702 , _condition(lir_cond_unknown)
1703 , _fpu_stack_size(0)
1704 , _tmp1(tmp1)
1705 , _tmp2(tmp2)
1706 , _tmp3(tmp3)
1707 , _tmp4(tmp4)
1708 , _tmp5(tmp5) {
1709 assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check");
1710 }
1711
1712 LIR_Opr in_opr1() const { return _opr1; }
1713 LIR_Opr in_opr2() const { return _opr2; }
1714 BasicType type() const { return _type; }
1715 LIR_Opr tmp1_opr() const { return _tmp1; }
1716 LIR_Opr tmp2_opr() const { return _tmp2; }
1717 LIR_Opr tmp3_opr() const { return _tmp3; }
1718 LIR_Opr tmp4_opr() const { return _tmp4; }
1719 LIR_Opr tmp5_opr() const { return _tmp5; }
1720 LIR_Condition condition() const {
1721 assert(code() == lir_cmp || code() == lir_cmove || code() == lir_assert, "only valid for cmp and cmove and assert"); return _condition;
1722 }
1723 void set_condition(LIR_Condition condition) {
1724 assert(code() == lir_cmp || code() == lir_cmove, "only valid for cmp and cmove"); _condition = condition;
1725 }
1726
1727 void set_fpu_stack_size(int size) { _fpu_stack_size = size; }
1728 int fpu_stack_size() const { return _fpu_stack_size; }
1729
1730 void set_in_opr1(LIR_Opr opr) { _opr1 = opr; }
1731 void set_in_opr2(LIR_Opr opr) { _opr2 = opr; }
1732
1733 virtual void emit_code(LIR_Assembler* masm);
1734 virtual LIR_Op2* as_Op2() { return this; }
1735 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1736 };
1737
1738 class LIR_OpAllocArray : public LIR_Op {
1739 friend class LIR_OpVisitState;
1740
1741 private:
1742 LIR_Opr _klass;
1743 LIR_Opr _len;
1744 LIR_Opr _tmp1;
1745 LIR_Opr _tmp2;
1746 LIR_Opr _tmp3;
1747 LIR_Opr _tmp4;
1748 BasicType _type;
1749 CodeStub* _stub;
1750
1751 public:
1752 LIR_OpAllocArray(LIR_Opr klass, LIR_Opr len, LIR_Opr result, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, BasicType type, CodeStub* stub)
1753 : LIR_Op(lir_alloc_array, result, NULL)
1754 , _klass(klass)
1755 , _len(len)
1756 , _tmp1(t1)
1757 , _tmp2(t2)
1758 , _tmp3(t3)
1759 , _tmp4(t4)
1760 , _type(type)
1761 , _stub(stub) {}
1762
1763 LIR_Opr klass() const { return _klass; }
1764 LIR_Opr len() const { return _len; }
1765 LIR_Opr obj() const { return result_opr(); }
1766 LIR_Opr tmp1() const { return _tmp1; }
1767 LIR_Opr tmp2() const { return _tmp2; }
1768 LIR_Opr tmp3() const { return _tmp3; }
1769 LIR_Opr tmp4() const { return _tmp4; }
1770 BasicType type() const { return _type; }
1771 CodeStub* stub() const { return _stub; }
1772
1773 virtual void emit_code(LIR_Assembler* masm);
1774 virtual LIR_OpAllocArray * as_OpAllocArray () { return this; }
1775 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1776 };
1777
1778
1779 class LIR_Op3: public LIR_Op {
1780 friend class LIR_OpVisitState;
1781
1782 private:
1783 LIR_Opr _opr1;
1784 LIR_Opr _opr2;
1785 LIR_Opr _opr3;
1786 public:
1787 LIR_Op3(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr opr3, LIR_Opr result, CodeEmitInfo* info = NULL)
1788 : LIR_Op(code, result, info)
1789 , _opr1(opr1)
1790 , _opr2(opr2)
1791 , _opr3(opr3) { assert(is_in_range(code, begin_op3, end_op3), "code check"); }
1792 LIR_Opr in_opr1() const { return _opr1; }
1793 LIR_Opr in_opr2() const { return _opr2; }
1794 LIR_Opr in_opr3() const { return _opr3; }
1795
1796 virtual void emit_code(LIR_Assembler* masm);
1797 virtual LIR_Op3* as_Op3() { return this; }
1798 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1799 };
1800
1801
1802 //--------------------------------
1803 class LabelObj: public CompilationResourceObj {
1804 private:
1805 Label _label;
1806 public:
1807 LabelObj() {}
1808 Label* label() { return &_label; }
1809 };
1810
1811
1812 class LIR_OpLock: public LIR_Op {
1813 friend class LIR_OpVisitState;
1814
1815 private:
1816 LIR_Opr _hdr;
1817 LIR_Opr _obj;
1818 LIR_Opr _lock;
1819 LIR_Opr _scratch;
1820 CodeStub* _stub;
1821 public:
1822 LIR_OpLock(LIR_Code code, LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info)
1823 : LIR_Op(code, LIR_OprFact::illegalOpr, info)
1824 , _hdr(hdr)
1825 , _obj(obj)
1826 , _lock(lock)
1827 , _scratch(scratch)
1828 , _stub(stub) {}
1829
1830 LIR_Opr hdr_opr() const { return _hdr; }
1831 LIR_Opr obj_opr() const { return _obj; }
1832 LIR_Opr lock_opr() const { return _lock; }
1833 LIR_Opr scratch_opr() const { return _scratch; }
1834 CodeStub* stub() const { return _stub; }
1835
1836 virtual void emit_code(LIR_Assembler* masm);
1837 virtual LIR_OpLock* as_OpLock() { return this; }
1838 void print_instr(outputStream* out) const PRODUCT_RETURN;
1839 };
1840
1841
1842 class LIR_OpDelay: public LIR_Op {
1843 friend class LIR_OpVisitState;
1844
1845 private:
1846 LIR_Op* _op;
1847
1848 public:
1849 LIR_OpDelay(LIR_Op* op, CodeEmitInfo* info):
1850 LIR_Op(lir_delay_slot, LIR_OprFact::illegalOpr, info),
1851 _op(op) {
1852 assert(op->code() == lir_nop || LIRFillDelaySlots, "should be filling with nops");
1853 }
1854 virtual void emit_code(LIR_Assembler* masm);
1855 virtual LIR_OpDelay* as_OpDelay() { return this; }
1856 void print_instr(outputStream* out) const PRODUCT_RETURN;
1857 LIR_Op* delay_op() const { return _op; }
1858 CodeEmitInfo* call_info() const { return info(); }
1859 };
1860
1861 #ifdef ASSERT
1862 // LIR_OpAssert
1863 class LIR_OpAssert : public LIR_Op2 {
1864 friend class LIR_OpVisitState;
1865
1866 private:
1867 const char* _msg;
1868 bool _halt;
1869
1870 public:
1871 LIR_OpAssert(LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, const char* msg, bool halt)
1872 : LIR_Op2(lir_assert, condition, opr1, opr2)
1873 , _halt(halt)
1874 , _msg(msg) {
1875 }
1876
1877 const char* msg() const { return _msg; }
1878 bool halt() const { return _halt; }
1879
1880 virtual void emit_code(LIR_Assembler* masm);
1881 virtual LIR_OpAssert* as_OpAssert() { return this; }
1882 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1883 };
1884 #endif
1885
1886 // LIR_OpCompareAndSwap
1887 class LIR_OpCompareAndSwap : public LIR_Op {
1888 friend class LIR_OpVisitState;
1889
1890 private:
1891 LIR_Opr _addr;
1892 LIR_Opr _cmp_value;
1893 LIR_Opr _new_value;
1894 LIR_Opr _tmp1;
1895 LIR_Opr _tmp2;
1896
1897 public:
1898 LIR_OpCompareAndSwap(LIR_Code code, LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
1899 LIR_Opr t1, LIR_Opr t2, LIR_Opr result)
1900 : LIR_Op(code, result, NULL) // no result, no info
1901 , _addr(addr)
1902 , _cmp_value(cmp_value)
1903 , _new_value(new_value)
1904 , _tmp1(t1)
1905 , _tmp2(t2) { }
1906
1907 LIR_Opr addr() const { return _addr; }
1908 LIR_Opr cmp_value() const { return _cmp_value; }
1909 LIR_Opr new_value() const { return _new_value; }
1910 LIR_Opr tmp1() const { return _tmp1; }
1911 LIR_Opr tmp2() const { return _tmp2; }
1912
1913 virtual void emit_code(LIR_Assembler* masm);
1914 virtual LIR_OpCompareAndSwap * as_OpCompareAndSwap () { return this; }
1915 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1916 };
1917
1918 // LIR_OpProfileCall
1919 class LIR_OpProfileCall : public LIR_Op {
1920 friend class LIR_OpVisitState;
1921
1922 private:
1923 ciMethod* _profiled_method;
1924 int _profiled_bci;
1925 ciMethod* _profiled_callee;
1926 LIR_Opr _mdo;
1927 LIR_Opr _recv;
1928 LIR_Opr _tmp1;
1929 ciKlass* _known_holder;
1930
1931 public:
1932 // Destroys recv
1933 LIR_OpProfileCall(ciMethod* profiled_method, int profiled_bci, ciMethod* profiled_callee, LIR_Opr mdo, LIR_Opr recv, LIR_Opr t1, ciKlass* known_holder)
1934 : LIR_Op(lir_profile_call, LIR_OprFact::illegalOpr, NULL) // no result, no info
1935 , _profiled_method(profiled_method)
1936 , _profiled_bci(profiled_bci)
1937 , _profiled_callee(profiled_callee)
1938 , _mdo(mdo)
1939 , _recv(recv)
1940 , _tmp1(t1)
1941 , _known_holder(known_holder) { }
1942
1943 ciMethod* profiled_method() const { return _profiled_method; }
1944 int profiled_bci() const { return _profiled_bci; }
1945 ciMethod* profiled_callee() const { return _profiled_callee; }
1946 LIR_Opr mdo() const { return _mdo; }
1947 LIR_Opr recv() const { return _recv; }
1948 LIR_Opr tmp1() const { return _tmp1; }
1949 ciKlass* known_holder() const { return _known_holder; }
1950
1951 virtual void emit_code(LIR_Assembler* masm);
1952 virtual LIR_OpProfileCall* as_OpProfileCall() { return this; }
1953 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1954 };
1955
1956 // LIR_OpProfileType
1957 class LIR_OpProfileType : public LIR_Op {
1958 friend class LIR_OpVisitState;
1959
1960 private:
1961 LIR_Opr _mdp;
1962 LIR_Opr _obj;
1963 LIR_Opr _tmp;
1964 ciKlass* _exact_klass; // non NULL if we know the klass statically (no need to load it from _obj)
1965 intptr_t _current_klass; // what the profiling currently reports
1966 bool _not_null; // true if we know statically that _obj cannot be null
1967 bool _no_conflict; // true if we're profling parameters, _exact_klass is not NULL and we know
1968 // _exact_klass it the only possible type for this parameter in any context.
1969
1970 public:
1971 // Destroys recv
1972 LIR_OpProfileType(LIR_Opr mdp, LIR_Opr obj, ciKlass* exact_klass, intptr_t current_klass, LIR_Opr tmp, bool not_null, bool no_conflict)
1973 : LIR_Op(lir_profile_type, LIR_OprFact::illegalOpr, NULL) // no result, no info
1974 , _mdp(mdp)
1975 , _obj(obj)
1976 , _exact_klass(exact_klass)
1977 , _current_klass(current_klass)
1978 , _tmp(tmp)
1979 , _not_null(not_null)
1980 , _no_conflict(no_conflict) { }
1981
1982 LIR_Opr mdp() const { return _mdp; }
1983 LIR_Opr obj() const { return _obj; }
1984 LIR_Opr tmp() const { return _tmp; }
1985 ciKlass* exact_klass() const { return _exact_klass; }
1986 intptr_t current_klass() const { return _current_klass; }
1987 bool not_null() const { return _not_null; }
1988 bool no_conflict() const { return _no_conflict; }
1989
1990 virtual void emit_code(LIR_Assembler* masm);
1991 virtual LIR_OpProfileType* as_OpProfileType() { return this; }
1992 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1993 };
1994
1995 class LIR_InsertionBuffer;
1996
1997 //--------------------------------LIR_List---------------------------------------------------
1998 // Maintains a list of LIR instructions (one instance of LIR_List per basic block)
1999 // The LIR instructions are appended by the LIR_List class itself;
2000 //
2001 // Notes:
2002 // - all offsets are(should be) in bytes
2003 // - local positions are specified with an offset, with offset 0 being local 0
2004
2005 class LIR_List: public CompilationResourceObj {
2006 private:
2007 LIR_OpList _operations;
2008
2009 Compilation* _compilation;
2010 #ifndef PRODUCT
2011 BlockBegin* _block;
2012 #endif
2013 #ifdef ASSERT
2014 const char * _file;
2015 int _line;
2016 #endif
2017
2018 void append(LIR_Op* op) {
2019 if (op->source() == NULL)
2020 op->set_source(_compilation->current_instruction());
2021 #ifndef PRODUCT
2022 if (PrintIRWithLIR) {
2023 _compilation->maybe_print_current_instruction();
2024 op->print(); tty->cr();
2025 }
2026 #endif // PRODUCT
2027
2028 _operations.append(op);
2029
2030 #ifdef ASSERT
2031 op->verify();
2032 op->set_file_and_line(_file, _line);
2033 _file = NULL;
2034 _line = 0;
2035 #endif
2036 }
2037
2038 public:
2039 LIR_List(Compilation* compilation, BlockBegin* block = NULL);
2040
2041 #ifdef ASSERT
2042 void set_file_and_line(const char * file, int line);
2043 #endif
2044
2045 //---------- accessors ---------------
2046 LIR_OpList* instructions_list() { return &_operations; }
2047 int length() const { return _operations.length(); }
2048 LIR_Op* at(int i) const { return _operations.at(i); }
2049
2050 NOT_PRODUCT(BlockBegin* block() const { return _block; });
2051
2052 // insert LIR_Ops in buffer to right places in LIR_List
2053 void append(LIR_InsertionBuffer* buffer);
2054
2055 //---------- mutators ---------------
2056 void insert_before(int i, LIR_List* op_list) { _operations.insert_before(i, op_list->instructions_list()); }
2057 void insert_before(int i, LIR_Op* op) { _operations.insert_before(i, op); }
2058 void remove_at(int i) { _operations.remove_at(i); }
2059
2060 //---------- printing -------------
2061 void print_instructions() PRODUCT_RETURN;
2062
2063
2064 //---------- instructions -------------
2065 void call_opt_virtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
2066 address dest, LIR_OprList* arguments,
2067 CodeEmitInfo* info) {
2068 append(new LIR_OpJavaCall(lir_optvirtual_call, method, receiver, result, dest, arguments, info));
2069 }
2070 void call_static(ciMethod* method, LIR_Opr result,
2071 address dest, LIR_OprList* arguments, CodeEmitInfo* info) {
2072 append(new LIR_OpJavaCall(lir_static_call, method, LIR_OprFact::illegalOpr, result, dest, arguments, info));
2073 }
2074 void call_icvirtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
2075 address dest, LIR_OprList* arguments, CodeEmitInfo* info) {
2076 append(new LIR_OpJavaCall(lir_icvirtual_call, method, receiver, result, dest, arguments, info));
2077 }
2078 void call_virtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
2079 intptr_t vtable_offset, LIR_OprList* arguments, CodeEmitInfo* info) {
2080 append(new LIR_OpJavaCall(lir_virtual_call, method, receiver, result, vtable_offset, arguments, info));
2081 }
2082 void call_dynamic(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
2083 address dest, LIR_OprList* arguments, CodeEmitInfo* info) {
2084 append(new LIR_OpJavaCall(lir_dynamic_call, method, receiver, result, dest, arguments, info));
2085 }
2086
2087 void get_thread(LIR_Opr result) { append(new LIR_Op0(lir_get_thread, result)); }
2088 void word_align() { append(new LIR_Op0(lir_word_align)); }
2089 void membar() { append(new LIR_Op0(lir_membar)); }
2090 void membar_acquire() { append(new LIR_Op0(lir_membar_acquire)); }
2091 void membar_release() { append(new LIR_Op0(lir_membar_release)); }
2092 void membar_loadload() { append(new LIR_Op0(lir_membar_loadload)); }
2093 void membar_storestore() { append(new LIR_Op0(lir_membar_storestore)); }
2094 void membar_loadstore() { append(new LIR_Op0(lir_membar_loadstore)); }
2095 void membar_storeload() { append(new LIR_Op0(lir_membar_storeload)); }
2096
2097 void nop() { append(new LIR_Op0(lir_nop)); }
2098 void build_frame() { append(new LIR_Op0(lir_build_frame)); }
2099
2100 void std_entry(LIR_Opr receiver) { append(new LIR_Op0(lir_std_entry, receiver)); }
2101 void osr_entry(LIR_Opr osrPointer) { append(new LIR_Op0(lir_osr_entry, osrPointer)); }
2102
2103 void branch_destination(Label* lbl) { append(new LIR_OpLabel(lbl)); }
2104
2105 void negate(LIR_Opr from, LIR_Opr to) { append(new LIR_Op1(lir_neg, from, to)); }
2106 void leal(LIR_Opr from, LIR_Opr result_reg) { append(new LIR_Op1(lir_leal, from, result_reg)); }
2107
2108 // result is a stack location for old backend and vreg for UseLinearScan
2109 // stack_loc_temp is an illegal register for old backend
2110 void roundfp(LIR_Opr reg, LIR_Opr stack_loc_temp, LIR_Opr result) { append(new LIR_OpRoundFP(reg, stack_loc_temp, result)); }
2111 void unaligned_move(LIR_Address* src, LIR_Opr dst) { append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, dst->type(), lir_patch_none, NULL, lir_move_unaligned)); }
2112 void unaligned_move(LIR_Opr src, LIR_Address* dst) { append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), src->type(), lir_patch_none, NULL, lir_move_unaligned)); }
2113 void unaligned_move(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, NULL, lir_move_unaligned)); }
2114 void move(LIR_Opr src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, info)); }
2115 void move(LIR_Address* src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, src->type(), lir_patch_none, info)); }
2116 void move(LIR_Opr src, LIR_Address* dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), dst->type(), lir_patch_none, info)); }
2117 void move_wide(LIR_Address* src, LIR_Opr dst, CodeEmitInfo* info = NULL) {
2118 if (UseCompressedOops) {
2119 append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, src->type(), lir_patch_none, info, lir_move_wide));
2120 } else {
2121 move(src, dst, info);
2122 }
2123 }
2124 void move_wide(LIR_Opr src, LIR_Address* dst, CodeEmitInfo* info = NULL) {
2125 if (UseCompressedOops) {
2126 append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), dst->type(), lir_patch_none, info, lir_move_wide));
2127 } else {
2128 move(src, dst, info);
2129 }
2130 }
2131 void volatile_move(LIR_Opr src, LIR_Opr dst, BasicType type, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none) { append(new LIR_Op1(lir_move, src, dst, type, patch_code, info, lir_move_volatile)); }
2132
2133 void oop2reg (jobject o, LIR_Opr reg) { assert(reg->type() == T_OBJECT, "bad reg"); append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o), reg)); }
2134 void oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info);
2135
2136 void metadata2reg (Metadata* o, LIR_Opr reg) { assert(reg->type() == T_METADATA, "bad reg"); append(new LIR_Op1(lir_move, LIR_OprFact::metadataConst(o), reg)); }
2137 void klass2reg_patch(Metadata* o, LIR_Opr reg, CodeEmitInfo* info);
2138
2139 void return_op(LIR_Opr result) { append(new LIR_Op1(lir_return, result)); }
2140
2141 void safepoint(LIR_Opr tmp, CodeEmitInfo* info) { append(new LIR_Op1(lir_safepoint, tmp, info)); }
2142
2143 #ifdef PPC
2144 void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_OpConvert(code, left, dst, NULL, tmp1, tmp2)); }
2145 #endif
2146 void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, ConversionStub* stub = NULL/*, bool is_32bit = false*/) { append(new LIR_OpConvert(code, left, dst, stub)); }
2147
2148 void logical_and (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_and, left, right, dst)); }
2149 void logical_or (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_or, left, right, dst)); }
2150 void logical_xor (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_xor, left, right, dst)); }
2151
2152 void pack64(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_pack64, src, dst, T_LONG, lir_patch_none, NULL)); }
2153 void unpack64(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_unpack64, src, dst, T_LONG, lir_patch_none, NULL)); }
2154
2155 void null_check(LIR_Opr opr, CodeEmitInfo* info) { append(new LIR_Op1(lir_null_check, opr, info)); }
2156 void throw_exception(LIR_Opr exceptionPC, LIR_Opr exceptionOop, CodeEmitInfo* info) {
2157 append(new LIR_Op2(lir_throw, exceptionPC, exceptionOop, LIR_OprFact::illegalOpr, info));
2158 }
2159 void unwind_exception(LIR_Opr exceptionOop) {
2160 append(new LIR_Op1(lir_unwind, exceptionOop));
2161 }
2162
2163 void compare_to (LIR_Opr left, LIR_Opr right, LIR_Opr dst) {
2164 append(new LIR_Op2(lir_compare_to, left, right, dst));
2165 }
2166
2167 void push(LIR_Opr opr) { append(new LIR_Op1(lir_push, opr)); }
2168 void pop(LIR_Opr reg) { append(new LIR_Op1(lir_pop, reg)); }
2169
2170 void cmp(LIR_Condition condition, LIR_Opr left, LIR_Opr right, CodeEmitInfo* info = NULL) {
2171 append(new LIR_Op2(lir_cmp, condition, left, right, info));
2172 }
2173 void cmp(LIR_Condition condition, LIR_Opr left, int right, CodeEmitInfo* info = NULL) {
2174 cmp(condition, left, LIR_OprFact::intConst(right), info);
2175 }
2176
2177 void cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info);
2178 void cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info);
2179
2180 void cmove(LIR_Condition condition, LIR_Opr src1, LIR_Opr src2, LIR_Opr dst, BasicType type) {
2181 append(new LIR_Op2(lir_cmove, condition, src1, src2, dst, type));
2182 }
2183
2184 void cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
2185 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr);
2186 void cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
2187 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr);
2188 void cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
2189 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr);
2190
2191 void abs (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_abs , from, tmp, to)); }
2192 void sqrt(LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_sqrt, from, tmp, to)); }
2193 void log10 (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_log10, from, LIR_OprFact::illegalOpr, to, tmp)); }
2194 void tan (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_tan , from, tmp1, to, tmp2)); }
2195 void pow (LIR_Opr arg1, LIR_Opr arg2, LIR_Opr res, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, LIR_Opr tmp4, LIR_Opr tmp5) { append(new LIR_Op2(lir_pow, arg1, arg2, res, tmp1, tmp2, tmp3, tmp4, tmp5)); }
2196
2197 void add (LIR_Opr left, LIR_Opr right, LIR_Opr res) { append(new LIR_Op2(lir_add, left, right, res)); }
2198 void sub (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_sub, left, right, res, info)); }
2199 void mul (LIR_Opr left, LIR_Opr right, LIR_Opr res) { append(new LIR_Op2(lir_mul, left, right, res)); }
2200 void mul_strictfp (LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_mul_strictfp, left, right, res, tmp)); }
2201 void div (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_div, left, right, res, info)); }
2202 void div_strictfp (LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_div_strictfp, left, right, res, tmp)); }
2203 void rem (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_rem, left, right, res, info)); }
2204
2205 void volatile_load_mem_reg(LIR_Address* address, LIR_Opr dst, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
2206 void volatile_load_unsafe_reg(LIR_Opr base, LIR_Opr offset, LIR_Opr dst, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code);
2207
2208 void load(LIR_Address* addr, LIR_Opr src, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none);
2209
2210 void store_mem_int(jint v, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
2211 void store_mem_oop(jobject o, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
2212 void store(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none);
2213 void volatile_store_mem_reg(LIR_Opr src, LIR_Address* address, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
2214 void volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code);
2215
2216 void idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
2217 void idiv(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
2218 void irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
2219 void irem(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
2220
2221 void allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub);
2222 void allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, BasicType type, LIR_Opr klass, CodeStub* stub);
2223
2224 // jump is an unconditional branch
2225 void jump(BlockBegin* block) {
2226 append(new LIR_OpBranch(lir_cond_always, T_ILLEGAL, block));
2227 }
2228 void jump(CodeStub* stub) {
2229 append(new LIR_OpBranch(lir_cond_always, T_ILLEGAL, stub));
2230 }
2231 void branch(LIR_Condition cond, BasicType type, Label* lbl) { append(new LIR_OpBranch(cond, type, lbl)); }
2232 void branch(LIR_Condition cond, BasicType type, BlockBegin* block) {
2233 assert(type != T_FLOAT && type != T_DOUBLE, "no fp comparisons");
2234 append(new LIR_OpBranch(cond, type, block));
2235 }
2236 void branch(LIR_Condition cond, BasicType type, CodeStub* stub) {
2237 assert(type != T_FLOAT && type != T_DOUBLE, "no fp comparisons");
2238 append(new LIR_OpBranch(cond, type, stub));
2239 }
2240 void branch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* unordered) {
2241 assert(type == T_FLOAT || type == T_DOUBLE, "fp comparisons only");
2242 append(new LIR_OpBranch(cond, type, block, unordered));
2243 }
2244
2245 void shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp);
2246 void shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp);
2247 void unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp);
2248
2249 void shift_left(LIR_Opr value, int count, LIR_Opr dst) { shift_left(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); }
2250 void shift_right(LIR_Opr value, int count, LIR_Opr dst) { shift_right(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); }
2251 void unsigned_shift_right(LIR_Opr value, int count, LIR_Opr dst) { unsigned_shift_right(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); }
2252
2253 void lcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_cmp_l2i, left, right, dst)); }
2254 void fcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst, bool is_unordered_less);
2255
2256 void call_runtime_leaf(address routine, LIR_Opr tmp, LIR_Opr result, LIR_OprList* arguments) {
2257 append(new LIR_OpRTCall(routine, tmp, result, arguments));
2258 }
2259
2260 void call_runtime(address routine, LIR_Opr tmp, LIR_Opr result,
2261 LIR_OprList* arguments, CodeEmitInfo* info) {
2262 append(new LIR_OpRTCall(routine, tmp, result, arguments, info));
2263 }
2264
2265 void load_stack_address_monitor(int monitor_ix, LIR_Opr dst) { append(new LIR_Op1(lir_monaddr, LIR_OprFact::intConst(monitor_ix), dst)); }
2266 void unlock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub);
2267 void lock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info);
2268
2269 void set_24bit_fpu() { append(new LIR_Op0(lir_24bit_FPU )); }
2270 void restore_fpu() { append(new LIR_Op0(lir_reset_FPU )); }
2271 void breakpoint() { append(new LIR_Op0(lir_breakpoint)); }
2272
2273 void arraycopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, LIR_Opr tmp, ciArrayKlass* expected_type, int flags, CodeEmitInfo* info) { append(new LIR_OpArrayCopy(src, src_pos, dst, dst_pos, length, tmp, expected_type, flags, info)); }
2274
2275 void update_crc32(LIR_Opr crc, LIR_Opr val, LIR_Opr res) { append(new LIR_OpUpdateCRC32(crc, val, res)); }
2276
2277 void fpop_raw() { append(new LIR_Op0(lir_fpop_raw)); }
2278
2279 void instanceof(LIR_Opr result, LIR_Opr object, ciKlass* klass, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, CodeEmitInfo* info_for_patch, ciMethod* profiled_method, int profiled_bci);
2280 void store_check(LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception, ciMethod* profiled_method, int profiled_bci);
2281
2282 void checkcast (LIR_Opr result, LIR_Opr object, ciKlass* klass,
2283 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check,
2284 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub,
2285 ciMethod* profiled_method, int profiled_bci);
2286 // MethodData* profiling
2287 void profile_call(ciMethod* method, int bci, ciMethod* callee, LIR_Opr mdo, LIR_Opr recv, LIR_Opr t1, ciKlass* cha_klass) {
2288 append(new LIR_OpProfileCall(method, bci, callee, mdo, recv, t1, cha_klass));
2289 }
2290 void profile_type(LIR_Address* mdp, LIR_Opr obj, ciKlass* exact_klass, intptr_t current_klass, LIR_Opr tmp, bool not_null, bool no_conflict) {
2291 append(new LIR_OpProfileType(LIR_OprFact::address(mdp), obj, exact_klass, current_klass, tmp, not_null, no_conflict));
2292 }
2293
2294 void xadd(LIR_Opr src, LIR_Opr add, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_xadd, src, add, res, tmp)); }
2295 void xchg(LIR_Opr src, LIR_Opr set, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_xchg, src, set, res, tmp)); }
2296 #ifdef ASSERT
2297 void lir_assert(LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, const char* msg, bool halt) { append(new LIR_OpAssert(condition, opr1, opr2, msg, halt)); }
2298 #endif
2299 };
2300
2301 void print_LIR(BlockList* blocks);
2302
2303 class LIR_InsertionBuffer : public CompilationResourceObj {
2304 private:
2305 LIR_List* _lir; // the lir list where ops of this buffer should be inserted later (NULL when uninitialized)
2306
2307 // list of insertion points. index and count are stored alternately:
2308 // _index_and_count[i * 2]: the index into lir list where "count" ops should be inserted
2309 // _index_and_count[i * 2 + 1]: the number of ops to be inserted at index
2310 intStack _index_and_count;
2311
2312 // the LIR_Ops to be inserted
2313 LIR_OpList _ops;
2314
2315 void append_new(int index, int count) { _index_and_count.append(index); _index_and_count.append(count); }
2316 void set_index_at(int i, int value) { _index_and_count.at_put((i << 1), value); }
2317 void set_count_at(int i, int value) { _index_and_count.at_put((i << 1) + 1, value); }
2318
2319 #ifdef ASSERT
2320 void verify();
2321 #endif
2322 public:
2323 LIR_InsertionBuffer() : _lir(NULL), _index_and_count(8), _ops(8) { }
2324
2325 // must be called before using the insertion buffer
2326 void init(LIR_List* lir) { assert(!initialized(), "already initialized"); _lir = lir; _index_and_count.clear(); _ops.clear(); }
2327 bool initialized() const { return _lir != NULL; }
2328 // called automatically when the buffer is appended to the LIR_List
2329 void finish() { _lir = NULL; }
2330
2331 // accessors
2332 LIR_List* lir_list() const { return _lir; }
2333 int number_of_insertion_points() const { return _index_and_count.length() >> 1; }
2334 int index_at(int i) const { return _index_and_count.at((i << 1)); }
2335 int count_at(int i) const { return _index_and_count.at((i << 1) + 1); }
2336
2337 int number_of_ops() const { return _ops.length(); }
2338 LIR_Op* op_at(int i) const { return _ops.at(i); }
2339
2340 // append an instruction to the buffer
2341 void append(int index, LIR_Op* op);
2342
2343 // instruction
2344 void move(int index, LIR_Opr src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(index, new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, info)); }
2345 };
2346
2347
2348 //
2349 // LIR_OpVisitState is used for manipulating LIR_Ops in an abstract way.
2350 // Calling a LIR_Op's visit function with a LIR_OpVisitState causes
2351 // information about the input, output and temporaries used by the
2352 // op to be recorded. It also records whether the op has call semantics
2353 // and also records all the CodeEmitInfos used by this op.
2354 //
2355
2356
2357 class LIR_OpVisitState: public StackObj {
2358 public:
2359 typedef enum { inputMode, firstMode = inputMode, tempMode, outputMode, numModes, invalidMode = -1 } OprMode;
2360
2361 enum {
2362 maxNumberOfOperands = 20,
2363 maxNumberOfInfos = 4
2364 };
2365
2366 private:
2367 LIR_Op* _op;
2368
2369 // optimization: the operands and infos are not stored in a variable-length
2370 // list, but in a fixed-size array to save time of size checks and resizing
2371 int _oprs_len[numModes];
2372 LIR_Opr* _oprs_new[numModes][maxNumberOfOperands];
2373 int _info_len;
2374 CodeEmitInfo* _info_new[maxNumberOfInfos];
2375
2376 bool _has_call;
2377 bool _has_slow_case;
2378
2379
2380 // only include register operands
2381 // addresses are decomposed to the base and index registers
2382 // constants and stack operands are ignored
2383 void append(LIR_Opr& opr, OprMode mode) {
2384 assert(opr->is_valid(), "should not call this otherwise");
2385 assert(mode >= 0 && mode < numModes, "bad mode");
2386
2387 if (opr->is_register()) {
2388 assert(_oprs_len[mode] < maxNumberOfOperands, "array overflow");
2389 _oprs_new[mode][_oprs_len[mode]++] = &opr;
2390
2391 } else if (opr->is_pointer()) {
2392 LIR_Address* address = opr->as_address_ptr();
2393 if (address != NULL) {
2394 // special handling for addresses: add base and index register of the address
2395 // both are always input operands or temp if we want to extend
2396 // their liveness!
2397 if (mode == outputMode) {
2398 mode = inputMode;
2399 }
2400 assert (mode == inputMode || mode == tempMode, "input or temp only for addresses");
2401 if (address->_base->is_valid()) {
2402 assert(address->_base->is_register(), "must be");
2403 assert(_oprs_len[mode] < maxNumberOfOperands, "array overflow");
2404 _oprs_new[mode][_oprs_len[mode]++] = &address->_base;
2405 }
2406 if (address->_index->is_valid()) {
2407 assert(address->_index->is_register(), "must be");
2408 assert(_oprs_len[mode] < maxNumberOfOperands, "array overflow");
2409 _oprs_new[mode][_oprs_len[mode]++] = &address->_index;
2410 }
2411
2412 } else {
2413 assert(opr->is_constant(), "constant operands are not processed");
2414 }
2415 } else {
2416 assert(opr->is_stack(), "stack operands are not processed");
2417 }
2418 }
2419
2420 void append(CodeEmitInfo* info) {
2421 assert(info != NULL, "should not call this otherwise");
2422 assert(_info_len < maxNumberOfInfos, "array overflow");
2423 _info_new[_info_len++] = info;
2424 }
2425
2426 public:
2427 LIR_OpVisitState() { reset(); }
2428
2429 LIR_Op* op() const { return _op; }
2430 void set_op(LIR_Op* op) { reset(); _op = op; }
2431
2432 bool has_call() const { return _has_call; }
2433 bool has_slow_case() const { return _has_slow_case; }
2434
2435 void reset() {
2436 _op = NULL;
2437 _has_call = false;
2438 _has_slow_case = false;
2439
2440 _oprs_len[inputMode] = 0;
2441 _oprs_len[tempMode] = 0;
2442 _oprs_len[outputMode] = 0;
2443 _info_len = 0;
2444 }
2445
2446
2447 int opr_count(OprMode mode) const {
2448 assert(mode >= 0 && mode < numModes, "bad mode");
2449 return _oprs_len[mode];
2450 }
2451
2452 LIR_Opr opr_at(OprMode mode, int index) const {
2453 assert(mode >= 0 && mode < numModes, "bad mode");
2454 assert(index >= 0 && index < _oprs_len[mode], "index out of bound");
2455 return *_oprs_new[mode][index];
2456 }
2457
2458 void set_opr_at(OprMode mode, int index, LIR_Opr opr) const {
2459 assert(mode >= 0 && mode < numModes, "bad mode");
2460 assert(index >= 0 && index < _oprs_len[mode], "index out of bound");
2461 *_oprs_new[mode][index] = opr;
2462 }
2463
2464 int info_count() const {
2465 return _info_len;
2466 }
2467
2468 CodeEmitInfo* info_at(int index) const {
2469 assert(index < _info_len, "index out of bounds");
2470 return _info_new[index];
2471 }
2472
2473 XHandlers* all_xhandler();
2474
2475 // collects all register operands of the instruction
2476 void visit(LIR_Op* op);
2477
2478 #ifdef ASSERT
2479 // check that an operation has no operands
2480 bool no_operands(LIR_Op* op);
2481 #endif
2482
2483 // LIR_Op visitor functions use these to fill in the state
2484 void do_input(LIR_Opr& opr) { append(opr, LIR_OpVisitState::inputMode); }
2485 void do_output(LIR_Opr& opr) { append(opr, LIR_OpVisitState::outputMode); }
2486 void do_temp(LIR_Opr& opr) { append(opr, LIR_OpVisitState::tempMode); }
2487 void do_info(CodeEmitInfo* info) { append(info); }
2488
2489 void do_stub(CodeStub* stub);
2490 void do_call() { _has_call = true; }
2491 void do_slow_case() { _has_slow_case = true; }
2492 void do_slow_case(CodeEmitInfo* info) {
2493 _has_slow_case = true;
2494 append(info);
2495 }
2496 };
2497
2498
2499 inline LIR_Opr LIR_OprDesc::illegalOpr() { return LIR_OprFact::illegalOpr; };
2500
2501 #endif // SHARE_VM_C1_C1_LIR_HPP