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src/cpu/aarch64/vm/aarch64.ad

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2830 
2831 //=============================================================================
2832 
2833 #ifndef PRODUCT
2834   void MachNopNode::format(PhaseRegAlloc*, outputStream* st) const {
2835     st->print("nop \t# %d bytes pad for loops and calls", _count);
2836   }
2837 #endif
2838 
2839   void MachNopNode::emit(CodeBuffer &cbuf, PhaseRegAlloc*) const {
2840     MacroAssembler _masm(&cbuf);
2841     for (int i = 0; i < _count; i++) {
2842       __ nop();
2843     }
2844   }
2845 
2846   uint MachNopNode::size(PhaseRegAlloc*) const {
2847     return _count * NativeInstruction::instruction_size;
2848   }
2849 














2850 //=============================================================================
2851 const RegMask& MachConstantBaseNode::_out_RegMask = RegMask::Empty;
2852 
2853 int Compile::ConstantTable::calculate_table_base_offset() const {
2854   return 0;  // absolute addressing, no offset
2855 }
2856 
2857 bool MachConstantBaseNode::requires_postalloc_expand() const { return false; }
2858 void MachConstantBaseNode::postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_) {
2859   ShouldNotReachHere();
2860 }
2861 
2862 void MachConstantBaseNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
2863   // Empty encoding
2864 }
2865 
2866 uint MachConstantBaseNode::size(PhaseRegAlloc* ra_) const {
2867   return 0;
2868 }
2869 


3327 
3328   // TODO
3329   // identify extra cases that we might want to provide match rules for
3330   // e.g. Op_StrEquals and other intrinsics
3331   if (!has_match_rule(opcode)) {
3332     return false;
3333   }
3334 
3335   return true;  // Per default match rules are supported.
3336 }
3337 
3338 const bool Matcher::match_rule_supported_vector(int opcode, int vlen) {
3339 
3340   // TODO
3341   // identify extra cases that we might want to provide match rules for
3342   // e.g. Op_ vector nodes and other intrinsics while guarding with vlen
3343   bool ret_value = match_rule_supported(opcode);
3344   // Add rules here.
3345 
3346   return ret_value;  // Per default match rules are supported.




3347 }
3348 
3349 const int Matcher::float_pressure(int default_pressure_threshold) {
3350   return default_pressure_threshold;
3351 }
3352 
3353 int Matcher::regnum_to_fpu_offset(int regnum)
3354 {
3355   Unimplemented();
3356   return 0;
3357 }
3358 
3359 // Is this branch offset short enough that a short branch can be used?
3360 //
3361 // NOTE: If the platform does not provide any short branch variants, then
3362 //       this method should return false for offset 0.
3363 bool Matcher::is_short_branch_offset(int rule, int br_size, int offset) {
3364   // The passed offset is relative to address of the branch.
3365 
3366   return (-32768 <= offset && offset < 32768);




2830 
2831 //=============================================================================
2832 
2833 #ifndef PRODUCT
2834   void MachNopNode::format(PhaseRegAlloc*, outputStream* st) const {
2835     st->print("nop \t# %d bytes pad for loops and calls", _count);
2836   }
2837 #endif
2838 
2839   void MachNopNode::emit(CodeBuffer &cbuf, PhaseRegAlloc*) const {
2840     MacroAssembler _masm(&cbuf);
2841     for (int i = 0; i < _count; i++) {
2842       __ nop();
2843     }
2844   }
2845 
2846   uint MachNopNode::size(PhaseRegAlloc*) const {
2847     return _count * NativeInstruction::instruction_size;
2848   }
2849 
2850 #ifndef PRODUCT
2851   void MachMskNode::format(PhaseRegAlloc*, outputStream* st) const {
2852     // TBD
2853   }
2854 #endif
2855 
2856   void MachMskNode::emit(CodeBuffer &cbuf, PhaseRegAlloc*) const {
2857     // TBD
2858   }
2859 
2860   uint MachMskNode::size(PhaseRegAlloc* ra_) const {
2861     return 0; // TBD
2862   }
2863 
2864 //=============================================================================
2865 const RegMask& MachConstantBaseNode::_out_RegMask = RegMask::Empty;
2866 
2867 int Compile::ConstantTable::calculate_table_base_offset() const {
2868   return 0;  // absolute addressing, no offset
2869 }
2870 
2871 bool MachConstantBaseNode::requires_postalloc_expand() const { return false; }
2872 void MachConstantBaseNode::postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_) {
2873   ShouldNotReachHere();
2874 }
2875 
2876 void MachConstantBaseNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
2877   // Empty encoding
2878 }
2879 
2880 uint MachConstantBaseNode::size(PhaseRegAlloc* ra_) const {
2881   return 0;
2882 }
2883 


3341 
3342   // TODO
3343   // identify extra cases that we might want to provide match rules for
3344   // e.g. Op_StrEquals and other intrinsics
3345   if (!has_match_rule(opcode)) {
3346     return false;
3347   }
3348 
3349   return true;  // Per default match rules are supported.
3350 }
3351 
3352 const bool Matcher::match_rule_supported_vector(int opcode, int vlen) {
3353 
3354   // TODO
3355   // identify extra cases that we might want to provide match rules for
3356   // e.g. Op_ vector nodes and other intrinsics while guarding with vlen
3357   bool ret_value = match_rule_supported(opcode);
3358   // Add rules here.
3359 
3360   return ret_value;  // Per default match rules are supported.
3361 }
3362 
3363 const bool Matcher::has_predicated_vectors(void) {
3364   return false;
3365 }
3366 
3367 const int Matcher::float_pressure(int default_pressure_threshold) {
3368   return default_pressure_threshold;
3369 }
3370 
3371 int Matcher::regnum_to_fpu_offset(int regnum)
3372 {
3373   Unimplemented();
3374   return 0;
3375 }
3376 
3377 // Is this branch offset short enough that a short branch can be used?
3378 //
3379 // NOTE: If the platform does not provide any short branch variants, then
3380 //       this method should return false for offset 0.
3381 bool Matcher::is_short_branch_offset(int rule, int br_size, int offset) {
3382   // The passed offset is relative to address of the branch.
3383 
3384   return (-32768 <= offset && offset < 32768);


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