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src/cpu/x86/vm/x86.ad

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*** 1752,1761 **** --- 1752,1777 ---- } return ret_value; // Per default match rules are supported. } + const bool Matcher::has_predicated_vectors(void) { + bool ret_value = false; + switch(UseAVX) { + case 0: + case 1: + case 2: + break; + + case 3: + ret_value = VM_Version::supports_avx512vl(); + break; + } + + return ret_value; + } + const int Matcher::float_pressure(int default_pressure_threshold) { int float_pressure_threshold = default_pressure_threshold; #ifdef _LP64 if (UseAVX > 2) { // Increase pressure threshold on machines with AVX3 which have
*** 1869,1879 **** break; case Op_VecY: __ vmovdqu(as_XMMRegister(Matcher::_regEncode[dst_lo]), as_XMMRegister(Matcher::_regEncode[src_lo])); break; case Op_VecZ: ! __ evmovdqul(as_XMMRegister(Matcher::_regEncode[dst_lo]), as_XMMRegister(Matcher::_regEncode[src_lo]), 2); break; default: ShouldNotReachHere(); } int size = __ offset() - offset; --- 1885,1895 ---- break; case Op_VecY: __ vmovdqu(as_XMMRegister(Matcher::_regEncode[dst_lo]), as_XMMRegister(Matcher::_regEncode[src_lo])); break; case Op_VecZ: ! __ evmovdquq(as_XMMRegister(Matcher::_regEncode[dst_lo]), as_XMMRegister(Matcher::_regEncode[src_lo]), 2); break; default: ShouldNotReachHere(); } int size = __ offset() - offset;
*** 1924,1934 **** break; case Op_VecY: __ vmovdqu(as_XMMRegister(Matcher::_regEncode[reg]), Address(rsp, stack_offset)); break; case Op_VecZ: ! __ evmovdqul(as_XMMRegister(Matcher::_regEncode[reg]), Address(rsp, stack_offset), 2); break; default: ShouldNotReachHere(); } } else { // store --- 1940,1950 ---- break; case Op_VecY: __ vmovdqu(as_XMMRegister(Matcher::_regEncode[reg]), Address(rsp, stack_offset)); break; case Op_VecZ: ! __ evmovdquq(as_XMMRegister(Matcher::_regEncode[reg]), Address(rsp, stack_offset), 2); break; default: ShouldNotReachHere(); } } else { // store
*** 1944,1954 **** break; case Op_VecY: __ vmovdqu(Address(rsp, stack_offset), as_XMMRegister(Matcher::_regEncode[reg])); break; case Op_VecZ: ! __ evmovdqul(Address(rsp, stack_offset), as_XMMRegister(Matcher::_regEncode[reg]), 2); break; default: ShouldNotReachHere(); } } --- 1960,1970 ---- break; case Op_VecY: __ vmovdqu(Address(rsp, stack_offset), as_XMMRegister(Matcher::_regEncode[reg])); break; case Op_VecZ: ! __ evmovdquq(Address(rsp, stack_offset), as_XMMRegister(Matcher::_regEncode[reg]), 2); break; default: ShouldNotReachHere(); } }
*** 2084,2093 **** --- 2100,2124 ---- uint MachNopNode::size(PhaseRegAlloc*) const { return _count; } + void MachMskNode::emit(CodeBuffer &cbuf, PhaseRegAlloc*) const { + MacroAssembler _masm(&cbuf); + __ restoremsk(); + } + + uint MachMskNode::size(PhaseRegAlloc* ra_) const { + return MachNode::size(ra_); + } + + #ifndef PRODUCT + void MachMskNode::format(PhaseRegAlloc*, outputStream* st) const { + st->print("restoremsk \t# mask restore for loops"); + } + #endif + #ifndef PRODUCT void MachBreakpointNode::format(PhaseRegAlloc*, outputStream* st) const { st->print("# breakpoint"); } #endif
*** 2170,2179 **** --- 2201,2223 ---- __ int3(); %} ins_pipe(pipe_slow); %} + // =================================EVEX special=============================== + + instruct set_mask(rRegI dst, rRegI src) %{ + predicate(VM_Version::supports_avx512vl()); + match(Set dst (MaskCreateI src)); + effect(TEMP dst); + format %{ "createmsk $dst, $src" %} + ins_encode %{ + __ createmsk($dst$$Register, $src$$Register); + %} + ins_pipe(pipe_slow); + %} + // ============================================================================ instruct addF_reg(regF dst, regF src) %{ predicate((UseSSE>=1) && (UseAVX == 0)); match(Set dst (AddF dst src));
*** 3045,3066 **** %} ins_pipe( pipe_slow ); %} // Load vectors (64 bytes long) ! instruct loadV64(vecZ dst, memory mem) %{ ! predicate(n->as_LoadVector()->memory_size() == 64); match(Set dst (LoadVector mem)); ins_cost(125); ! format %{ "vmovdqu $dst k0,$mem\t! load vector (64 bytes)" %} ins_encode %{ int vector_len = 2; __ evmovdqul($dst$$XMMRegister, $mem$$Address, vector_len); %} ins_pipe( pipe_slow ); %} // Store vectors instruct storeV4(memory mem, vecS src) %{ predicate(n->as_StoreVector()->memory_size() == 4); match(Set mem (StoreVector mem src)); ins_cost(145); --- 3089,3123 ---- %} ins_pipe( pipe_slow ); %} // Load vectors (64 bytes long) ! instruct loadV64_dword(vecZ dst, memory mem) %{ ! predicate(n->as_LoadVector()->memory_size() == 64 && n->as_LoadVector()->element_size() <= 4); match(Set dst (LoadVector mem)); ins_cost(125); ! format %{ "vmovdqul $dst k0,$mem\t! load vector (64 bytes)" %} ins_encode %{ int vector_len = 2; __ evmovdqul($dst$$XMMRegister, $mem$$Address, vector_len); %} ins_pipe( pipe_slow ); %} + // Load vectors (64 bytes long) + instruct loadV64_qword(vecZ dst, memory mem) %{ + predicate(n->as_LoadVector()->memory_size() == 64 && n->as_LoadVector()->element_size() > 4); + match(Set dst (LoadVector mem)); + ins_cost(125); + format %{ "vmovdquq $dst k0,$mem\t! load vector (64 bytes)" %} + ins_encode %{ + int vector_len = 2; + __ evmovdquq($dst$$XMMRegister, $mem$$Address, vector_len); + %} + ins_pipe( pipe_slow ); + %} + // Store vectors instruct storeV4(memory mem, vecS src) %{ predicate(n->as_StoreVector()->memory_size() == 4); match(Set mem (StoreVector mem src)); ins_cost(145);
*** 3102,3123 **** __ vmovdqu($mem$$Address, $src$$XMMRegister); %} ins_pipe( pipe_slow ); %} ! instruct storeV64(memory mem, vecZ src) %{ ! predicate(n->as_StoreVector()->memory_size() == 64); match(Set mem (StoreVector mem src)); ins_cost(145); ! format %{ "vmovdqu $mem k0,$src\t! store vector (64 bytes)" %} ins_encode %{ int vector_len = 2; __ evmovdqul($mem$$Address, $src$$XMMRegister, vector_len); %} ins_pipe( pipe_slow ); %} // ====================LEGACY REPLICATE======================================= instruct Repl4B_mem(vecS dst, memory mem) %{ predicate(n->as_Vector()->length() == 4 && UseAVX > 0 && !VM_Version::supports_avx512vlbw()); match(Set dst (ReplicateB (LoadB mem))); --- 3159,3192 ---- __ vmovdqu($mem$$Address, $src$$XMMRegister); %} ins_pipe( pipe_slow ); %} ! instruct storeV64_dword(memory mem, vecZ src) %{ ! predicate(n->as_StoreVector()->memory_size() == 64 && n->as_StoreVector()->element_size() <= 4); match(Set mem (StoreVector mem src)); ins_cost(145); ! format %{ "vmovdqul $mem k0,$src\t! store vector (64 bytes)" %} ins_encode %{ int vector_len = 2; __ evmovdqul($mem$$Address, $src$$XMMRegister, vector_len); %} ins_pipe( pipe_slow ); %} + instruct storeV64_qword(memory mem, vecZ src) %{ + predicate(n->as_StoreVector()->memory_size() == 64 && n->as_StoreVector()->element_size() > 4); + match(Set mem (StoreVector mem src)); + ins_cost(145); + format %{ "vmovdquq $mem k0,$src\t! store vector (64 bytes)" %} + ins_encode %{ + int vector_len = 2; + __ evmovdquq($mem$$Address, $src$$XMMRegister, vector_len); + %} + ins_pipe( pipe_slow ); + %} + // ====================LEGACY REPLICATE======================================= instruct Repl4B_mem(vecS dst, memory mem) %{ predicate(n->as_Vector()->length() == 4 && UseAVX > 0 && !VM_Version::supports_avx512vlbw()); match(Set dst (ReplicateB (LoadB mem)));
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