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src/cpu/x86/vm/x86_64.ad

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1064       __ movl(Address(rsp, dst_offset), rax);
1065       __ movq(rax, Address(rsp, -8));
1066       break;
1067     case Op_VecD:
1068       __ pushq(Address(rsp, src_offset));
1069       __ popq (Address(rsp, dst_offset));
1070       break;
1071     case Op_VecX:
1072       __ pushq(Address(rsp, src_offset));
1073       __ popq (Address(rsp, dst_offset));
1074       __ pushq(Address(rsp, src_offset+8));
1075       __ popq (Address(rsp, dst_offset+8));
1076       break;
1077     case Op_VecY:
1078       __ vmovdqu(Address(rsp, -32), xmm0);
1079       __ vmovdqu(xmm0, Address(rsp, src_offset));
1080       __ vmovdqu(Address(rsp, dst_offset), xmm0);
1081       __ vmovdqu(xmm0, Address(rsp, -32));
1082       break;
1083     case Op_VecZ:
1084       __ evmovdqul(Address(rsp, -64), xmm0, 2);
1085       __ evmovdqul(xmm0, Address(rsp, src_offset), 2);
1086       __ evmovdqul(Address(rsp, dst_offset), xmm0, 2);
1087       __ evmovdqul(xmm0, Address(rsp, -64), 2);
1088       break;
1089     default:
1090       ShouldNotReachHere();
1091     }
1092 #ifndef PRODUCT
1093   } else {
1094     switch (ireg) {
1095     case Op_VecS:
1096       st->print("movq    [rsp - #8], rax\t# 32-bit mem-mem spill\n\t"
1097                 "movl    rax, [rsp + #%d]\n\t"
1098                 "movl    [rsp + #%d], rax\n\t"
1099                 "movq    rax, [rsp - #8]",
1100                 src_offset, dst_offset);
1101       break;
1102     case Op_VecD:
1103       st->print("pushq   [rsp + #%d]\t# 64-bit mem-mem spill\n\t"
1104                 "popq    [rsp + #%d]",
1105                 src_offset, dst_offset);
1106       break;
1107      case Op_VecX:




1064       __ movl(Address(rsp, dst_offset), rax);
1065       __ movq(rax, Address(rsp, -8));
1066       break;
1067     case Op_VecD:
1068       __ pushq(Address(rsp, src_offset));
1069       __ popq (Address(rsp, dst_offset));
1070       break;
1071     case Op_VecX:
1072       __ pushq(Address(rsp, src_offset));
1073       __ popq (Address(rsp, dst_offset));
1074       __ pushq(Address(rsp, src_offset+8));
1075       __ popq (Address(rsp, dst_offset+8));
1076       break;
1077     case Op_VecY:
1078       __ vmovdqu(Address(rsp, -32), xmm0);
1079       __ vmovdqu(xmm0, Address(rsp, src_offset));
1080       __ vmovdqu(Address(rsp, dst_offset), xmm0);
1081       __ vmovdqu(xmm0, Address(rsp, -32));
1082       break;
1083     case Op_VecZ:
1084       __ evmovdquq(Address(rsp, -64), xmm0, 2);
1085       __ evmovdquq(xmm0, Address(rsp, src_offset), 2);
1086       __ evmovdquq(Address(rsp, dst_offset), xmm0, 2);
1087       __ evmovdquq(xmm0, Address(rsp, -64), 2);
1088       break;
1089     default:
1090       ShouldNotReachHere();
1091     }
1092 #ifndef PRODUCT
1093   } else {
1094     switch (ireg) {
1095     case Op_VecS:
1096       st->print("movq    [rsp - #8], rax\t# 32-bit mem-mem spill\n\t"
1097                 "movl    rax, [rsp + #%d]\n\t"
1098                 "movl    [rsp + #%d], rax\n\t"
1099                 "movq    rax, [rsp - #8]",
1100                 src_offset, dst_offset);
1101       break;
1102     case Op_VecD:
1103       st->print("pushq   [rsp + #%d]\t# 64-bit mem-mem spill\n\t"
1104                 "popq    [rsp + #%d]",
1105                 src_offset, dst_offset);
1106       break;
1107      case Op_VecX:


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