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src/share/vm/opto/matcher.hpp

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 256   //   _new_SP + max outgoing arguments of all calls
 257   OptoReg::Name _out_arg_limit;
 258 
 259   OptoRegPair *_parm_regs;        // Array of machine registers per argument
 260   RegMask *_calling_convention_mask; // Array of RegMasks per argument
 261 
 262   // Does matcher have a match rule for this ideal node?
 263   static const bool has_match_rule(int opcode);
 264   static const bool _hasMatchRule[_last_opcode];
 265 
 266   // Does matcher have a match rule for this ideal node and is the
 267   // predicate (if there is one) true?
 268   // NOTE: If this function is used more commonly in the future, ADLC
 269   // should generate this one.
 270   static const bool match_rule_supported(int opcode);
 271 
 272   // identify extra cases that we might want to provide match rules for
 273   // e.g. Op_ vector nodes and other intrinsics while guarding with vlen
 274   static const bool match_rule_supported_vector(int opcode, int vlen);
 275 



 276   // Some uarchs have different sized float register resources
 277   static const int float_pressure(int default_pressure_threshold);
 278 
 279   // Used to determine if we have fast l2f conversion
 280   // USII has it, USIII doesn't
 281   static const bool convL2FSupported(void);
 282 
 283   // Vector width in bytes
 284   static const int vector_width_in_bytes(BasicType bt);
 285 
 286   // Limits on vector size (number of elements).
 287   static const int max_vector_size(const BasicType bt);
 288   static const int min_vector_size(const BasicType bt);
 289   static const bool vector_size_supported(const BasicType bt, int size) {
 290     return (Matcher::max_vector_size(bt) >= size &&
 291             Matcher::min_vector_size(bt) <= size);
 292   }
 293 
 294   // Vector ideal reg
 295   static const int vector_ideal_reg(int len);




 256   //   _new_SP + max outgoing arguments of all calls
 257   OptoReg::Name _out_arg_limit;
 258 
 259   OptoRegPair *_parm_regs;        // Array of machine registers per argument
 260   RegMask *_calling_convention_mask; // Array of RegMasks per argument
 261 
 262   // Does matcher have a match rule for this ideal node?
 263   static const bool has_match_rule(int opcode);
 264   static const bool _hasMatchRule[_last_opcode];
 265 
 266   // Does matcher have a match rule for this ideal node and is the
 267   // predicate (if there is one) true?
 268   // NOTE: If this function is used more commonly in the future, ADLC
 269   // should generate this one.
 270   static const bool match_rule_supported(int opcode);
 271 
 272   // identify extra cases that we might want to provide match rules for
 273   // e.g. Op_ vector nodes and other intrinsics while guarding with vlen
 274   static const bool match_rule_supported_vector(int opcode, int vlen);
 275 
 276   // Some uarchs have predicated registers on vectors
 277   static const bool has_predicated_vectors(void);
 278 
 279   // Some uarchs have different sized float register resources
 280   static const int float_pressure(int default_pressure_threshold);
 281 
 282   // Used to determine if we have fast l2f conversion
 283   // USII has it, USIII doesn't
 284   static const bool convL2FSupported(void);
 285 
 286   // Vector width in bytes
 287   static const int vector_width_in_bytes(BasicType bt);
 288 
 289   // Limits on vector size (number of elements).
 290   static const int max_vector_size(const BasicType bt);
 291   static const int min_vector_size(const BasicType bt);
 292   static const bool vector_size_supported(const BasicType bt, int size) {
 293     return (Matcher::max_vector_size(bt) >= size &&
 294             Matcher::min_vector_size(bt) <= size);
 295   }
 296 
 297   // Vector ideal reg
 298   static const int vector_ideal_reg(int len);


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