--- old/src/cpu/x86/vm/macroAssembler_x86.cpp	2017-05-09 02:28:40.139149542 -0700
+++ new/src/cpu/x86/vm/macroAssembler_x86.cpp	2017-05-09 02:28:40.083149544 -0700
@@ -4145,17 +4145,22 @@
     movss(xmm0, nds);
     vandps(dst, xmm0, negate_field, vector_len);
     movdqu(xmm0, src);
-  } else if (nds_enc < 16) {
-    movdqu(src, xmm0);
-    vandps(xmm0, nds, negate_field, vector_len);
-    movss(dst, xmm0);
-    movdqu(xmm0, src);
   } else {
-    movdqu(src, xmm0);
-    movss(xmm0, nds);
-    vandps(xmm0, xmm0, negate_field, vector_len);
-    movss(dst, xmm0);
-    movdqu(xmm0, src);
+    if (src_enc != dst_enc) {
+      movdqu(src, xmm0);
+      movss(xmm0, nds);
+      vandps(xmm0, xmm0, negate_field, vector_len);
+      movss(dst, xmm0);
+      movdqu(xmm0, src);
+    } else {
+      subptr(rsp, 64);
+      evmovdqul(Address(rsp, 0), xmm0, Assembler::AVX_512bit);
+      movss(xmm0, nds);
+      vandps(xmm0, xmm0, negate_field, vector_len);
+      movss(dst, xmm0);
+      evmovdqul(xmm0, Address(rsp, 0), Assembler::AVX_512bit);
+      addptr(rsp, 64);
+    }
   }
 }
 
@@ -4177,17 +4182,22 @@
     movsd(xmm0, nds);
     vandpd(dst, xmm0, negate_field, vector_len);
     movdqu(xmm0, src);
-  } else if (nds_enc < 16) {
-    movdqu(src, xmm0);
-    vandpd(xmm0, nds, negate_field, vector_len);
-    movsd(dst, xmm0);
-    movdqu(xmm0, src);
   } else {
-    movdqu(src, xmm0);
-    movsd(xmm0, nds);
-    vandpd(xmm0, xmm0, negate_field, vector_len);
-    movsd(dst, xmm0);
-    movdqu(xmm0, src);
+    if (src_enc != dst_enc) {
+      movdqu(src, xmm0);
+      movsd(xmm0, nds);
+      vandpd(xmm0, xmm0, negate_field, vector_len);
+      movsd(dst, xmm0);
+      movdqu(xmm0, src);
+    } else {
+      subptr(rsp, 64);
+      evmovdqul(Address(rsp, 0), xmm0, Assembler::AVX_512bit);
+      movsd(xmm0, nds);
+      vandpd(xmm0, xmm0, negate_field, vector_len);
+      movsd(dst, xmm0);
+      evmovdqul(xmm0, Address(rsp, 0), Assembler::AVX_512bit);
+      addptr(rsp, 64);
+    }
   }
 }
 
@@ -4934,6 +4944,25 @@
   }
 }
 
+void MacroAssembler::pshufd(XMMRegister dst, Address src, int mode) {
+  if (VM_Version::supports_avx512vl()) {
+    Assembler::pshufd(dst, src, mode);
+  } else {
+    int dst_enc = dst->encoding();
+    if (dst_enc < 16) {
+      Assembler::pshufd(dst, src, mode);
+    } else {
+      subptr(rsp, 64);
+      evmovdqul(Address(rsp, 0), xmm0, Assembler::AVX_512bit);
+      evmovdqul(xmm0, dst, Assembler::AVX_512bit);
+      Assembler::pshufd(xmm0, src, mode);
+      movdqu(dst, xmm0);
+      evmovdqul(xmm0, Address(rsp, 0), Assembler::AVX_512bit);
+      addptr(rsp, 64);
+    }
+  }
+}
+
 // This instruction exists within macros, ergo we cannot control its input
 // when emitted through those patterns.
 void MacroAssembler::pshuflw(XMMRegister dst, XMMRegister src, int mode) {
--- old/src/cpu/x86/vm/macroAssembler_x86.hpp	2017-05-09 02:28:40.355149536 -0700
+++ new/src/cpu/x86/vm/macroAssembler_x86.hpp	2017-05-09 02:28:40.299149538 -0700
@@ -1232,6 +1232,9 @@
   void punpcklbw(XMMRegister dst, XMMRegister src);
   void punpcklbw(XMMRegister dst, Address src) { Assembler::punpcklbw(dst, src); }
 
+  void pshufd(XMMRegister dst, Address src, int mode);
+  void pshufd(XMMRegister dst, XMMRegister src, int mode) { Assembler::pshufd(dst, src, mode); }
+
   void pshuflw(XMMRegister dst, XMMRegister src, int mode);
   void pshuflw(XMMRegister dst, Address src, int mode) { Assembler::pshuflw(dst, src, mode); }