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src/share/vm/c1/c1_LIRGenerator.cpp
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rev 9031 : 8138894: C1: Support IRIW on weak memory platforms
Reviewed-by:
@@ -1756,11 +1756,11 @@
if (is_oop) {
// Store to object so mark the card of the header
post_barrier(object.result(), value.result());
}
- if (is_volatile && os::is_MP()) {
+ if (!support_IRIW_for_not_multiple_copy_atomic_cpu && is_volatile && os::is_MP()) {
__ membar();
}
}
@@ -1817,10 +1817,14 @@
address = new LIR_Address(object.result(), PATCHED_ADDR, field_type);
} else {
address = generate_address(object.result(), x->offset(), field_type);
}
+ if (support_IRIW_for_not_multiple_copy_atomic_cpu && is_volatile && os::is_MP()) {
+ __ membar();
+ }
+
bool needs_atomic_access = is_volatile || AlwaysAtomicAccesses;
if (needs_atomic_access && !needs_patching) {
volatile_field_load(address, reg, info);
} else {
LIR_PatchCode patch_code = needs_patching ? lir_patch_normal : lir_patch_none;
@@ -2233,10 +2237,14 @@
off.load_item();
src.load_item();
LIR_Opr value = rlock_result(x, x->basic_type());
+ if (support_IRIW_for_not_multiple_copy_atomic_cpu && x->is_volatile() && os::is_MP()) {
+ __ membar();
+ }
+
get_Object_unsafe(value, src.result(), off.result(), type, x->is_volatile());
#if INCLUDE_ALL_GCS
// We might be reading the value of the referent field of a
// Reference object in order to attach it back to the live
@@ -2390,11 +2398,11 @@
set_no_result(x);
if (x->is_volatile() && os::is_MP()) __ membar_release();
put_Object_unsafe(src.result(), off.result(), data.result(), type, x->is_volatile());
- if (x->is_volatile() && os::is_MP()) __ membar();
+ if (!support_IRIW_for_not_multiple_copy_atomic_cpu && x->is_volatile() && os::is_MP()) __ membar();
}
void LIRGenerator::do_SwitchRanges(SwitchRangeArray* x, LIR_Opr value, BlockBegin* default_sux) {
int lng = x->length();
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