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src/share/vm/c1/c1_LIR.hpp

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rev 9434 : 8138952: C1: Distinguish between PPC32 and PPC64
Reviewed-by: twisti


 631 #endif
 632 #if defined(X86) || defined(AARCH64)
 633   static LIR_Opr double_fpu(int reg)            { return (LIR_Opr)(intptr_t)((reg  << LIR_OprDesc::reg1_shift) |
 634                                                                              (reg  << LIR_OprDesc::reg2_shift) |
 635                                                                              LIR_OprDesc::double_type          |
 636                                                                              LIR_OprDesc::fpu_register         |
 637                                                                              LIR_OprDesc::double_size); }
 638 
 639   static LIR_Opr single_xmm(int reg)            { return (LIR_Opr)(intptr_t)((reg  << LIR_OprDesc::reg1_shift) |
 640                                                                              LIR_OprDesc::float_type           |
 641                                                                              LIR_OprDesc::fpu_register         |
 642                                                                              LIR_OprDesc::single_size          |
 643                                                                              LIR_OprDesc::is_xmm_mask); }
 644   static LIR_Opr double_xmm(int reg)            { return (LIR_Opr)(intptr_t)((reg  << LIR_OprDesc::reg1_shift) |
 645                                                                              (reg  << LIR_OprDesc::reg2_shift) |
 646                                                                              LIR_OprDesc::double_type          |
 647                                                                              LIR_OprDesc::fpu_register         |
 648                                                                              LIR_OprDesc::double_size          |
 649                                                                              LIR_OprDesc::is_xmm_mask); }
 650 #endif // X86
 651 #ifdef PPC
 652   static LIR_Opr double_fpu(int reg)            { return (LIR_Opr)(intptr_t)((reg  << LIR_OprDesc::reg1_shift) |
 653                                                                              (reg  << LIR_OprDesc::reg2_shift) |
 654                                                                              LIR_OprDesc::double_type          |
 655                                                                              LIR_OprDesc::fpu_register         |
 656                                                                              LIR_OprDesc::double_size); }


 657   static LIR_Opr single_softfp(int reg)            { return (LIR_Opr)((reg  << LIR_OprDesc::reg1_shift)        |
 658                                                                              LIR_OprDesc::float_type           |
 659                                                                              LIR_OprDesc::cpu_register         |
 660                                                                              LIR_OprDesc::single_size); }
 661   static LIR_Opr double_softfp(int reg1, int reg2) { return (LIR_Opr)((reg2 << LIR_OprDesc::reg1_shift)        |
 662                                                                              (reg1 << LIR_OprDesc::reg2_shift) |
 663                                                                              LIR_OprDesc::double_type          |
 664                                                                              LIR_OprDesc::cpu_register         |
 665                                                                              LIR_OprDesc::double_size); }
 666 #endif // PPC
 667 
 668   static LIR_Opr virtual_register(int index, BasicType type) {
 669     LIR_Opr res;
 670     switch (type) {
 671       case T_OBJECT: // fall through
 672       case T_ARRAY:
 673         res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift)  |
 674                                             LIR_OprDesc::object_type  |
 675                                             LIR_OprDesc::cpu_register |
 676                                             LIR_OprDesc::single_size  |
 677                                             LIR_OprDesc::virtual_mask);
 678         break;
 679 
 680       case T_METADATA:
 681         res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift)  |
 682                                             LIR_OprDesc::metadata_type|
 683                                             LIR_OprDesc::cpu_register |
 684                                             LIR_OprDesc::single_size  |
 685                                             LIR_OprDesc::virtual_mask);
 686         break;


1458   CodeStub*     stub()        const              { return _stub;       }
1459 
1460   void          change_block(BlockBegin* b);
1461   void          change_ublock(BlockBegin* b);
1462   void          negate_cond();
1463 
1464   virtual void emit_code(LIR_Assembler* masm);
1465   virtual LIR_OpBranch* as_OpBranch() { return this; }
1466   virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1467 };
1468 
1469 
1470 class ConversionStub;
1471 
1472 class LIR_OpConvert: public LIR_Op1 {
1473  friend class LIR_OpVisitState;
1474 
1475  private:
1476    Bytecodes::Code _bytecode;
1477    ConversionStub* _stub;
1478 #ifdef PPC
1479   LIR_Opr _tmp1;
1480   LIR_Opr _tmp2;
1481 #endif
1482 
1483  public:
1484    LIR_OpConvert(Bytecodes::Code code, LIR_Opr opr, LIR_Opr result, ConversionStub* stub)
1485      : LIR_Op1(lir_convert, opr, result)
1486      , _stub(stub)
1487 #ifdef PPC
1488      , _tmp1(LIR_OprDesc::illegalOpr())
1489      , _tmp2(LIR_OprDesc::illegalOpr())
1490 #endif
1491      , _bytecode(code)                           {}
1492 
1493 #ifdef PPC
1494    LIR_OpConvert(Bytecodes::Code code, LIR_Opr opr, LIR_Opr result, ConversionStub* stub
1495                  ,LIR_Opr tmp1, LIR_Opr tmp2)
1496      : LIR_Op1(lir_convert, opr, result)
1497      , _stub(stub)
1498      , _tmp1(tmp1)
1499      , _tmp2(tmp2)
1500      , _bytecode(code)                           {}
1501 #endif
1502 
1503   Bytecodes::Code bytecode() const               { return _bytecode; }
1504   ConversionStub* stub() const                   { return _stub; }
1505 #ifdef PPC
1506   LIR_Opr tmp1() const                           { return _tmp1; }
1507   LIR_Opr tmp2() const                           { return _tmp2; }
1508 #endif
1509 
1510   virtual void emit_code(LIR_Assembler* masm);
1511   virtual LIR_OpConvert* as_OpConvert() { return this; }
1512   virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1513 
1514   static void print_bytecode(outputStream* out, Bytecodes::Code code) PRODUCT_RETURN;
1515 };
1516 
1517 
1518 // LIR_OpAllocObj
1519 class LIR_OpAllocObj : public LIR_Op1 {
1520  friend class LIR_OpVisitState;
1521 
1522  private:
1523   LIR_Opr _tmp1;
1524   LIR_Opr _tmp2;
1525   LIR_Opr _tmp3;


2125   }
2126   void move_wide(LIR_Opr src, LIR_Address* dst, CodeEmitInfo* info = NULL) {
2127     if (UseCompressedOops) {
2128       append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), dst->type(), lir_patch_none, info, lir_move_wide));
2129     } else {
2130       move(src, dst, info);
2131     }
2132   }
2133   void volatile_move(LIR_Opr src, LIR_Opr dst, BasicType type, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none) { append(new LIR_Op1(lir_move, src, dst, type, patch_code, info, lir_move_volatile)); }
2134 
2135   void oop2reg  (jobject o, LIR_Opr reg)         { assert(reg->type() == T_OBJECT, "bad reg"); append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o),    reg));   }
2136   void oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info);
2137 
2138   void metadata2reg  (Metadata* o, LIR_Opr reg)  { assert(reg->type() == T_METADATA, "bad reg"); append(new LIR_Op1(lir_move, LIR_OprFact::metadataConst(o), reg));   }
2139   void klass2reg_patch(Metadata* o, LIR_Opr reg, CodeEmitInfo* info);
2140 
2141   void return_op(LIR_Opr result)                 { append(new LIR_Op1(lir_return, result)); }
2142 
2143   void safepoint(LIR_Opr tmp, CodeEmitInfo* info)  { append(new LIR_Op1(lir_safepoint, tmp, info)); }
2144 
2145 #ifdef PPC
2146   void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_OpConvert(code, left, dst, NULL, tmp1, tmp2)); }
2147 #endif
2148   void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, ConversionStub* stub = NULL/*, bool is_32bit = false*/) { append(new LIR_OpConvert(code, left, dst, stub)); }
2149 
2150   void logical_and (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_and,  left, right, dst)); }
2151   void logical_or  (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_or,   left, right, dst)); }
2152   void logical_xor (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_xor,  left, right, dst)); }
2153 
2154   void   pack64(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_pack64,   src, dst, T_LONG, lir_patch_none, NULL)); }
2155   void unpack64(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_unpack64, src, dst, T_LONG, lir_patch_none, NULL)); }
2156 
2157   void null_check(LIR_Opr opr, CodeEmitInfo* info)         { append(new LIR_Op1(lir_null_check, opr, info)); }
2158   void throw_exception(LIR_Opr exceptionPC, LIR_Opr exceptionOop, CodeEmitInfo* info) {
2159     append(new LIR_Op2(lir_throw, exceptionPC, exceptionOop, LIR_OprFact::illegalOpr, info));
2160   }
2161   void unwind_exception(LIR_Opr exceptionOop) {
2162     append(new LIR_Op1(lir_unwind, exceptionOop));
2163   }
2164 
2165   void compare_to (LIR_Opr left, LIR_Opr right, LIR_Opr dst) {




 631 #endif
 632 #if defined(X86) || defined(AARCH64)
 633   static LIR_Opr double_fpu(int reg)            { return (LIR_Opr)(intptr_t)((reg  << LIR_OprDesc::reg1_shift) |
 634                                                                              (reg  << LIR_OprDesc::reg2_shift) |
 635                                                                              LIR_OprDesc::double_type          |
 636                                                                              LIR_OprDesc::fpu_register         |
 637                                                                              LIR_OprDesc::double_size); }
 638 
 639   static LIR_Opr single_xmm(int reg)            { return (LIR_Opr)(intptr_t)((reg  << LIR_OprDesc::reg1_shift) |
 640                                                                              LIR_OprDesc::float_type           |
 641                                                                              LIR_OprDesc::fpu_register         |
 642                                                                              LIR_OprDesc::single_size          |
 643                                                                              LIR_OprDesc::is_xmm_mask); }
 644   static LIR_Opr double_xmm(int reg)            { return (LIR_Opr)(intptr_t)((reg  << LIR_OprDesc::reg1_shift) |
 645                                                                              (reg  << LIR_OprDesc::reg2_shift) |
 646                                                                              LIR_OprDesc::double_type          |
 647                                                                              LIR_OprDesc::fpu_register         |
 648                                                                              LIR_OprDesc::double_size          |
 649                                                                              LIR_OprDesc::is_xmm_mask); }
 650 #endif // X86
 651 #if defined(PPC)
 652   static LIR_Opr double_fpu(int reg)            { return (LIR_Opr)(intptr_t)((reg  << LIR_OprDesc::reg1_shift) |
 653                                                                              (reg  << LIR_OprDesc::reg2_shift) |
 654                                                                              LIR_OprDesc::double_type          |
 655                                                                              LIR_OprDesc::fpu_register         |
 656                                                                              LIR_OprDesc::double_size); }
 657 #endif
 658 #ifdef PPC32
 659   static LIR_Opr single_softfp(int reg)            { return (LIR_Opr)((reg  << LIR_OprDesc::reg1_shift)        |
 660                                                                              LIR_OprDesc::float_type           |
 661                                                                              LIR_OprDesc::cpu_register         |
 662                                                                              LIR_OprDesc::single_size); }
 663   static LIR_Opr double_softfp(int reg1, int reg2) { return (LIR_Opr)((reg2 << LIR_OprDesc::reg1_shift)        |
 664                                                                              (reg1 << LIR_OprDesc::reg2_shift) |
 665                                                                              LIR_OprDesc::double_type          |
 666                                                                              LIR_OprDesc::cpu_register         |
 667                                                                              LIR_OprDesc::double_size); }
 668 #endif // PPC32
 669 
 670   static LIR_Opr virtual_register(int index, BasicType type) {
 671     LIR_Opr res;
 672     switch (type) {
 673       case T_OBJECT: // fall through
 674       case T_ARRAY:
 675         res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift)  |
 676                                             LIR_OprDesc::object_type  |
 677                                             LIR_OprDesc::cpu_register |
 678                                             LIR_OprDesc::single_size  |
 679                                             LIR_OprDesc::virtual_mask);
 680         break;
 681 
 682       case T_METADATA:
 683         res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift)  |
 684                                             LIR_OprDesc::metadata_type|
 685                                             LIR_OprDesc::cpu_register |
 686                                             LIR_OprDesc::single_size  |
 687                                             LIR_OprDesc::virtual_mask);
 688         break;


1460   CodeStub*     stub()        const              { return _stub;       }
1461 
1462   void          change_block(BlockBegin* b);
1463   void          change_ublock(BlockBegin* b);
1464   void          negate_cond();
1465 
1466   virtual void emit_code(LIR_Assembler* masm);
1467   virtual LIR_OpBranch* as_OpBranch() { return this; }
1468   virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1469 };
1470 
1471 
1472 class ConversionStub;
1473 
1474 class LIR_OpConvert: public LIR_Op1 {
1475  friend class LIR_OpVisitState;
1476 
1477  private:
1478    Bytecodes::Code _bytecode;
1479    ConversionStub* _stub;
1480 #ifdef PPC32
1481   LIR_Opr _tmp1;
1482   LIR_Opr _tmp2;
1483 #endif
1484 
1485  public:
1486    LIR_OpConvert(Bytecodes::Code code, LIR_Opr opr, LIR_Opr result, ConversionStub* stub)
1487      : LIR_Op1(lir_convert, opr, result)
1488      , _stub(stub)
1489 #ifdef PPC32
1490      , _tmp1(LIR_OprDesc::illegalOpr())
1491      , _tmp2(LIR_OprDesc::illegalOpr())
1492 #endif
1493      , _bytecode(code)                           {}
1494 
1495 #ifdef PPC32
1496    LIR_OpConvert(Bytecodes::Code code, LIR_Opr opr, LIR_Opr result, ConversionStub* stub
1497                  ,LIR_Opr tmp1, LIR_Opr tmp2)
1498      : LIR_Op1(lir_convert, opr, result)
1499      , _stub(stub)
1500      , _tmp1(tmp1)
1501      , _tmp2(tmp2)
1502      , _bytecode(code)                           {}
1503 #endif
1504 
1505   Bytecodes::Code bytecode() const               { return _bytecode; }
1506   ConversionStub* stub() const                   { return _stub; }
1507 #ifdef PPC32
1508   LIR_Opr tmp1() const                           { return _tmp1; }
1509   LIR_Opr tmp2() const                           { return _tmp2; }
1510 #endif
1511 
1512   virtual void emit_code(LIR_Assembler* masm);
1513   virtual LIR_OpConvert* as_OpConvert() { return this; }
1514   virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1515 
1516   static void print_bytecode(outputStream* out, Bytecodes::Code code) PRODUCT_RETURN;
1517 };
1518 
1519 
1520 // LIR_OpAllocObj
1521 class LIR_OpAllocObj : public LIR_Op1 {
1522  friend class LIR_OpVisitState;
1523 
1524  private:
1525   LIR_Opr _tmp1;
1526   LIR_Opr _tmp2;
1527   LIR_Opr _tmp3;


2127   }
2128   void move_wide(LIR_Opr src, LIR_Address* dst, CodeEmitInfo* info = NULL) {
2129     if (UseCompressedOops) {
2130       append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), dst->type(), lir_patch_none, info, lir_move_wide));
2131     } else {
2132       move(src, dst, info);
2133     }
2134   }
2135   void volatile_move(LIR_Opr src, LIR_Opr dst, BasicType type, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none) { append(new LIR_Op1(lir_move, src, dst, type, patch_code, info, lir_move_volatile)); }
2136 
2137   void oop2reg  (jobject o, LIR_Opr reg)         { assert(reg->type() == T_OBJECT, "bad reg"); append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o),    reg));   }
2138   void oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info);
2139 
2140   void metadata2reg  (Metadata* o, LIR_Opr reg)  { assert(reg->type() == T_METADATA, "bad reg"); append(new LIR_Op1(lir_move, LIR_OprFact::metadataConst(o), reg));   }
2141   void klass2reg_patch(Metadata* o, LIR_Opr reg, CodeEmitInfo* info);
2142 
2143   void return_op(LIR_Opr result)                 { append(new LIR_Op1(lir_return, result)); }
2144 
2145   void safepoint(LIR_Opr tmp, CodeEmitInfo* info)  { append(new LIR_Op1(lir_safepoint, tmp, info)); }
2146 
2147 #ifdef PPC32
2148   void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_OpConvert(code, left, dst, NULL, tmp1, tmp2)); }
2149 #endif
2150   void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, ConversionStub* stub = NULL/*, bool is_32bit = false*/) { append(new LIR_OpConvert(code, left, dst, stub)); }
2151 
2152   void logical_and (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_and,  left, right, dst)); }
2153   void logical_or  (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_or,   left, right, dst)); }
2154   void logical_xor (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_xor,  left, right, dst)); }
2155 
2156   void   pack64(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_pack64,   src, dst, T_LONG, lir_patch_none, NULL)); }
2157   void unpack64(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_unpack64, src, dst, T_LONG, lir_patch_none, NULL)); }
2158 
2159   void null_check(LIR_Opr opr, CodeEmitInfo* info)         { append(new LIR_Op1(lir_null_check, opr, info)); }
2160   void throw_exception(LIR_Opr exceptionPC, LIR_Opr exceptionOop, CodeEmitInfo* info) {
2161     append(new LIR_Op2(lir_throw, exceptionPC, exceptionOop, LIR_OprFact::illegalOpr, info));
2162   }
2163   void unwind_exception(LIR_Opr exceptionOop) {
2164     append(new LIR_Op1(lir_unwind, exceptionOop));
2165   }
2166 
2167   void compare_to (LIR_Opr left, LIR_Opr right, LIR_Opr dst) {


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