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src/cpu/ppc/vm/assembler_ppc.hpp

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rev 10465 : 8152172: PPC64: Support AES intrinsics
Reviewed-by: kvn, mdoerr
Contributed-by: Hiroshi H Horii <HORII@jp.ibm.com>


 607     VMINSH_OPCODE  = (4u  << OPCODE_SHIFT |  834u     ),
 608     VMINUB_OPCODE  = (4u  << OPCODE_SHIFT |  514u     ),
 609     VMINUW_OPCODE  = (4u  << OPCODE_SHIFT |  642u     ),
 610     VMINUH_OPCODE  = (4u  << OPCODE_SHIFT |  578u     ),
 611 
 612     VCMPEQUB_OPCODE= (4u  << OPCODE_SHIFT |    6u     ),
 613     VCMPEQUH_OPCODE= (4u  << OPCODE_SHIFT |   70u     ),
 614     VCMPEQUW_OPCODE= (4u  << OPCODE_SHIFT |  134u     ),
 615     VCMPGTSH_OPCODE= (4u  << OPCODE_SHIFT |  838u     ),
 616     VCMPGTSB_OPCODE= (4u  << OPCODE_SHIFT |  774u     ),
 617     VCMPGTSW_OPCODE= (4u  << OPCODE_SHIFT |  902u     ),
 618     VCMPGTUB_OPCODE= (4u  << OPCODE_SHIFT |  518u     ),
 619     VCMPGTUH_OPCODE= (4u  << OPCODE_SHIFT |  582u     ),
 620     VCMPGTUW_OPCODE= (4u  << OPCODE_SHIFT |  646u     ),
 621 
 622     VAND_OPCODE    = (4u  << OPCODE_SHIFT | 1028u     ),
 623     VANDC_OPCODE   = (4u  << OPCODE_SHIFT | 1092u     ),
 624     VNOR_OPCODE    = (4u  << OPCODE_SHIFT | 1284u     ),
 625     VOR_OPCODE     = (4u  << OPCODE_SHIFT | 1156u     ),
 626     VXOR_OPCODE    = (4u  << OPCODE_SHIFT | 1220u     ),

 627     VRLB_OPCODE    = (4u  << OPCODE_SHIFT |    4u     ),
 628     VRLW_OPCODE    = (4u  << OPCODE_SHIFT |  132u     ),
 629     VRLH_OPCODE    = (4u  << OPCODE_SHIFT |   68u     ),
 630     VSLB_OPCODE    = (4u  << OPCODE_SHIFT |  260u     ),
 631     VSKW_OPCODE    = (4u  << OPCODE_SHIFT |  388u     ),
 632     VSLH_OPCODE    = (4u  << OPCODE_SHIFT |  324u     ),
 633     VSRB_OPCODE    = (4u  << OPCODE_SHIFT |  516u     ),
 634     VSRW_OPCODE    = (4u  << OPCODE_SHIFT |  644u     ),
 635     VSRH_OPCODE    = (4u  << OPCODE_SHIFT |  580u     ),
 636     VSRAB_OPCODE   = (4u  << OPCODE_SHIFT |  772u     ),
 637     VSRAW_OPCODE   = (4u  << OPCODE_SHIFT |  900u     ),
 638     VSRAH_OPCODE   = (4u  << OPCODE_SHIFT |  836u     ),
 639 
 640     // Vector Floating-Point
 641     // not implemented yet
 642 
 643     // Vector Status and Control
 644     MTVSCR_OPCODE  = (4u  << OPCODE_SHIFT | 1604u     ),
 645     MFVSCR_OPCODE  = (4u  << OPCODE_SHIFT | 1540u     ),
 646 


2030   inline void vcmpgtsh( VectorRegister d, VectorRegister a, VectorRegister b);
2031   inline void vcmpgtsb( VectorRegister d, VectorRegister a, VectorRegister b);
2032   inline void vcmpgtsw( VectorRegister d, VectorRegister a, VectorRegister b);
2033   inline void vcmpgtub( VectorRegister d, VectorRegister a, VectorRegister b);
2034   inline void vcmpgtuh( VectorRegister d, VectorRegister a, VectorRegister b);
2035   inline void vcmpgtuw( VectorRegister d, VectorRegister a, VectorRegister b);
2036   inline void vcmpequb_(VectorRegister d, VectorRegister a, VectorRegister b);
2037   inline void vcmpequh_(VectorRegister d, VectorRegister a, VectorRegister b);
2038   inline void vcmpequw_(VectorRegister d, VectorRegister a, VectorRegister b);
2039   inline void vcmpgtsh_(VectorRegister d, VectorRegister a, VectorRegister b);
2040   inline void vcmpgtsb_(VectorRegister d, VectorRegister a, VectorRegister b);
2041   inline void vcmpgtsw_(VectorRegister d, VectorRegister a, VectorRegister b);
2042   inline void vcmpgtub_(VectorRegister d, VectorRegister a, VectorRegister b);
2043   inline void vcmpgtuh_(VectorRegister d, VectorRegister a, VectorRegister b);
2044   inline void vcmpgtuw_(VectorRegister d, VectorRegister a, VectorRegister b);
2045   inline void vand(     VectorRegister d, VectorRegister a, VectorRegister b);
2046   inline void vandc(    VectorRegister d, VectorRegister a, VectorRegister b);
2047   inline void vnor(     VectorRegister d, VectorRegister a, VectorRegister b);
2048   inline void vor(      VectorRegister d, VectorRegister a, VectorRegister b);
2049   inline void vxor(     VectorRegister d, VectorRegister a, VectorRegister b);

2050   inline void vrlb(     VectorRegister d, VectorRegister a, VectorRegister b);
2051   inline void vrlw(     VectorRegister d, VectorRegister a, VectorRegister b);
2052   inline void vrlh(     VectorRegister d, VectorRegister a, VectorRegister b);
2053   inline void vslb(     VectorRegister d, VectorRegister a, VectorRegister b);
2054   inline void vskw(     VectorRegister d, VectorRegister a, VectorRegister b);
2055   inline void vslh(     VectorRegister d, VectorRegister a, VectorRegister b);
2056   inline void vsrb(     VectorRegister d, VectorRegister a, VectorRegister b);
2057   inline void vsrw(     VectorRegister d, VectorRegister a, VectorRegister b);
2058   inline void vsrh(     VectorRegister d, VectorRegister a, VectorRegister b);
2059   inline void vsrab(    VectorRegister d, VectorRegister a, VectorRegister b);
2060   inline void vsraw(    VectorRegister d, VectorRegister a, VectorRegister b);
2061   inline void vsrah(    VectorRegister d, VectorRegister a, VectorRegister b);
2062   // Vector Floating-Point not implemented yet
2063   inline void mtvscr(   VectorRegister b);
2064   inline void mfvscr(   VectorRegister d);
2065 
2066   // AES (introduced with Power 8)
2067   inline void vcipher(     VectorRegister d, VectorRegister a, VectorRegister b);
2068   inline void vcipherlast( VectorRegister d, VectorRegister a, VectorRegister b);
2069   inline void vncipher(    VectorRegister d, VectorRegister a, VectorRegister b);




 607     VMINSH_OPCODE  = (4u  << OPCODE_SHIFT |  834u     ),
 608     VMINUB_OPCODE  = (4u  << OPCODE_SHIFT |  514u     ),
 609     VMINUW_OPCODE  = (4u  << OPCODE_SHIFT |  642u     ),
 610     VMINUH_OPCODE  = (4u  << OPCODE_SHIFT |  578u     ),
 611 
 612     VCMPEQUB_OPCODE= (4u  << OPCODE_SHIFT |    6u     ),
 613     VCMPEQUH_OPCODE= (4u  << OPCODE_SHIFT |   70u     ),
 614     VCMPEQUW_OPCODE= (4u  << OPCODE_SHIFT |  134u     ),
 615     VCMPGTSH_OPCODE= (4u  << OPCODE_SHIFT |  838u     ),
 616     VCMPGTSB_OPCODE= (4u  << OPCODE_SHIFT |  774u     ),
 617     VCMPGTSW_OPCODE= (4u  << OPCODE_SHIFT |  902u     ),
 618     VCMPGTUB_OPCODE= (4u  << OPCODE_SHIFT |  518u     ),
 619     VCMPGTUH_OPCODE= (4u  << OPCODE_SHIFT |  582u     ),
 620     VCMPGTUW_OPCODE= (4u  << OPCODE_SHIFT |  646u     ),
 621 
 622     VAND_OPCODE    = (4u  << OPCODE_SHIFT | 1028u     ),
 623     VANDC_OPCODE   = (4u  << OPCODE_SHIFT | 1092u     ),
 624     VNOR_OPCODE    = (4u  << OPCODE_SHIFT | 1284u     ),
 625     VOR_OPCODE     = (4u  << OPCODE_SHIFT | 1156u     ),
 626     VXOR_OPCODE    = (4u  << OPCODE_SHIFT | 1220u     ),
 627     VRLD_OPCODE    = (4u  << OPCODE_SHIFT |  196u     ),
 628     VRLB_OPCODE    = (4u  << OPCODE_SHIFT |    4u     ),
 629     VRLW_OPCODE    = (4u  << OPCODE_SHIFT |  132u     ),
 630     VRLH_OPCODE    = (4u  << OPCODE_SHIFT |   68u     ),
 631     VSLB_OPCODE    = (4u  << OPCODE_SHIFT |  260u     ),
 632     VSKW_OPCODE    = (4u  << OPCODE_SHIFT |  388u     ),
 633     VSLH_OPCODE    = (4u  << OPCODE_SHIFT |  324u     ),
 634     VSRB_OPCODE    = (4u  << OPCODE_SHIFT |  516u     ),
 635     VSRW_OPCODE    = (4u  << OPCODE_SHIFT |  644u     ),
 636     VSRH_OPCODE    = (4u  << OPCODE_SHIFT |  580u     ),
 637     VSRAB_OPCODE   = (4u  << OPCODE_SHIFT |  772u     ),
 638     VSRAW_OPCODE   = (4u  << OPCODE_SHIFT |  900u     ),
 639     VSRAH_OPCODE   = (4u  << OPCODE_SHIFT |  836u     ),
 640 
 641     // Vector Floating-Point
 642     // not implemented yet
 643 
 644     // Vector Status and Control
 645     MTVSCR_OPCODE  = (4u  << OPCODE_SHIFT | 1604u     ),
 646     MFVSCR_OPCODE  = (4u  << OPCODE_SHIFT | 1540u     ),
 647 


2031   inline void vcmpgtsh( VectorRegister d, VectorRegister a, VectorRegister b);
2032   inline void vcmpgtsb( VectorRegister d, VectorRegister a, VectorRegister b);
2033   inline void vcmpgtsw( VectorRegister d, VectorRegister a, VectorRegister b);
2034   inline void vcmpgtub( VectorRegister d, VectorRegister a, VectorRegister b);
2035   inline void vcmpgtuh( VectorRegister d, VectorRegister a, VectorRegister b);
2036   inline void vcmpgtuw( VectorRegister d, VectorRegister a, VectorRegister b);
2037   inline void vcmpequb_(VectorRegister d, VectorRegister a, VectorRegister b);
2038   inline void vcmpequh_(VectorRegister d, VectorRegister a, VectorRegister b);
2039   inline void vcmpequw_(VectorRegister d, VectorRegister a, VectorRegister b);
2040   inline void vcmpgtsh_(VectorRegister d, VectorRegister a, VectorRegister b);
2041   inline void vcmpgtsb_(VectorRegister d, VectorRegister a, VectorRegister b);
2042   inline void vcmpgtsw_(VectorRegister d, VectorRegister a, VectorRegister b);
2043   inline void vcmpgtub_(VectorRegister d, VectorRegister a, VectorRegister b);
2044   inline void vcmpgtuh_(VectorRegister d, VectorRegister a, VectorRegister b);
2045   inline void vcmpgtuw_(VectorRegister d, VectorRegister a, VectorRegister b);
2046   inline void vand(     VectorRegister d, VectorRegister a, VectorRegister b);
2047   inline void vandc(    VectorRegister d, VectorRegister a, VectorRegister b);
2048   inline void vnor(     VectorRegister d, VectorRegister a, VectorRegister b);
2049   inline void vor(      VectorRegister d, VectorRegister a, VectorRegister b);
2050   inline void vxor(     VectorRegister d, VectorRegister a, VectorRegister b);
2051   inline void vrld(     VectorRegister d, VectorRegister a, VectorRegister b);
2052   inline void vrlb(     VectorRegister d, VectorRegister a, VectorRegister b);
2053   inline void vrlw(     VectorRegister d, VectorRegister a, VectorRegister b);
2054   inline void vrlh(     VectorRegister d, VectorRegister a, VectorRegister b);
2055   inline void vslb(     VectorRegister d, VectorRegister a, VectorRegister b);
2056   inline void vskw(     VectorRegister d, VectorRegister a, VectorRegister b);
2057   inline void vslh(     VectorRegister d, VectorRegister a, VectorRegister b);
2058   inline void vsrb(     VectorRegister d, VectorRegister a, VectorRegister b);
2059   inline void vsrw(     VectorRegister d, VectorRegister a, VectorRegister b);
2060   inline void vsrh(     VectorRegister d, VectorRegister a, VectorRegister b);
2061   inline void vsrab(    VectorRegister d, VectorRegister a, VectorRegister b);
2062   inline void vsraw(    VectorRegister d, VectorRegister a, VectorRegister b);
2063   inline void vsrah(    VectorRegister d, VectorRegister a, VectorRegister b);
2064   // Vector Floating-Point not implemented yet
2065   inline void mtvscr(   VectorRegister b);
2066   inline void mfvscr(   VectorRegister d);
2067 
2068   // AES (introduced with Power 8)
2069   inline void vcipher(     VectorRegister d, VectorRegister a, VectorRegister b);
2070   inline void vcipherlast( VectorRegister d, VectorRegister a, VectorRegister b);
2071   inline void vncipher(    VectorRegister d, VectorRegister a, VectorRegister b);


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