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src/cpu/ppc/vm/c1_LIRGenerator_ppc.cpp

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rev 11926 : 8166140: C1: Possible integer overflow in LIRGenerator::generate_address on several platforms
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 140     return Assembler::is_simm16(c->as_jint());
 141   }
 142   if (c->type() == T_LONG) {
 143     return Assembler::is_simm16(c->as_jlong());
 144   }
 145   if (c->type() == T_OBJECT) {
 146     return c->as_jobject() == NULL;
 147   }
 148   return false;
 149 }
 150 
 151 
 152 LIR_Opr LIRGenerator::safepoint_poll_register() {
 153   return new_register(T_INT);
 154 }
 155 
 156 
 157 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index,
 158                                             int shift, int disp, BasicType type) {
 159   assert(base->is_register(), "must be");

 160 
 161   // Accumulate fixed displacements.
 162   if (index->is_constant()) {
 163     disp += index->as_constant_ptr()->as_jint() << shift;
 164     index = LIR_OprFact::illegalOpr;
 165   }
 166 
 167   if (index->is_register()) {
 168     // Apply the shift and accumulate the displacement.
 169     if (shift > 0) {
 170       LIR_Opr tmp = new_pointer_register();
 171       __ shift_left(index, shift, tmp);
 172       index = tmp;
 173     }
 174     if (disp != 0) {
 175       LIR_Opr tmp = new_pointer_register();
 176       if (Assembler::is_simm16(disp)) {
 177         __ add(index, LIR_OprFact::intptrConst(disp), tmp);
 178         index = tmp;
 179       } else {
 180         __ move(LIR_OprFact::intptrConst(disp), tmp);
 181         __ add(tmp, index, tmp);
 182         index = tmp;
 183       }
 184       disp = 0;
 185     }
 186   } else if (!Assembler::is_simm16(disp)) {
 187     // Index is illegal so replace it with the displacement loaded into a register.
 188     index = new_pointer_register();
 189     __ move(LIR_OprFact::intptrConst(disp), index);
 190     disp = 0;
 191   }
 192 
 193   // At this point we either have base + index or base + displacement.
 194   if (disp == 0) {
 195     return new LIR_Address(base, index, type);
 196   } else {
 197     assert(Assembler::is_simm16(disp), "must be");
 198     return new LIR_Address(base, disp, type);
 199   }
 200 }
 201 
 202 
 203 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr,
 204                                               BasicType type, bool needs_card_mark) {
 205   int elem_size = type2aelembytes(type);
 206   int shift = exact_log2(elem_size);
 207 
 208   LIR_Opr base_opr;
 209   int offset = arrayOopDesc::base_offset_in_bytes(type);
 210 
 211   if (index_opr->is_constant()) {
 212     int i = index_opr->as_constant_ptr()->as_jint();
 213     int array_offset = i * elem_size;
 214     if (Assembler::is_simm16(array_offset + offset)) {
 215       base_opr = array_opr;
 216       offset = array_offset + offset;
 217     } else {
 218       base_opr = new_pointer_register();




 140     return Assembler::is_simm16(c->as_jint());
 141   }
 142   if (c->type() == T_LONG) {
 143     return Assembler::is_simm16(c->as_jlong());
 144   }
 145   if (c->type() == T_OBJECT) {
 146     return c->as_jobject() == NULL;
 147   }
 148   return false;
 149 }
 150 
 151 
 152 LIR_Opr LIRGenerator::safepoint_poll_register() {
 153   return new_register(T_INT);
 154 }
 155 
 156 
 157 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index,
 158                                             int shift, int disp, BasicType type) {
 159   assert(base->is_register(), "must be");
 160   intx large_disp = disp;
 161 
 162   // Accumulate fixed displacements.
 163   if (index->is_constant()) {
 164     large_disp += (intx)(index->as_constant_ptr()->as_jint()) << shift;
 165     index = LIR_OprFact::illegalOpr;
 166   }
 167 
 168   if (index->is_register()) {
 169     // Apply the shift and accumulate the displacement.
 170     if (shift > 0) {
 171       LIR_Opr tmp = new_pointer_register();
 172       __ shift_left(index, shift, tmp);
 173       index = tmp;
 174     }
 175     if (large_disp != 0) {
 176       LIR_Opr tmp = new_pointer_register();
 177       if (Assembler::is_simm16(large_disp)) {
 178         __ add(index, LIR_OprFact::intptrConst(large_disp), tmp);
 179         index = tmp;
 180       } else {
 181         __ move(LIR_OprFact::intptrConst(large_disp), tmp);
 182         __ add(tmp, index, tmp);
 183         index = tmp;
 184       }
 185       large_disp = 0;
 186     }
 187   } else if (!Assembler::is_simm16(large_disp)) {
 188     // Index is illegal so replace it with the displacement loaded into a register.
 189     index = new_pointer_register();
 190     __ move(LIR_OprFact::intptrConst(large_disp), index);
 191     large_disp = 0;
 192   }
 193 
 194   // At this point we either have base + index or base + displacement.
 195   if (large_disp == 0) {
 196     return new LIR_Address(base, index, type);
 197   } else {
 198     assert(Assembler::is_simm16(large_disp), "must be");
 199     return new LIR_Address(base, large_disp, type);
 200   }
 201 }
 202 
 203 
 204 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr,
 205                                               BasicType type, bool needs_card_mark) {
 206   int elem_size = type2aelembytes(type);
 207   int shift = exact_log2(elem_size);
 208 
 209   LIR_Opr base_opr;
 210   int offset = arrayOopDesc::base_offset_in_bytes(type);
 211 
 212   if (index_opr->is_constant()) {
 213     int i = index_opr->as_constant_ptr()->as_jint();
 214     int array_offset = i * elem_size;
 215     if (Assembler::is_simm16(array_offset + offset)) {
 216       base_opr = array_opr;
 217       offset = array_offset + offset;
 218     } else {
 219       base_opr = new_pointer_register();


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