443 POPCNTB_OPCODE = (31u << OPCODE_SHIFT | 122 << 1),
444 POPCNTW_OPCODE = (31u << OPCODE_SHIFT | 378 << 1),
445 POPCNTD_OPCODE = (31u << OPCODE_SHIFT | 506 << 1),
446 FABS_OPCODE = (63u << OPCODE_SHIFT | 264u << 1),
447 FNABS_OPCODE = (63u << OPCODE_SHIFT | 136u << 1),
448 FMUL_OPCODE = (63u << OPCODE_SHIFT | 25u << 1),
449 FMULS_OPCODE = (59u << OPCODE_SHIFT | 25u << 1),
450 FNEG_OPCODE = (63u << OPCODE_SHIFT | 40u << 1),
451 FSUB_OPCODE = (63u << OPCODE_SHIFT | 20u << 1),
452 FSUBS_OPCODE = (59u << OPCODE_SHIFT | 20u << 1),
453
454 // PPC64-internal FPU conversion opcodes
455 FCFID_OPCODE = (63u << OPCODE_SHIFT | 846u << 1),
456 FCFIDS_OPCODE = (59u << OPCODE_SHIFT | 846u << 1),
457 FCTID_OPCODE = (63u << OPCODE_SHIFT | 814u << 1),
458 FCTIDZ_OPCODE = (63u << OPCODE_SHIFT | 815u << 1),
459 FCTIW_OPCODE = (63u << OPCODE_SHIFT | 14u << 1),
460 FCTIWZ_OPCODE = (63u << OPCODE_SHIFT | 15u << 1),
461 FRSP_OPCODE = (63u << OPCODE_SHIFT | 12u << 1),
462
463 // WARNING: using fmadd results in a non-compliant vm. Some floating
464 // point tck tests will fail.
465 FMADD_OPCODE = (59u << OPCODE_SHIFT | 29u << 1),
466 DMADD_OPCODE = (63u << OPCODE_SHIFT | 29u << 1),
467 FMSUB_OPCODE = (59u << OPCODE_SHIFT | 28u << 1),
468 DMSUB_OPCODE = (63u << OPCODE_SHIFT | 28u << 1),
469 FNMADD_OPCODE = (59u << OPCODE_SHIFT | 31u << 1),
470 DNMADD_OPCODE = (63u << OPCODE_SHIFT | 31u << 1),
471 FNMSUB_OPCODE = (59u << OPCODE_SHIFT | 30u << 1),
472 DNMSUB_OPCODE = (63u << OPCODE_SHIFT | 30u << 1),
473
474 LFD_OPCODE = (50u << OPCODE_SHIFT | 00u << 1),
475 LFDU_OPCODE = (51u << OPCODE_SHIFT | 00u << 1),
476 LFDX_OPCODE = (31u << OPCODE_SHIFT | 599u << 1),
477 LFS_OPCODE = (48u << OPCODE_SHIFT | 00u << 1),
478 LFSU_OPCODE = (49u << OPCODE_SHIFT | 00u << 1),
479 LFSX_OPCODE = (31u << OPCODE_SHIFT | 535u << 1),
480
481 STFD_OPCODE = (54u << OPCODE_SHIFT | 00u << 1),
482 STFDU_OPCODE = (55u << OPCODE_SHIFT | 00u << 1),
483 STFDX_OPCODE = (31u << OPCODE_SHIFT | 727u << 1),
484 STFS_OPCODE = (52u << OPCODE_SHIFT | 00u << 1),
485 STFSU_OPCODE = (53u << OPCODE_SHIFT | 00u << 1),
486 STFSX_OPCODE = (31u << OPCODE_SHIFT | 663u << 1),
487
488 FSQRT_OPCODE = (63u << OPCODE_SHIFT | 22u << 1), // A-FORM
489 FSQRTS_OPCODE = (59u << OPCODE_SHIFT | 22u << 1), // A-FORM
490
491 // Vector instruction support for >= Power6
492 // Vector Storage Access
1921 inline void fnabs( FloatRegister d, FloatRegister b);
1922 inline void fnabs_(FloatRegister d, FloatRegister b);
1923
1924 // PPC 1, section 4.6.5.1 Floating-Point Elementary Arithmetic Instructions
1925 inline void fadd( FloatRegister d, FloatRegister a, FloatRegister b);
1926 inline void fadd_( FloatRegister d, FloatRegister a, FloatRegister b);
1927 inline void fadds( FloatRegister d, FloatRegister a, FloatRegister b);
1928 inline void fadds_(FloatRegister d, FloatRegister a, FloatRegister b);
1929 inline void fsub( FloatRegister d, FloatRegister a, FloatRegister b);
1930 inline void fsub_( FloatRegister d, FloatRegister a, FloatRegister b);
1931 inline void fsubs( FloatRegister d, FloatRegister a, FloatRegister b);
1932 inline void fsubs_(FloatRegister d, FloatRegister a, FloatRegister b);
1933 inline void fmul( FloatRegister d, FloatRegister a, FloatRegister c);
1934 inline void fmul_( FloatRegister d, FloatRegister a, FloatRegister c);
1935 inline void fmuls( FloatRegister d, FloatRegister a, FloatRegister c);
1936 inline void fmuls_(FloatRegister d, FloatRegister a, FloatRegister c);
1937 inline void fdiv( FloatRegister d, FloatRegister a, FloatRegister b);
1938 inline void fdiv_( FloatRegister d, FloatRegister a, FloatRegister b);
1939 inline void fdivs( FloatRegister d, FloatRegister a, FloatRegister b);
1940 inline void fdivs_(FloatRegister d, FloatRegister a, FloatRegister b);
1941
1942 // PPC 1, section 4.6.6 Floating-Point Rounding and Conversion Instructions
1943 inline void frsp( FloatRegister d, FloatRegister b);
1944 inline void fctid( FloatRegister d, FloatRegister b);
1945 inline void fctidz(FloatRegister d, FloatRegister b);
1946 inline void fctiw( FloatRegister d, FloatRegister b);
1947 inline void fctiwz(FloatRegister d, FloatRegister b);
1948 inline void fcfid( FloatRegister d, FloatRegister b);
1949 inline void fcfids(FloatRegister d, FloatRegister b);
1950
1951 // PPC 1, section 4.6.7 Floating-Point Compare Instructions
1952 inline void fcmpu( ConditionRegister crx, FloatRegister a, FloatRegister b);
1953
1954 inline void fsqrt( FloatRegister d, FloatRegister b);
1955 inline void fsqrts(FloatRegister d, FloatRegister b);
1956
1957 // Vector instructions for >= Power6.
1958 inline void lvebx( VectorRegister d, Register s1, Register s2);
1959 inline void lvehx( VectorRegister d, Register s1, Register s2);
1960 inline void lvewx( VectorRegister d, Register s1, Register s2);
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443 POPCNTB_OPCODE = (31u << OPCODE_SHIFT | 122 << 1),
444 POPCNTW_OPCODE = (31u << OPCODE_SHIFT | 378 << 1),
445 POPCNTD_OPCODE = (31u << OPCODE_SHIFT | 506 << 1),
446 FABS_OPCODE = (63u << OPCODE_SHIFT | 264u << 1),
447 FNABS_OPCODE = (63u << OPCODE_SHIFT | 136u << 1),
448 FMUL_OPCODE = (63u << OPCODE_SHIFT | 25u << 1),
449 FMULS_OPCODE = (59u << OPCODE_SHIFT | 25u << 1),
450 FNEG_OPCODE = (63u << OPCODE_SHIFT | 40u << 1),
451 FSUB_OPCODE = (63u << OPCODE_SHIFT | 20u << 1),
452 FSUBS_OPCODE = (59u << OPCODE_SHIFT | 20u << 1),
453
454 // PPC64-internal FPU conversion opcodes
455 FCFID_OPCODE = (63u << OPCODE_SHIFT | 846u << 1),
456 FCFIDS_OPCODE = (59u << OPCODE_SHIFT | 846u << 1),
457 FCTID_OPCODE = (63u << OPCODE_SHIFT | 814u << 1),
458 FCTIDZ_OPCODE = (63u << OPCODE_SHIFT | 815u << 1),
459 FCTIW_OPCODE = (63u << OPCODE_SHIFT | 14u << 1),
460 FCTIWZ_OPCODE = (63u << OPCODE_SHIFT | 15u << 1),
461 FRSP_OPCODE = (63u << OPCODE_SHIFT | 12u << 1),
462
463 // Fused multiply-accumulate instructions.
464 FMADD_OPCODE = (63u << OPCODE_SHIFT | 29u << 1),
465 FMADDS_OPCODE = (59u << OPCODE_SHIFT | 29u << 1),
466 FMSUB_OPCODE = (63u << OPCODE_SHIFT | 28u << 1),
467 FMSUBS_OPCODE = (59u << OPCODE_SHIFT | 28u << 1),
468 FNMADD_OPCODE = (63u << OPCODE_SHIFT | 31u << 1),
469 FNMADDS_OPCODE = (59u << OPCODE_SHIFT | 31u << 1),
470 FNMSUB_OPCODE = (63u << OPCODE_SHIFT | 30u << 1),
471 FNMSUBS_OPCODE = (59u << OPCODE_SHIFT | 30u << 1),
472
473 LFD_OPCODE = (50u << OPCODE_SHIFT | 00u << 1),
474 LFDU_OPCODE = (51u << OPCODE_SHIFT | 00u << 1),
475 LFDX_OPCODE = (31u << OPCODE_SHIFT | 599u << 1),
476 LFS_OPCODE = (48u << OPCODE_SHIFT | 00u << 1),
477 LFSU_OPCODE = (49u << OPCODE_SHIFT | 00u << 1),
478 LFSX_OPCODE = (31u << OPCODE_SHIFT | 535u << 1),
479
480 STFD_OPCODE = (54u << OPCODE_SHIFT | 00u << 1),
481 STFDU_OPCODE = (55u << OPCODE_SHIFT | 00u << 1),
482 STFDX_OPCODE = (31u << OPCODE_SHIFT | 727u << 1),
483 STFS_OPCODE = (52u << OPCODE_SHIFT | 00u << 1),
484 STFSU_OPCODE = (53u << OPCODE_SHIFT | 00u << 1),
485 STFSX_OPCODE = (31u << OPCODE_SHIFT | 663u << 1),
486
487 FSQRT_OPCODE = (63u << OPCODE_SHIFT | 22u << 1), // A-FORM
488 FSQRTS_OPCODE = (59u << OPCODE_SHIFT | 22u << 1), // A-FORM
489
490 // Vector instruction support for >= Power6
491 // Vector Storage Access
1920 inline void fnabs( FloatRegister d, FloatRegister b);
1921 inline void fnabs_(FloatRegister d, FloatRegister b);
1922
1923 // PPC 1, section 4.6.5.1 Floating-Point Elementary Arithmetic Instructions
1924 inline void fadd( FloatRegister d, FloatRegister a, FloatRegister b);
1925 inline void fadd_( FloatRegister d, FloatRegister a, FloatRegister b);
1926 inline void fadds( FloatRegister d, FloatRegister a, FloatRegister b);
1927 inline void fadds_(FloatRegister d, FloatRegister a, FloatRegister b);
1928 inline void fsub( FloatRegister d, FloatRegister a, FloatRegister b);
1929 inline void fsub_( FloatRegister d, FloatRegister a, FloatRegister b);
1930 inline void fsubs( FloatRegister d, FloatRegister a, FloatRegister b);
1931 inline void fsubs_(FloatRegister d, FloatRegister a, FloatRegister b);
1932 inline void fmul( FloatRegister d, FloatRegister a, FloatRegister c);
1933 inline void fmul_( FloatRegister d, FloatRegister a, FloatRegister c);
1934 inline void fmuls( FloatRegister d, FloatRegister a, FloatRegister c);
1935 inline void fmuls_(FloatRegister d, FloatRegister a, FloatRegister c);
1936 inline void fdiv( FloatRegister d, FloatRegister a, FloatRegister b);
1937 inline void fdiv_( FloatRegister d, FloatRegister a, FloatRegister b);
1938 inline void fdivs( FloatRegister d, FloatRegister a, FloatRegister b);
1939 inline void fdivs_(FloatRegister d, FloatRegister a, FloatRegister b);
1940
1941 // Fused multiply-accumulate instructions.
1942 // WARNING: Use only when rounding between the 2 parts is not desired.
1943 // Some floating point tck tests will fail if used incorrectly.
1944 inline void fmadd( FloatRegister d, FloatRegister a, FloatRegister c, FloatRegister b);
1945 inline void fmadd_( FloatRegister d, FloatRegister a, FloatRegister c, FloatRegister b);
1946 inline void fmadds( FloatRegister d, FloatRegister a, FloatRegister c, FloatRegister b);
1947 inline void fmadds_( FloatRegister d, FloatRegister a, FloatRegister c, FloatRegister b);
1948 inline void fmsub( FloatRegister d, FloatRegister a, FloatRegister c, FloatRegister b);
1949 inline void fmsub_( FloatRegister d, FloatRegister a, FloatRegister c, FloatRegister b);
1950 inline void fmsubs( FloatRegister d, FloatRegister a, FloatRegister c, FloatRegister b);
1951 inline void fmsubs_( FloatRegister d, FloatRegister a, FloatRegister c, FloatRegister b);
1952 inline void fnmadd( FloatRegister d, FloatRegister a, FloatRegister c, FloatRegister b);
1953 inline void fnmadd_( FloatRegister d, FloatRegister a, FloatRegister c, FloatRegister b);
1954 inline void fnmadds( FloatRegister d, FloatRegister a, FloatRegister c, FloatRegister b);
1955 inline void fnmadds_(FloatRegister d, FloatRegister a, FloatRegister c, FloatRegister b);
1956 inline void fnmsub( FloatRegister d, FloatRegister a, FloatRegister c, FloatRegister b);
1957 inline void fnmsub_( FloatRegister d, FloatRegister a, FloatRegister c, FloatRegister b);
1958 inline void fnmsubs( FloatRegister d, FloatRegister a, FloatRegister c, FloatRegister b);
1959 inline void fnmsubs_(FloatRegister d, FloatRegister a, FloatRegister c, FloatRegister b);
1960
1961 // PPC 1, section 4.6.6 Floating-Point Rounding and Conversion Instructions
1962 inline void frsp( FloatRegister d, FloatRegister b);
1963 inline void fctid( FloatRegister d, FloatRegister b);
1964 inline void fctidz(FloatRegister d, FloatRegister b);
1965 inline void fctiw( FloatRegister d, FloatRegister b);
1966 inline void fctiwz(FloatRegister d, FloatRegister b);
1967 inline void fcfid( FloatRegister d, FloatRegister b);
1968 inline void fcfids(FloatRegister d, FloatRegister b);
1969
1970 // PPC 1, section 4.6.7 Floating-Point Compare Instructions
1971 inline void fcmpu( ConditionRegister crx, FloatRegister a, FloatRegister b);
1972
1973 inline void fsqrt( FloatRegister d, FloatRegister b);
1974 inline void fsqrts(FloatRegister d, FloatRegister b);
1975
1976 // Vector instructions for >= Power6.
1977 inline void lvebx( VectorRegister d, Register s1, Register s2);
1978 inline void lvehx( VectorRegister d, Register s1, Register s2);
1979 inline void lvewx( VectorRegister d, Register s1, Register s2);
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