1 /* 2 * Copyright (c) 2016, Oracle and/or its affiliates. All rights reserved. 3 * Copyright (c) 2016 SAP SE. All rights reserved. 4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 5 * 6 * This code is free software; you can redistribute it and/or modify it 7 * under the terms of the GNU General Public License version 2 only, as 8 * published by the Free Software Foundation. 9 * 10 * This code is distributed in the hope that it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 13 * version 2 for more details (a copy is included in the LICENSE file that 14 * accompanied this code). 15 * 16 * You should have received a copy of the GNU General Public License version 17 * 2 along with this work; if not, write to the Free Software Foundation, 18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 19 * 20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 21 * or visit www.oracle.com if you need additional information or have any 22 * questions. 23 * 24 */ 25 26 #include "precompiled.hpp" 27 #include "asm/assembler.inline.hpp" 28 #include "compiler/disassembler.hpp" 29 #include "code/compiledIC.hpp" 30 #include "memory/resourceArea.hpp" 31 #include "runtime/java.hpp" 32 #include "runtime/stubCodeGenerator.hpp" 33 #include "vm_version_s390.hpp" 34 35 # include <sys/sysinfo.h> 36 37 bool VM_Version::_is_determine_features_test_running = false; 38 39 unsigned long VM_Version::_features[_features_buffer_len] = {0, 0, 0, 0}; 40 unsigned long VM_Version::_cipher_features[_features_buffer_len] = {0, 0, 0, 0}; 41 unsigned long VM_Version::_msgdigest_features[_features_buffer_len] = {0, 0, 0, 0}; 42 unsigned int VM_Version::_nfeatures = 0; 43 unsigned int VM_Version::_ncipher_features = 0; 44 unsigned int VM_Version::_nmsgdigest_features = 0; 45 unsigned int VM_Version::_Dcache_lineSize = 256; 46 unsigned int VM_Version::_Icache_lineSize = 256; 47 48 static const char* z_gen[] = {" ", "G1", "G2", "G3", "G4", "G5", "G6", "G7" }; 49 static const char* z_machine[] = {" ", "2064", "2084", "2094", "2097", "2817", " ", "2964" }; 50 static const char* z_name[] = {" ", "z900", "z990", "z9 EC", "z10 EC", "z196 EC", "ec12", "z13" }; 51 52 void VM_Version::initialize() { 53 determine_features(); // Get processor capabilities. 54 set_features_string(); // Set a descriptive feature indication. 55 56 if (Verbose) { 57 print_features(); 58 } 59 60 intx cache_line_size = Dcache_lineSize(0); 61 62 MaxVectorSize = 8; 63 64 if (has_PrefetchRaw()) { 65 if (FLAG_IS_DEFAULT(AllocatePrefetchStyle)) { // not preset 66 // 0 = no prefetch. 67 // 1 = Prefetch instructions for each allocation. 68 // 2 = Use TLAB watermark to gate allocation prefetch. 69 AllocatePrefetchStyle = 1; 70 } 71 72 if (AllocatePrefetchStyle > 0) { // Prefetching turned on at all? 73 // Distance to prefetch ahead of allocation pointer. 74 if (FLAG_IS_DEFAULT(AllocatePrefetchDistance) || (AllocatePrefetchDistance < 0)) { // not preset 75 AllocatePrefetchDistance = 0; 76 } 77 78 // Number of lines to prefetch ahead of allocation pointer. 79 if (FLAG_IS_DEFAULT(AllocatePrefetchLines) || (AllocatePrefetchLines <= 0)) { // not preset 80 AllocatePrefetchLines = 3; 81 } 82 83 // Step size in bytes of sequential prefetch instructions. 84 if (FLAG_IS_DEFAULT(AllocatePrefetchStepSize) || (AllocatePrefetchStepSize <= 0)) { // not preset 85 FLAG_SET_DEFAULT(AllocatePrefetchStepSize, cache_line_size); 86 } else if (AllocatePrefetchStepSize < cache_line_size) { 87 FLAG_SET_DEFAULT(AllocatePrefetchStepSize, cache_line_size); 88 } else { 89 FLAG_SET_DEFAULT(AllocatePrefetchStepSize, cache_line_size); 90 } 91 } else { 92 FLAG_SET_DEFAULT(AllocatePrefetchStyle, 0); 93 AllocatePrefetchDistance = 0; 94 AllocatePrefetchLines = 0; 95 // Can't be zero. Will SIGFPE during constraints checking. 96 FLAG_SET_DEFAULT(AllocatePrefetchStepSize, cache_line_size); 97 } 98 99 } else { 100 FLAG_SET_DEFAULT(AllocatePrefetchStyle, 0); 101 AllocatePrefetchDistance = 0; 102 AllocatePrefetchLines = 0; 103 // Can't be zero. Will SIGFPE during constraints checking. 104 FLAG_SET_DEFAULT(AllocatePrefetchStepSize, cache_line_size); 105 } 106 107 // TODO: 108 // On z/Architecture, cache line size is significantly large (256 bytes). Do we really need 109 // to keep contended members that far apart? Performance tests are required. 110 if (FLAG_IS_DEFAULT(ContendedPaddingWidth) && (cache_line_size > ContendedPaddingWidth)) { 111 ContendedPaddingWidth = cache_line_size; 112 } 113 114 // On z/Architecture, the CRC32 intrinsics had to be implemented "by hand". 115 // They cannot be based on the CHECKSUM instruction which has been there 116 // since the very beginning (of z/Architecture). It computes "some kind of" a checksum 117 // which has nothing to do with the CRC32 algorithm. 118 if (FLAG_IS_DEFAULT(UseCRC32Intrinsics)) { 119 FLAG_SET_DEFAULT(UseCRC32Intrinsics, true); 120 } 121 122 // On z/Architecture, we take UseAES as the general switch to enable/disable the AES intrinsics. 123 // The specific, and yet to be defined, switches UseAESxxxIntrinsics will then be set 124 // depending on the actual machine capabilities. 125 // Explicitly setting them via CmdLine option takes precedence, of course. 126 // TODO: UseAESIntrinsics must be made keylength specific. 127 // As of March 2015 and Java8, only AES128 is supported by the Java Cryptographic Extensions. 128 // Therefore, UseAESIntrinsics is of minimal use at the moment. 129 if (FLAG_IS_DEFAULT(UseAES) && has_Crypto_AES()) { 130 FLAG_SET_DEFAULT(UseAES, true); 131 } 132 if (UseAES && !has_Crypto_AES()) { 133 warning("AES instructions are not available on this CPU"); 134 FLAG_SET_DEFAULT(UseAES, false); 135 } 136 if (UseAES) { 137 if (FLAG_IS_DEFAULT(UseAESIntrinsics)) { 138 FLAG_SET_DEFAULT(UseAESIntrinsics, true); 139 } 140 } 141 if (UseAESIntrinsics && !has_Crypto_AES()) { 142 warning("AES intrinsics are not available on this CPU"); 143 FLAG_SET_DEFAULT(UseAESIntrinsics, false); 144 } 145 146 // TODO: implement AES/CTR intrinsics 147 if (UseAESCTRIntrinsics) { 148 warning("AES/CTR intrinsics are not available on this CPU"); 149 FLAG_SET_DEFAULT(UseAESCTRIntrinsics, false); 150 } 151 152 // TODO: implement GHASH intrinsics 153 if (UseGHASHIntrinsics) { 154 warning("GHASH intrinsics are not available on this CPU"); 155 FLAG_SET_DEFAULT(UseGHASHIntrinsics, false); 156 } 157 158 if (FLAG_IS_DEFAULT(UseFMA)) { 159 FLAG_SET_DEFAULT(UseFMA, true); 160 } 161 162 // On z/Architecture, we take UseSHA as the general switch to enable/disable the SHA intrinsics. 163 // The specific switches UseSHAxxxIntrinsics will then be set depending on the actual 164 // machine capabilities. 165 // Explicitly setting them via CmdLine option takes precedence, of course. 166 if (FLAG_IS_DEFAULT(UseSHA) && has_Crypto_SHA()) { 167 FLAG_SET_DEFAULT(UseSHA, true); 168 } 169 if (UseSHA && !has_Crypto_SHA()) { 170 warning("SHA instructions are not available on this CPU"); 171 FLAG_SET_DEFAULT(UseSHA, false); 172 } 173 if (UseSHA && has_Crypto_SHA1()) { 174 if (FLAG_IS_DEFAULT(UseSHA1Intrinsics)) { 175 FLAG_SET_DEFAULT(UseSHA1Intrinsics, true); 176 } 177 } else if (UseSHA1Intrinsics) { 178 warning("Intrinsics for SHA-1 crypto hash functions not available on this CPU."); 179 FLAG_SET_DEFAULT(UseSHA1Intrinsics, false); 180 } 181 if (UseSHA && has_Crypto_SHA256()) { 182 if (FLAG_IS_DEFAULT(UseSHA256Intrinsics)) { 183 FLAG_SET_DEFAULT(UseSHA256Intrinsics, true); 184 } 185 } else if (UseSHA256Intrinsics) { 186 warning("Intrinsics for SHA-224 and SHA-256 crypto hash functions not available on this CPU."); 187 FLAG_SET_DEFAULT(UseSHA256Intrinsics, false); 188 } 189 if (UseSHA && has_Crypto_SHA512()) { 190 if (FLAG_IS_DEFAULT(UseSHA512Intrinsics)) { 191 FLAG_SET_DEFAULT(UseSHA512Intrinsics, true); 192 } 193 } else if (UseSHA512Intrinsics) { 194 warning("Intrinsics for SHA-384 and SHA-512 crypto hash functions not available on this CPU."); 195 FLAG_SET_DEFAULT(UseSHA512Intrinsics, false); 196 } 197 198 if (UseAdler32Intrinsics) { 199 warning("Adler32Intrinsics not available on this CPU."); 200 FLAG_SET_DEFAULT(UseAdler32Intrinsics, false); 201 } 202 203 if (FLAG_IS_DEFAULT(UseMultiplyToLenIntrinsic)) { 204 FLAG_SET_DEFAULT(UseMultiplyToLenIntrinsic, true); 205 } 206 if (FLAG_IS_DEFAULT(UseMontgomeryMultiplyIntrinsic)) { 207 FLAG_SET_DEFAULT(UseMontgomeryMultiplyIntrinsic, true); 208 } 209 if (FLAG_IS_DEFAULT(UseMontgomerySquareIntrinsic)) { 210 FLAG_SET_DEFAULT(UseMontgomerySquareIntrinsic, true); 211 } 212 if (FLAG_IS_DEFAULT(UsePopCountInstruction)) { 213 FLAG_SET_DEFAULT(UsePopCountInstruction, true); 214 } 215 216 // z/Architecture supports 8-byte compare-exchange operations 217 // (see Atomic::cmpxchg and StubGenerator::generate_atomic_cmpxchg_ptr) 218 // and 'atomic long memory ops' (see Unsafe_GetLongVolatile). 219 _supports_cx8 = true; 220 221 _supports_atomic_getadd4 = VM_Version::has_LoadAndALUAtomicV1(); 222 _supports_atomic_getadd8 = VM_Version::has_LoadAndALUAtomicV1(); 223 224 // z/Architecture supports unaligned memory accesses. 225 // Performance penalty is negligible. An additional tick or so 226 // is lost if the accessed data spans a cache line boundary. 227 // Unaligned accesses are not atomic, of course. 228 if (FLAG_IS_DEFAULT(UseUnalignedAccesses)) { 229 FLAG_SET_DEFAULT(UseUnalignedAccesses, true); 230 } 231 } 232 233 234 void VM_Version::set_features_string() { 235 236 unsigned int ambiguity = 0; 237 if (is_z13()) { 238 _features_string = "System z G7-z13 (LDISP_fast, ExtImm, PCrel Load/Store, CmpB, Cond Load/Store, Interlocked Update, TxM, VectorInstr)"; 239 ambiguity++; 240 } 241 if (is_ec12()) { 242 _features_string = "System z G6-EC12 (LDISP_fast, ExtImm, PCrel Load/Store, CmpB, Cond Load/Store, Interlocked Update, TxM)"; 243 ambiguity++; 244 } 245 if (is_z196()) { 246 _features_string = "System z G5-z196 (LDISP_fast, ExtImm, PCrel Load/Store, CmpB, Cond Load/Store, Interlocked Update)"; 247 ambiguity++; 248 } 249 if (is_z10()) { 250 _features_string = "System z G4-z10 (LDISP_fast, ExtImm, PCrel Load/Store, CmpB)"; 251 ambiguity++; 252 } 253 if (is_z9()) { 254 _features_string = "System z G3-z9 (LDISP_fast, ExtImm), out-of-support as of 2016-04-01"; 255 ambiguity++; 256 } 257 if (is_z990()) { 258 _features_string = "System z G2-z990 (LDISP_fast), out-of-support as of 2014-07-01"; 259 ambiguity++; 260 } 261 if (is_z900()) { 262 _features_string = "System z G1-z900 (LDISP), out-of-support as of 2014-07-01"; 263 ambiguity++; 264 } 265 266 if (ambiguity == 0) { 267 _features_string = "z/Architecture (unknown generation)"; 268 } else if (ambiguity > 1) { 269 tty->print_cr("*** WARNING *** Ambiguous z/Architecture detection, ambiguity = %d", ambiguity); 270 tty->print_cr(" oldest detected generation is %s", _features_string); 271 _features_string = "z/Architecture (ambiguous detection)"; 272 } 273 274 if (has_Crypto_AES()) { 275 char buf[256]; 276 assert(strlen(_features_string) + 4 + 3*4 + 1 < sizeof(buf), "increase buffer size"); 277 jio_snprintf(buf, sizeof(buf), "%s aes%s%s%s", // String 'aes' must be surrounded by spaces so that jtreg tests recognize it. 278 _features_string, 279 has_Crypto_AES128() ? " 128" : "", 280 has_Crypto_AES192() ? " 192" : "", 281 has_Crypto_AES256() ? " 256" : ""); 282 _features_string = os::strdup(buf); 283 } 284 285 if (has_Crypto_SHA()) { 286 char buf[256]; 287 assert(strlen(_features_string) + 4 + 2 + 2*4 + 6 + 1 < sizeof(buf), "increase buffer size"); 288 // String 'sha1' etc must be surrounded by spaces so that jtreg tests recognize it. 289 jio_snprintf(buf, sizeof(buf), "%s %s%s%s%s", 290 _features_string, 291 has_Crypto_SHA1() ? " sha1" : "", 292 has_Crypto_SHA256() ? " sha256" : "", 293 has_Crypto_SHA512() ? " sha512" : "", 294 has_Crypto_GHASH() ? " ghash" : ""); 295 if (has_Crypto_AES()) { os::free((void *)_features_string); } 296 _features_string = os::strdup(buf); 297 } 298 } 299 300 // featureBuffer - bit array indicating availability of various features 301 // featureNum - bit index of feature to be tested 302 // Featurenum < 0 requests test for any nonzero bit in featureBuffer. 303 // bufLen - length of featureBuffer in bits 304 bool VM_Version::test_feature_bit(unsigned long* featureBuffer, int featureNum, unsigned int bufLen) { 305 assert(bufLen > 0, "buffer len must be positive"); 306 assert((bufLen & 0x0007) == 0, "unaligned buffer len"); 307 assert(((intptr_t)featureBuffer&0x0007) == 0, "unaligned feature buffer"); 308 if (featureNum < 0) { 309 // Any bit set at all? 310 bool anyBit = false; 311 for (size_t i = 0; i < bufLen/(8*sizeof(long)); i++) { 312 anyBit = anyBit || (featureBuffer[i] != 0); 313 } 314 return anyBit; 315 } else { 316 assert((unsigned int)featureNum < bufLen, "feature index out of range"); 317 unsigned char* byteBuffer = (unsigned char*)featureBuffer; 318 int byteIndex = featureNum/(8*sizeof(char)); 319 int bitIndex = featureNum%(8*sizeof(char)); 320 // Indexed bit set? 321 return (byteBuffer[byteIndex] & (1U<<(7-bitIndex))) != 0; 322 } 323 } 324 325 void VM_Version::print_features_internal(const char* text, bool print_anyway) { 326 tty->print_cr("%s %s", text, features_string()); 327 tty->print("%s", text); 328 for (unsigned int i = 0; i < _nfeatures; i++) { 329 tty->print(" 0x%16.16lx", _features[i]); 330 } 331 tty->cr(); 332 333 if (Verbose || print_anyway) { 334 // z900 335 if (has_long_displacement() ) tty->print_cr("available: %s", "LongDispFacility"); 336 // z990 337 if (has_long_displacement_fast() ) tty->print_cr("available: %s", "LongDispFacilityHighPerf"); 338 if (has_ETF2() && has_ETF3() ) tty->print_cr("available: %s", "ETF2 and ETF3"); 339 if (has_Crypto() ) tty->print_cr("available: %s", "CryptoFacility"); 340 // z9 341 if (has_extended_immediate() ) tty->print_cr("available: %s", "ExtImmedFacility"); 342 if (has_StoreFacilityListExtended()) tty->print_cr("available: %s", "StoreFacilityListExtended"); 343 if (has_StoreClockFast() ) tty->print_cr("available: %s", "StoreClockFast"); 344 if (has_ETF2Enhancements() ) tty->print_cr("available: %s", "ETF2 Enhancements"); 345 if (has_ETF3Enhancements() ) tty->print_cr("available: %s", "ETF3 Enhancements"); 346 if (has_HFPUnnormalized() ) tty->print_cr("available: %s", "HFPUnnormalizedFacility"); 347 if (has_HFPMultiplyAndAdd() ) tty->print_cr("available: %s", "HFPMultiplyAndAddFacility"); 348 // z10 349 if (has_ParsingEnhancements() ) tty->print_cr("available: %s", "Parsing Enhancements"); 350 if (has_ExtractCPUtime() ) tty->print_cr("available: %s", "ExtractCPUTime"); 351 if (has_CompareSwapStore() ) tty->print_cr("available: %s", "CompareSwapStore"); 352 if (has_GnrlInstrExtensions() ) tty->print_cr("available: %s", "General Instruction Extensions"); 353 if (has_CompareBranch() ) tty->print_cr(" available: %s", "Compare and Branch"); 354 if (has_CompareTrap() ) tty->print_cr(" available: %s", "Compare and Trap"); 355 if (has_RelativeLoadStore() ) tty->print_cr(" available: %s", "Relative Load/Store"); 356 if (has_MultiplySingleImm32() ) tty->print_cr(" available: %s", "MultiplySingleImm32"); 357 if (has_Prefetch() ) tty->print_cr(" available: %s", "Prefetch"); 358 if (has_MoveImmToMem() ) tty->print_cr(" available: %s", "Direct Moves Immediate to Memory"); 359 if (has_MemWithImmALUOps() ) tty->print_cr(" available: %s", "Direct ALU Ops Memory .op. Immediate"); 360 if (has_ExtractCPUAttributes() ) tty->print_cr(" available: %s", "Extract CPU Atributes"); 361 if (has_ExecuteExtensions() ) tty->print_cr("available: %s", "ExecuteExtensions"); 362 if (has_FPSupportEnhancements() ) tty->print_cr("available: %s", "FPSupportEnhancements"); 363 if (has_DecimalFloatingPoint() ) tty->print_cr("available: %s", "DecimalFloatingPoint"); 364 // z196 365 if (has_DistinctOpnds() ) tty->print_cr("available: %s", "Distinct Operands"); 366 if (has_InterlockedAccessV1() ) tty->print_cr(" available: %s", "InterlockedAccess V1 (fast)"); 367 if (has_PopCount() ) tty->print_cr(" available: %s", "PopCount"); 368 if (has_LoadStoreConditional() ) tty->print_cr(" available: %s", "LoadStoreConditional"); 369 if (has_HighWordInstr() ) tty->print_cr(" available: %s", "HighWord Instructions"); 370 if (has_FastSync() ) tty->print_cr(" available: %s", "FastSync (bcr 14,0)"); 371 if (has_AtomicMemWithImmALUOps() ) tty->print_cr("available: %s", "Atomic Direct ALU Ops Memory .op. Immediate"); 372 if (has_FPExtensions() ) tty->print_cr("available: %s", "Floatingpoint Extensions"); 373 if (has_CryptoExt3() ) tty->print_cr("available: %s", "Crypto Extensions 3"); 374 if (has_CryptoExt4() ) tty->print_cr("available: %s", "Crypto Extensions 4"); 375 // EC12 376 if (has_MiscInstrExt() ) tty->print_cr("available: %s", "Miscelaneous Instruction Extensions"); 377 if (has_ExecutionHint() ) tty->print_cr(" available: %s", "Execution Hints (branch prediction)"); 378 if (has_ProcessorAssist() ) tty->print_cr(" available: %s", "Processor Assists"); 379 if (has_LoadAndTrap() ) tty->print_cr(" available: %s", "Load and Trap"); 380 if (has_TxMem() ) tty->print_cr("available: %s", "Transactional Memory"); 381 if (has_InterlockedAccessV2() ) tty->print_cr(" available: %s", "InterlockedAccess V2 (fast)"); 382 if (has_DFPZonedConversion() ) tty->print_cr(" available: %s", "DFP Zoned Conversions"); 383 // z13 384 if (has_LoadStoreConditional2() ) tty->print_cr("available: %s", "Load/Store Conditional 2"); 385 if (has_CryptoExt5() ) tty->print_cr("available: %s", "Crypto Extensions 5"); 386 if (has_DFPPackedConversion() ) tty->print_cr("available: %s", "DFP Packed Conversions"); 387 if (has_VectorFacility() ) tty->print_cr("available: %s", "Vector Facility"); 388 // test switches 389 if (has_TestFeature1Impl() ) tty->print_cr("available: %s", "TestFeature1Impl"); 390 if (has_TestFeature2Impl() ) tty->print_cr("available: %s", "TestFeature2Impl"); 391 if (has_TestFeature4Impl() ) tty->print_cr("available: %s", "TestFeature4Impl"); 392 if (has_TestFeature8Impl() ) tty->print_cr("available: %s", "TestFeature8Impl"); 393 394 if (has_Crypto()) { 395 tty->cr(); 396 tty->print_cr("detailed availability of %s capabilities:", "CryptoFacility"); 397 if (test_feature_bit(&_cipher_features[0], -1, 2*Cipher::_featureBits)) { 398 tty->cr(); 399 tty->print_cr(" available: %s", "Message Cipher Functions"); 400 } 401 if (test_feature_bit(&_cipher_features[0], -1, (int)Cipher::_featureBits)) { 402 tty->print_cr(" available Crypto Features of KM (Cipher Message):"); 403 for (unsigned int i = 0; i < Cipher::_featureBits; i++) { 404 if (test_feature_bit(&_cipher_features[0], i, (int)Cipher::_featureBits)) { 405 switch (i) { 406 case Cipher::_Query: tty->print_cr(" available: KM Query"); break; 407 case Cipher::_DEA: tty->print_cr(" available: KM DEA"); break; 408 case Cipher::_TDEA128: tty->print_cr(" available: KM TDEA-128"); break; 409 case Cipher::_TDEA192: tty->print_cr(" available: KM TDEA-192"); break; 410 case Cipher::_EncryptedDEA: tty->print_cr(" available: KM Encrypted DEA"); break; 411 case Cipher::_EncryptedDEA128: tty->print_cr(" available: KM Encrypted DEA-128"); break; 412 case Cipher::_EncryptedDEA192: tty->print_cr(" available: KM Encrypted DEA-192"); break; 413 case Cipher::_AES128: tty->print_cr(" available: KM AES-128"); break; 414 case Cipher::_AES192: tty->print_cr(" available: KM AES-192"); break; 415 case Cipher::_AES256: tty->print_cr(" available: KM AES-256"); break; 416 case Cipher::_EnccryptedAES128: tty->print_cr(" available: KM Encrypted-AES-128"); break; 417 case Cipher::_EnccryptedAES192: tty->print_cr(" available: KM Encrypted-AES-192"); break; 418 case Cipher::_EnccryptedAES256: tty->print_cr(" available: KM Encrypted-AES-256"); break; 419 case Cipher::_XTSAES128: tty->print_cr(" available: KM XTS-AES-128"); break; 420 case Cipher::_XTSAES256: tty->print_cr(" available: KM XTS-AES-256"); break; 421 case Cipher::_EncryptedXTSAES128: tty->print_cr(" available: KM XTS-Encrypted-AES-128"); break; 422 case Cipher::_EncryptedXTSAES256: tty->print_cr(" available: KM XTS-Encrypted-AES-256"); break; 423 default: tty->print_cr(" available: unknown KM code %d", i); break; 424 } 425 } 426 } 427 } 428 if (test_feature_bit(&_cipher_features[2], -1, (int)Cipher::_featureBits)) { 429 tty->print_cr(" available Crypto Features of KMC (Cipher Message with Chaining):"); 430 for (unsigned int i = 0; i < Cipher::_featureBits; i++) { 431 if (test_feature_bit(&_cipher_features[2], i, (int)Cipher::_featureBits)) { 432 switch (i) { 433 case Cipher::_Query: tty->print_cr(" available: KMC Query"); break; 434 case Cipher::_DEA: tty->print_cr(" available: KMC DEA"); break; 435 case Cipher::_TDEA128: tty->print_cr(" available: KMC TDEA-128"); break; 436 case Cipher::_TDEA192: tty->print_cr(" available: KMC TDEA-192"); break; 437 case Cipher::_EncryptedDEA: tty->print_cr(" available: KMC Encrypted DEA"); break; 438 case Cipher::_EncryptedDEA128: tty->print_cr(" available: KMC Encrypted DEA-128"); break; 439 case Cipher::_EncryptedDEA192: tty->print_cr(" available: KMC Encrypted DEA-192"); break; 440 case Cipher::_AES128: tty->print_cr(" available: KMC AES-128"); break; 441 case Cipher::_AES192: tty->print_cr(" available: KMC AES-192"); break; 442 case Cipher::_AES256: tty->print_cr(" available: KMC AES-256"); break; 443 case Cipher::_EnccryptedAES128: tty->print_cr(" available: KMC Encrypted-AES-128"); break; 444 case Cipher::_EnccryptedAES192: tty->print_cr(" available: KMC Encrypted-AES-192"); break; 445 case Cipher::_EnccryptedAES256: tty->print_cr(" available: KMC Encrypted-AES-256"); break; 446 case Cipher::_PRNG: tty->print_cr(" available: KMC PRNG"); break; 447 default: tty->print_cr(" available: unknown KMC code %d", i); break; 448 } 449 } 450 } 451 } 452 453 if (test_feature_bit(&_msgdigest_features[0], -1, 2*MsgDigest::_featureBits)) { 454 tty->cr(); 455 tty->print_cr(" available: %s", "Message Digest Functions for SHA"); 456 } 457 if (test_feature_bit(&_msgdigest_features[0], -1, (int)MsgDigest::_featureBits)) { 458 tty->print_cr(" available Features of KIMD (Msg Digest):"); 459 for (unsigned int i = 0; i < MsgDigest::_featureBits; i++) { 460 if (test_feature_bit(&_msgdigest_features[0], i, (int)MsgDigest::_featureBits)) { 461 switch (i) { 462 case MsgDigest::_Query: tty->print_cr(" available: KIMD Query"); break; 463 case MsgDigest::_SHA1: tty->print_cr(" available: KIMD SHA-1"); break; 464 case MsgDigest::_SHA256: tty->print_cr(" available: KIMD SHA-256"); break; 465 case MsgDigest::_SHA512: tty->print_cr(" available: KIMD SHA-512"); break; 466 case MsgDigest::_GHASH: tty->print_cr(" available: KIMD GHASH"); break; 467 default: tty->print_cr(" available: unknown code %d", i); break; 468 } 469 } 470 } 471 } 472 if (test_feature_bit(&_msgdigest_features[2], -1, (int)MsgDigest::_featureBits)) { 473 tty->print_cr(" available Features of KLMD (Msg Digest):"); 474 for (unsigned int i = 0; i < MsgDigest::_featureBits; i++) { 475 if (test_feature_bit(&_msgdigest_features[2], i, (int)MsgDigest::_featureBits)) { 476 switch (i) { 477 case MsgDigest::_Query: tty->print_cr(" available: KLMD Query"); break; 478 case MsgDigest::_SHA1: tty->print_cr(" available: KLMD SHA-1"); break; 479 case MsgDigest::_SHA256: tty->print_cr(" available: KLMD SHA-256"); break; 480 case MsgDigest::_SHA512: tty->print_cr(" available: KLMD SHA-512"); break; 481 default: tty->print_cr(" available: unknown code %d", i); break; 482 } 483 } 484 } 485 } 486 } 487 if (ContendedPaddingWidth > 0) { 488 tty->cr(); 489 tty->print_cr("ContendedPaddingWidth " INTX_FORMAT, ContendedPaddingWidth); 490 } 491 } 492 } 493 494 void VM_Version::print_features() { 495 print_features_internal("Version:"); 496 } 497 498 void VM_Version::reset_features(bool reset) { 499 if (reset) { 500 for (unsigned int i = 0; i < _features_buffer_len; i++) { 501 VM_Version::_features[i] = 0; 502 } 503 } 504 } 505 506 void VM_Version::set_features_z900(bool reset) { 507 reset_features(reset); 508 509 set_has_long_displacement(); 510 set_has_ETF2(); 511 } 512 513 void VM_Version::set_features_z990(bool reset) { 514 reset_features(reset); 515 516 set_features_z900(false); 517 set_has_ETF3(); 518 set_has_long_displacement_fast(); 519 set_has_HFPMultiplyAndAdd(); 520 } 521 522 void VM_Version::set_features_z9(bool reset) { 523 reset_features(reset); 524 525 set_features_z990(false); 526 set_has_StoreFacilityListExtended(); 527 // set_has_Crypto(); // Do not set, crypto features must be retrieved separately. 528 set_has_ETF2Enhancements(); 529 set_has_ETF3Enhancements(); 530 set_has_extended_immediate(); 531 set_has_StoreClockFast(); 532 set_has_HFPUnnormalized(); 533 } 534 535 void VM_Version::set_features_z10(bool reset) { 536 reset_features(reset); 537 538 set_features_z9(false); 539 set_has_CompareSwapStore(); 540 set_has_RelativeLoadStore(); 541 set_has_CompareBranch(); 542 set_has_CompareTrap(); 543 set_has_MultiplySingleImm32(); 544 set_has_Prefetch(); 545 set_has_MoveImmToMem(); 546 set_has_MemWithImmALUOps(); 547 set_has_ExecuteExtensions(); 548 set_has_FPSupportEnhancements(); 549 set_has_DecimalFloatingPoint(); 550 set_has_ExtractCPUtime(); 551 set_has_CryptoExt3(); 552 } 553 554 void VM_Version::set_features_z196(bool reset) { 555 reset_features(reset); 556 557 set_features_z10(false); 558 set_has_InterlockedAccessV1(); 559 set_has_PopCount(); 560 set_has_LoadStoreConditional(); 561 set_has_HighWordInstr(); 562 set_has_FastSync(); 563 set_has_FPExtensions(); 564 set_has_DistinctOpnds(); 565 set_has_CryptoExt4(); 566 } 567 568 void VM_Version::set_features_ec12(bool reset) { 569 reset_features(reset); 570 571 set_features_z196(false); 572 set_has_MiscInstrExt(); 573 set_has_InterlockedAccessV2(); 574 set_has_LoadAndALUAtomicV2(); 575 set_has_TxMem(); 576 } 577 578 void VM_Version::set_features_z13(bool reset) { 579 reset_features(reset); 580 581 set_features_ec12(false); 582 set_has_LoadStoreConditional2(); 583 set_has_CryptoExt5(); 584 set_has_VectorFacility(); 585 } 586 587 void VM_Version::set_features_from(const char* march) { 588 bool err = false; 589 bool prt = false; 590 591 if ((march != NULL) && (march[0] != '\0')) { 592 const int buf_len = 16; 593 const int hdr_len = 5; 594 char buf[buf_len]; 595 if (strlen(march) >= hdr_len) { 596 memcpy(buf, march, hdr_len); 597 buf[hdr_len] = '\00'; 598 } else { 599 buf[0] = '\00'; 600 } 601 602 if (!strcmp(march, "z900")) { 603 set_features_z900(); 604 } else if (!strcmp(march, "z990")) { 605 set_features_z990(); 606 } else if (!strcmp(march, "z9")) { 607 set_features_z9(); 608 } else if (!strcmp(march, "z10")) { 609 set_features_z10(); 610 } else if (!strcmp(march, "z196")) { 611 set_features_z196(); 612 } else if (!strcmp(march, "ec12")) { 613 set_features_ec12(); 614 } else if (!strcmp(march, "z13")) { 615 set_features_z13(); 616 } else if (!strcmp(buf, "ztest")) { 617 assert(!has_TestFeaturesImpl(), "possible facility list flag conflict"); 618 if (strlen(march) > hdr_len) { 619 int itest = 0; 620 if ((strlen(march)-hdr_len) >= buf_len) err = true; 621 if (!err) { 622 memcpy(buf, &march[hdr_len], strlen(march)-hdr_len); 623 buf[strlen(march)-hdr_len] = '\00'; 624 for (size_t i = 0; !err && (i < strlen(buf)); i++) { 625 itest = itest*10 + buf[i]-'0'; 626 err = err || ((buf[i]-'0') < 0) || ((buf[i]-'0') > 9) || (itest > 15); 627 } 628 } 629 if (!err) { 630 prt = true; 631 if (itest & 0x01) { set_has_TestFeature1Impl(); } 632 if (itest & 0x02) { set_has_TestFeature2Impl(); } 633 if (itest & 0x04) { set_has_TestFeature4Impl(); } 634 if (itest & 0x08) { set_has_TestFeature8Impl(); } 635 } 636 } else { 637 prt = true; 638 set_has_TestFeature1Impl(); 639 set_has_TestFeature2Impl(); 640 set_has_TestFeature4Impl(); 641 set_has_TestFeature8Impl(); 642 } 643 } else { 644 err = true; 645 } 646 if (!err) { 647 set_features_string(); 648 if (prt || PrintAssembly) { 649 print_features_internal("CPU Version as set by cmdline option:", prt); 650 } 651 } else { 652 tty->print_cr("***Warning: Unsupported ProcessorArchitecture: %s, internal settings left undisturbed.", march); 653 } 654 } 655 656 } 657 658 static long (*getFeatures)(unsigned long*, int, int) = NULL; 659 660 void VM_Version::set_getFeatures(address entryPoint) { 661 if (getFeatures == NULL) { 662 getFeatures = (long(*)(unsigned long*, int, int))entryPoint; 663 } 664 } 665 666 long VM_Version::call_getFeatures(unsigned long* buffer, int buflen, int functionCode) { 667 VM_Version::_is_determine_features_test_running = true; 668 long functionResult = (*getFeatures)(buffer, buflen, functionCode); 669 VM_Version::_is_determine_features_test_running = false; 670 return functionResult; 671 } 672 673 // Helper function for "extract cache attribute" instruction. 674 int VM_Version::calculate_ECAG_functionCode(unsigned int attributeIndication, 675 unsigned int levelIndication, 676 unsigned int typeIndication) { 677 return (attributeIndication<<4) | (levelIndication<<1) | typeIndication; 678 } 679 680 void VM_Version::determine_features() { 681 682 const int cbuf_size = _code_buffer_len; 683 const int buf_len = _features_buffer_len; 684 685 // Allocate code buffer space for the detection code. 686 ResourceMark rm; 687 CodeBuffer cbuf("determine CPU features", cbuf_size, 0); 688 MacroAssembler* a = new MacroAssembler(&cbuf); 689 690 // Emit code. 691 set_getFeatures(a->pc()); 692 address code = a->pc(); 693 694 // Try STFLE. Possible INVOP will cause defaults to be used. 695 Label getFEATURES; 696 Label getCPUFEATURES; // fcode = -1 (cache) 697 Label getCIPHERFEATURES; // fcode = -2 (cipher) 698 Label getMSGDIGESTFEATURES; // fcode = -3 (SHA) 699 Label checkLongDispFast; 700 Label noLongDisp; 701 Label posDisp, negDisp; 702 Label errRTN; 703 a->z_ltgfr(Z_R0, Z_ARG2); // Buf len to r0 and test. 704 a->z_brl(getFEATURES); // negative -> Get machine features. 705 a->z_brz(checkLongDispFast); // zero -> Check for high-speed Long Displacement Facility. 706 a->z_aghi(Z_R0, -1); 707 a->z_stfle(0, Z_ARG1); 708 a->z_lg(Z_R1, 0, Z_ARG1); // Get first DW of facility list. 709 a->z_lgr(Z_RET, Z_R0); // Calculate rtn value for success. 710 a->z_la(Z_RET, 1, Z_RET); 711 a->z_brnz(errRTN); // Instr failed if non-zero CC. 712 a->z_ltgr(Z_R1, Z_R1); // Instr failed if first DW == 0. 713 a->z_bcr(Assembler::bcondNotZero, Z_R14); // Successful return. 714 715 a->bind(errRTN); 716 a->z_lngr(Z_RET, Z_RET); 717 a->z_ltgr(Z_R1, Z_R1); 718 a->z_bcr(Assembler::bcondNotZero, Z_R14); // Return "buffer too small". 719 a->z_xgr(Z_RET, Z_RET); 720 a->z_br(Z_R14); // Return "operation aborted". 721 722 a->bind(getFEATURES); 723 a->z_cghi(Z_R0, -1); // -1: Extract CPU attributes, currently: cache layout only. 724 a->z_bre(getCPUFEATURES); 725 a->z_cghi(Z_R0, -2); // -2: Extract detailed crypto capabilities (cipher instructions). 726 a->z_bre(getCIPHERFEATURES); 727 a->z_cghi(Z_R0, -3); // -3: Extract detailed crypto capabilities (msg digest instructions). 728 a->z_bre(getMSGDIGESTFEATURES); 729 730 a->z_xgr(Z_RET, Z_RET); // Not a valid function code. 731 a->z_br(Z_R14); // Return "operation aborted". 732 733 // Try KIMD/KLMD query function to get details about msg digest (secure hash, SHA) instructions. 734 a->bind(getMSGDIGESTFEATURES); 735 a->z_lghi(Z_R0,(int)MsgDigest::_Query); // query function code 736 a->z_lgr(Z_R1,Z_R2); // param block addr, 2*16 bytes min size 737 a->z_kimd(Z_R2,Z_R2); // Get available KIMD functions (bit pattern in param blk). 738 a->z_la(Z_R1,16,Z_R1); // next param block addr 739 a->z_klmd(Z_R2,Z_R2); // Get available KLMD functions (bit pattern in param blk). 740 a->z_lghi(Z_RET,4); 741 a->z_br(Z_R14); 742 743 // Try KM/KMC query function to get details about crypto instructions. 744 a->bind(getCIPHERFEATURES); 745 a->z_lghi(Z_R0,(int)Cipher::_Query); // query function code 746 a->z_lgr(Z_R1,Z_R2); // param block addr, 2*16 bytes min size (KIMD/KLMD output) 747 a->z_km(Z_R2,Z_R2); // get available KM functions 748 a->z_la(Z_R1,16,Z_R1); // next param block addr 749 a->z_kmc(Z_R2,Z_R2); // get available KMC functions 750 a->z_lghi(Z_RET,4); 751 a->z_br(Z_R14); 752 753 // Use EXTRACT CPU ATTRIBUTE instruction to get information about cache layout. 754 a->bind(getCPUFEATURES); 755 a->z_xgr(Z_R0,Z_R0); // as recommended in instruction documentation 756 a->z_ecag(Z_RET,Z_R0,0,Z_ARG3); // Extract information as requested by Z_ARG1 contents. 757 a->z_br(Z_R14); 758 759 // Check the performance of the Long Displacement Facility, i.e. find out if we are running on z900 or newer. 760 a->bind(checkLongDispFast); 761 a->z_llill(Z_R0, 0xffff); // preset #iterations 762 a->z_larl(Z_R1, posDisp); 763 a->z_stck(0, Z_ARG1); // Get begin timestamp. 764 765 a->bind(posDisp); // Positive disp loop. 766 a->z_lg(Z_ARG2, 0, Z_ARG1); 767 a->z_bctgr(Z_R0, Z_R1); 768 769 a->z_stck(0, Z_ARG1); // Get end timestamp. 770 a->z_sg(Z_ARG2, 0, Z_R0, Z_ARG1); // Calculate elapsed time. 771 a->z_lcgr(Z_ARG2, Z_ARG2); 772 a->z_srlg(Z_ARG2, Z_ARG2, 12); // LSB: now microseconds 773 a->z_stg(Z_ARG2, 8, Z_ARG1); // Store difference in buffer[1]. 774 775 a->z_llill(Z_R0, 0xffff); // preset #iterations 776 a->z_larl(Z_R1, negDisp); 777 a->z_xgr(Z_ARG2, Z_ARG2); // Clear to detect absence of LongDisp facility. 778 a->z_stck(0, Z_ARG1); // Get begin timestamp. 779 a->z_la(Z_ARG1, 8, Z_ARG1); 780 781 a->bind(negDisp); // Negative disp loop. 782 a->z_lg(Z_ARG2, -8, Z_ARG1); 783 a->z_bctgr(Z_R0, Z_R1); 784 785 a->z_aghi(Z_ARG1, -8); 786 a->z_stck(0, Z_ARG1); // Get end timestamp. 787 a->z_ltgr(Z_ARG2, Z_ARG2); // Check for absence of LongDisp facility. 788 a->z_brz(noLongDisp); 789 a->z_sg(Z_ARG2, 0, Z_R0, Z_ARG1); // Calc elapsed time. 790 a->z_lcgr(Z_ARG2, Z_ARG2); 791 a->z_srlg(Z_ARG2, Z_ARG2, 12); // LSB: now microseconds 792 a->z_stg(Z_ARG2, 0, Z_ARG1); // store difference in buffer[0] 793 794 a->z_llill(Z_RET,0xffff); 795 a->z_br(Z_R14); 796 797 a->bind(noLongDisp); 798 a->z_lghi(Z_RET,-1); 799 a->z_br(Z_R14); 800 801 address code_end = a->pc(); 802 a->flush(); 803 804 // Print the detection code. 805 bool printVerbose = Verbose || PrintAssembly || PrintStubCode; 806 if (printVerbose) { 807 ttyLocker ttyl; 808 tty->print_cr("Decoding CPU feature detection stub at " INTPTR_FORMAT " before execution:", p2i(code)); 809 tty->print_cr("Stub length is %ld bytes, codebuffer reserves %d bytes, %ld bytes spare.", 810 code_end-code, cbuf_size, cbuf_size-(code_end-code)); 811 812 // Use existing decode function. This enables the [Code] format which is needed to DecodeErrorFile. 813 Disassembler::decode((u_char*)code, (u_char*)code_end, tty); 814 } 815 816 // Prepare for detection code execution and clear work buffer. 817 _nfeatures = 0; 818 _ncipher_features = 0; 819 unsigned long buffer[buf_len]; 820 821 for (int i = 0; i < buf_len; i++) { 822 buffer[i] = 0L; 823 } 824 825 // execute code 826 // Illegal instructions will be replaced by 0 in signal handler. 827 // In case of problems, call_getFeatures will return a not-positive result. 828 long used_len = call_getFeatures(buffer, buf_len, 0); 829 830 bool ok; 831 if (used_len == 1) { 832 ok = true; 833 } else if (used_len > 1) { 834 unsigned int used_lenU = (unsigned int)used_len; 835 ok = true; 836 for (unsigned int i = 1; i < used_lenU; i++) { 837 ok = ok && (buffer[i] == 0L); 838 } 839 if (printVerbose && !ok) { 840 bool compact = false; 841 tty->print_cr("Note: feature list has %d (i.e. more than one) array elements.", used_lenU); 842 if (compact) { 843 tty->print("non-zero feature list elements:"); 844 for (unsigned int i = 0; i < used_lenU; i++) { 845 tty->print(" [%d]: 0x%16.16lx", i, buffer[i]); 846 } 847 tty->cr(); 848 } else { 849 for (unsigned int i = 0; i < used_lenU; i++) { 850 tty->print_cr("non-zero feature list[%d]: 0x%16.16lx", i, buffer[i]); 851 } 852 } 853 854 if (compact) { 855 tty->print_cr("Active features (compact view):"); 856 for (unsigned int k = 0; k < used_lenU; k++) { 857 tty->print_cr(" buffer[%d]:", k); 858 for (unsigned int j = k*sizeof(long); j < (k+1)*sizeof(long); j++) { 859 bool line = false; 860 for (unsigned int i = j*8; i < (j+1)*8; i++) { 861 bool bit = test_feature_bit(buffer, i, used_lenU*sizeof(long)*8); 862 if (bit) { 863 if (!line) { 864 tty->print(" byte[%d]:", j); 865 line = true; 866 } 867 tty->print(" [%3.3d]", i); 868 } 869 } 870 if (line) { 871 tty->cr(); 872 } 873 } 874 } 875 } else { 876 tty->print_cr("Active features (full view):"); 877 for (unsigned int k = 0; k < used_lenU; k++) { 878 tty->print_cr(" buffer[%d]:", k); 879 for (unsigned int j = k*sizeof(long); j < (k+1)*sizeof(long); j++) { 880 tty->print(" byte[%d]:", j); 881 for (unsigned int i = j*8; i < (j+1)*8; i++) { 882 bool bit = test_feature_bit(buffer, i, used_lenU*sizeof(long)*8); 883 if (bit) { 884 tty->print(" [%3.3d]", i); 885 } else { 886 tty->print(" "); 887 } 888 } 889 tty->cr(); 890 } 891 } 892 } 893 } 894 ok = true; 895 } else { // No features retrieved if we reach here. Buffer too short or instr not available. 896 if (used_len < 0) { 897 ok = false; 898 if (printVerbose) { 899 tty->print_cr("feature list buffer[%d] too short, required: buffer[%ld]", buf_len, -used_len); 900 } 901 } else { 902 if (printVerbose) { 903 tty->print_cr("feature list could not be retrieved. Running on z900 or z990? Trying to find out..."); 904 } 905 used_len = call_getFeatures(buffer, 0, 0); // Must provide at least two DW buffer elements!!!! 906 907 ok = used_len > 0; 908 if (ok) { 909 if (buffer[1]*10 < buffer[0]) { 910 set_features_z900(); 911 } else { 912 set_features_z990(); 913 } 914 915 if (printVerbose) { 916 tty->print_cr("Note: high-speed long displacement test used %ld iterations.", used_len); 917 tty->print_cr(" Positive displacement loads took %8.8lu microseconds.", buffer[1]); 918 tty->print_cr(" Negative displacement loads took %8.8lu microseconds.", buffer[0]); 919 if (has_long_displacement_fast()) { 920 tty->print_cr(" assuming high-speed long displacement IS available."); 921 } else { 922 tty->print_cr(" assuming high-speed long displacement is NOT available."); 923 } 924 } 925 } else { 926 if (printVerbose) { 927 tty->print_cr("Note: high-speed long displacement test was not successful."); 928 tty->print_cr(" assuming long displacement is NOT available."); 929 } 930 } 931 return; // Do not copy buffer to _features, no test for cipher features. 932 } 933 } 934 935 if (ok) { 936 // Fill features buffer. 937 // Clear work buffer. 938 for (int i = 0; i < buf_len; i++) { 939 _features[i] = buffer[i]; 940 _cipher_features[i] = 0; 941 _msgdigest_features[i] = 0; 942 buffer[i] = 0L; 943 } 944 _nfeatures = used_len; 945 } else { 946 for (int i = 0; i < buf_len; i++) { 947 _features[i] = 0; 948 _cipher_features[i] = 0; 949 _msgdigest_features[i] = 0; 950 buffer[i] = 0L; 951 } 952 _nfeatures = 0; 953 } 954 955 // Extract Crypto Facility details. 956 if (has_Crypto()) { 957 // Get cipher features. 958 used_len = call_getFeatures(buffer, -2, 0); 959 for (int i = 0; i < buf_len; i++) { 960 _cipher_features[i] = buffer[i]; 961 } 962 _ncipher_features = used_len; 963 964 // Get msg digest features. 965 used_len = call_getFeatures(buffer, -3, 0); 966 for (int i = 0; i < buf_len; i++) { 967 _msgdigest_features[i] = buffer[i]; 968 } 969 _nmsgdigest_features = used_len; 970 } 971 972 static int levelProperties[_max_cache_levels]; // All property indications per level. 973 static int levelScope[_max_cache_levels]; // private/shared 974 static const char* levelScopeText[4] = {"No cache ", 975 "CPU private", 976 "shared ", 977 "reserved "}; 978 979 static int levelType[_max_cache_levels]; // D/I/mixed 980 static const char* levelTypeText[4] = {"separate D and I caches", 981 "I cache only ", 982 "D-cache only ", 983 "combined D/I cache "}; 984 985 static unsigned int levelReserved[_max_cache_levels]; // reserved property bits 986 static unsigned int levelLineSize[_max_cache_levels]; 987 static unsigned int levelTotalSize[_max_cache_levels]; 988 static unsigned int levelAssociativity[_max_cache_levels]; 989 990 991 // Extract Cache Layout details. 992 if (has_ExtractCPUAttributes() && printVerbose) { // For information only, as of now. 993 bool lineSize_mismatch; 994 bool print_something; 995 long functionResult; 996 unsigned int attributeIndication = 0; // 0..15 997 unsigned int levelIndication = 0; // 0..8 998 unsigned int typeIndication = 0; // 0..1 (D-Cache, I-Cache) 999 int functionCode = calculate_ECAG_functionCode(attributeIndication, levelIndication, typeIndication); 1000 1001 // Get cache topology. 1002 functionResult = call_getFeatures(buffer, -1, functionCode); 1003 1004 for (unsigned int i = 0; i < _max_cache_levels; i++) { 1005 if (functionResult > 0) { 1006 int shiftVal = 8*(_max_cache_levels-(i+1)); 1007 levelProperties[i] = (functionResult & (0xffUL<<shiftVal)) >> shiftVal; 1008 levelReserved[i] = (levelProperties[i] & 0xf0) >> 4; 1009 levelScope[i] = (levelProperties[i] & 0x0c) >> 2; 1010 levelType[i] = (levelProperties[i] & 0x03); 1011 } else { 1012 levelProperties[i] = 0; 1013 levelReserved[i] = 0; 1014 levelScope[i] = 0; 1015 levelType[i] = 0; 1016 } 1017 levelLineSize[i] = 0; 1018 levelTotalSize[i] = 0; 1019 levelAssociativity[i] = 0; 1020 } 1021 1022 tty->cr(); 1023 tty->print_cr("------------------------------------"); 1024 tty->print_cr("--- Cache Topology Information ---"); 1025 tty->print_cr("------------------------------------"); 1026 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) { 1027 tty->print_cr(" Cache Level %d: <scope> %s | <type> %s", 1028 i+1, levelScopeText[levelScope[i]], levelTypeText[levelType[i]]); 1029 } 1030 1031 // Get D-cache details per level. 1032 _Dcache_lineSize = 0; 1033 lineSize_mismatch = false; 1034 print_something = false; 1035 typeIndication = 0; // 0..1 (D-Cache, I-Cache) 1036 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) { 1037 if ((levelType[i] == 0) || (levelType[i] == 2)) { 1038 print_something = true; 1039 1040 // Get cache line size of level i. 1041 attributeIndication = 1; 1042 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication); 1043 levelLineSize[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode); 1044 1045 // Get cache total size of level i. 1046 attributeIndication = 2; 1047 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication); 1048 levelTotalSize[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode); 1049 1050 // Get cache associativity of level i. 1051 attributeIndication = 3; 1052 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication); 1053 levelAssociativity[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode); 1054 1055 _Dcache_lineSize = _Dcache_lineSize == 0 ? levelLineSize[i] : _Dcache_lineSize; 1056 lineSize_mismatch = lineSize_mismatch || (_Dcache_lineSize != levelLineSize[i]); 1057 } else { 1058 levelLineSize[i] = 0; 1059 } 1060 } 1061 1062 if (print_something) { 1063 tty->cr(); 1064 tty->print_cr("------------------------------------"); 1065 tty->print_cr("--- D-Cache Detail Information ---"); 1066 tty->print_cr("------------------------------------"); 1067 if (lineSize_mismatch) { 1068 tty->print_cr("WARNING: D-Cache line size mismatch!"); 1069 } 1070 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) { 1071 if (levelLineSize[i] > 0) { 1072 tty->print_cr(" D-Cache Level %d: line size = %4d, total size = %6dKB, associativity = %2d", 1073 i+1, levelLineSize[i], levelTotalSize[i]/(int)K, levelAssociativity[i]); 1074 } 1075 } 1076 } 1077 1078 // Get I-cache details per level. 1079 _Icache_lineSize = 0; 1080 lineSize_mismatch = false; 1081 print_something = false; 1082 typeIndication = 1; // 0..1 (D-Cache, I-Cache) 1083 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) { 1084 if ((levelType[i] == 0) || (levelType[i] == 1)) { 1085 print_something = true; 1086 1087 // Get cache line size of level i. 1088 attributeIndication = 1; 1089 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication); 1090 levelLineSize[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode); 1091 1092 // Get cache total size of level i. 1093 attributeIndication = 2; 1094 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication); 1095 levelTotalSize[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode); 1096 1097 // Get cache associativity of level i. 1098 attributeIndication = 3; 1099 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication); 1100 levelAssociativity[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode); 1101 1102 _Icache_lineSize = _Icache_lineSize == 0 ? levelLineSize[i] : _Icache_lineSize; 1103 lineSize_mismatch = lineSize_mismatch || (_Icache_lineSize != levelLineSize[i]); 1104 } else { 1105 levelLineSize[i] = 0; 1106 } 1107 } 1108 1109 if (print_something) { 1110 tty->cr(); 1111 tty->print_cr("------------------------------------"); 1112 tty->print_cr("--- I-Cache Detail Information ---"); 1113 tty->print_cr("------------------------------------"); 1114 if (lineSize_mismatch) { 1115 tty->print_cr("WARNING: I-Cache line size mismatch!"); 1116 } 1117 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) { 1118 if (levelLineSize[i] > 0) { 1119 tty->print_cr(" I-Cache Level %d: line size = %4d, total size = %6dKB, associativity = %2d", 1120 i+1, levelLineSize[i], levelTotalSize[i]/(int)K, levelAssociativity[i]); 1121 } 1122 } 1123 } 1124 1125 // Get D/I-cache details per level. 1126 lineSize_mismatch = false; 1127 print_something = false; 1128 typeIndication = 0; // 0..1 (D-Cache, I-Cache) 1129 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) { 1130 if (levelType[i] == 3) { 1131 print_something = true; 1132 1133 // Get cache line size of level i. 1134 attributeIndication = 1; 1135 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication); 1136 levelLineSize[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode); 1137 1138 // Get cache total size of level i. 1139 attributeIndication = 2; 1140 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication); 1141 levelTotalSize[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode); 1142 1143 // Get cache associativity of level i. 1144 attributeIndication = 3; 1145 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication); 1146 levelAssociativity[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode); 1147 1148 _Dcache_lineSize = _Dcache_lineSize == 0 ? levelLineSize[i] : _Dcache_lineSize; 1149 _Icache_lineSize = _Icache_lineSize == 0 ? levelLineSize[i] : _Icache_lineSize; 1150 lineSize_mismatch = lineSize_mismatch || (_Dcache_lineSize != levelLineSize[i]) 1151 || (_Icache_lineSize != levelLineSize[i]); 1152 } else { 1153 levelLineSize[i] = 0; 1154 } 1155 } 1156 1157 if (print_something) { 1158 tty->cr(); 1159 tty->print_cr("--------------------------------------"); 1160 tty->print_cr("--- D/I-Cache Detail Information ---"); 1161 tty->print_cr("--------------------------------------"); 1162 if (lineSize_mismatch) { 1163 tty->print_cr("WARNING: D/I-Cache line size mismatch!"); 1164 } 1165 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) { 1166 if (levelLineSize[i] > 0) { 1167 tty->print_cr(" D/I-Cache Level %d: line size = %4d, total size = %6dKB, associativity = %2d", 1168 i+1, levelLineSize[i], levelTotalSize[i]/(int)K, levelAssociativity[i]); 1169 } 1170 } 1171 } 1172 tty->cr(); 1173 } 1174 return; 1175 } 1176 1177 unsigned long VM_Version::z_SIGILL() { 1178 unsigned long ZeroBuffer = 0; 1179 unsigned long work; 1180 asm( 1181 " LA %[work],%[buffer] \n\t" // Load address of buffer. 1182 " LARL 14,+6 \n\t" // Load address of faulting instruction. 1183 " BCR 15,%[work] \n\t" // Branch into buffer, execute whatever is in there. 1184 : [buffer] "+Q" (ZeroBuffer) /* outputs */ 1185 , [work] "=&a" (work) /* outputs */ 1186 : /* inputs */ 1187 : "cc" /* clobbered */ 1188 ); 1189 return ZeroBuffer; 1190 } 1191 1192 unsigned long VM_Version::z_SIGSEGV() { 1193 unsigned long ZeroBuffer = 0; 1194 unsigned long work; 1195 asm( 1196 " LG %[work],%[buffer] \n\t" // Load zero address. 1197 " STG %[work],0(,%[work])\n\t" // Store to address zero. 1198 : [buffer] "+Q" (ZeroBuffer) /* outputs */ 1199 , [work] "=&a" (work) /* outputs */ 1200 : /* inputs */ 1201 : "cc" /* clobbered */ 1202 ); 1203 return ZeroBuffer; 1204 } 1205