1 /*
2 * Copyright (c) 1998, 2016, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "memory/allocation.inline.hpp"
27 #include "opto/ad.hpp"
28 #include "opto/block.hpp"
29 #include "opto/c2compiler.hpp"
30 #include "opto/callnode.hpp"
31 #include "opto/cfgnode.hpp"
32 #include "opto/machnode.hpp"
33 #include "opto/runtime.hpp"
34 #include "opto/chaitin.hpp"
35 #include "runtime/sharedRuntime.hpp"
36
37 // Optimization - Graph Style
38
39 // Check whether val is not-null-decoded compressed oop,
40 // i.e. will grab into the base of the heap if it represents NULL.
41 static bool accesses_heap_base_zone(Node *val) {
42 if (Universe::narrow_oop_base() > 0) { // Implies UseCompressedOops.
43 if (val && val->is_Mach()) {
44 if (val->as_Mach()->ideal_Opcode() == Op_DecodeN) {
45 // This assumes all Decodes with TypePtr::NotNull are matched to nodes that
46 // decode NULL to point to the heap base (Decode_NN).
47 if (val->bottom_type()->is_oopptr()->ptr() == TypePtr::NotNull) {
48 return true;
49 }
50 }
51 // Must recognize load operation with Decode matched in memory operand.
52 // We should not reach here exept for PPC/AIX, as os::zero_page_read_protected()
53 // returns true everywhere else. On PPC, no such memory operands
54 // exist, therefore we did not yet implement a check for such operands.
55 NOT_AIX(Unimplemented());
56 }
57 }
58 return false;
59 }
60
61 static bool needs_explicit_null_check_for_read(Node *val) {
62 // On some OSes (AIX) the page at address 0 is only write protected.
63 // If so, only Store operations will trap.
64 if (os::zero_page_read_protected()) {
65 return false; // Implicit null check will work.
66 }
67 // Also a read accessing the base of a heap-based compressed heap will trap.
68 if (accesses_heap_base_zone(val) && // Hits the base zone page.
69 Universe::narrow_oop_use_implicit_null_checks()) { // Base zone page is protected.
70 return false;
71 }
72
73 return true;
74 }
75
76 //------------------------------implicit_null_check----------------------------
77 // Detect implicit-null-check opportunities. Basically, find NULL checks
78 // with suitable memory ops nearby. Use the memory op to do the NULL check.
79 // I can generate a memory op if there is not one nearby.
80 // The proj is the control projection for the not-null case.
81 // The val is the pointer being checked for nullness or
82 // decodeHeapOop_not_null node if it did not fold into address.
83 void PhaseCFG::implicit_null_check(Block* block, Node *proj, Node *val, int allowed_reasons) {
84 // Assume if null check need for 0 offset then always needed
85 // Intel solaris doesn't support any null checks yet and no
86 // mechanism exists (yet) to set the switches at an os_cpu level
87 if( !ImplicitNullChecks || MacroAssembler::needs_explicit_null_check(0)) return;
88
89 // Make sure the ptr-is-null path appears to be uncommon!
90 float f = block->end()->as_MachIf()->_prob;
91 if( proj->Opcode() == Op_IfTrue ) f = 1.0f - f;
92 if( f > PROB_UNLIKELY_MAG(4) ) return;
93
94 uint bidx = 0; // Capture index of value into memop
95 bool was_store; // Memory op is a store op
96
97 // Get the successor block for if the test ptr is non-null
98 Block* not_null_block; // this one goes with the proj
99 Block* null_block;
100 if (block->get_node(block->number_of_nodes()-1) == proj) {
101 null_block = block->_succs[0];
102 not_null_block = block->_succs[1];
103 } else {
104 assert(block->get_node(block->number_of_nodes()-2) == proj, "proj is one or the other");
105 not_null_block = block->_succs[0];
106 null_block = block->_succs[1];
107 }
108 while (null_block->is_Empty() == Block::empty_with_goto) {
109 null_block = null_block->_succs[0];
110 }
111
112 // Search the exception block for an uncommon trap.
113 // (See Parse::do_if and Parse::do_ifnull for the reason
114 // we need an uncommon trap. Briefly, we need a way to
115 // detect failure of this optimization, as in 6366351.)
116 {
117 bool found_trap = false;
118 for (uint i1 = 0; i1 < null_block->number_of_nodes(); i1++) {
119 Node* nn = null_block->get_node(i1);
120 if (nn->is_MachCall() &&
121 nn->as_MachCall()->entry_point() == SharedRuntime::uncommon_trap_blob()->entry_point()) {
122 const Type* trtype = nn->in(TypeFunc::Parms)->bottom_type();
123 if (trtype->isa_int() && trtype->is_int()->is_con()) {
124 jint tr_con = trtype->is_int()->get_con();
125 Deoptimization::DeoptReason reason = Deoptimization::trap_request_reason(tr_con);
126 Deoptimization::DeoptAction action = Deoptimization::trap_request_action(tr_con);
127 assert((int)reason < (int)BitsPerInt, "recode bit map");
128 if (is_set_nth_bit(allowed_reasons, (int) reason)
129 && action != Deoptimization::Action_none) {
130 // This uncommon trap is sure to recompile, eventually.
131 // When that happens, C->too_many_traps will prevent
132 // this transformation from happening again.
133 found_trap = true;
134 }
135 }
136 break;
137 }
138 }
139 if (!found_trap) {
140 // We did not find an uncommon trap.
141 return;
142 }
143 }
144
145 // Check for decodeHeapOop_not_null node which did not fold into address
146 bool is_decoden = ((intptr_t)val) & 1;
147 val = (Node*)(((intptr_t)val) & ~1);
148
149 assert(!is_decoden || (val->in(0) == NULL) && val->is_Mach() &&
150 (val->as_Mach()->ideal_Opcode() == Op_DecodeN), "sanity");
151
152 // Search the successor block for a load or store who's base value is also
153 // the tested value. There may be several.
154 Node_List *out = new Node_List(Thread::current()->resource_area());
155 MachNode *best = NULL; // Best found so far
156 for (DUIterator i = val->outs(); val->has_out(i); i++) {
157 Node *m = val->out(i);
158 if( !m->is_Mach() ) continue;
159 MachNode *mach = m->as_Mach();
160 was_store = false;
161 int iop = mach->ideal_Opcode();
162 switch( iop ) {
163 case Op_LoadB:
164 case Op_LoadUB:
165 case Op_LoadUS:
166 case Op_LoadD:
167 case Op_LoadF:
168 case Op_LoadI:
169 case Op_LoadL:
170 case Op_LoadP:
171 case Op_LoadN:
172 case Op_LoadS:
173 case Op_LoadKlass:
174 case Op_LoadNKlass:
175 case Op_LoadRange:
176 case Op_LoadD_unaligned:
177 case Op_LoadL_unaligned:
178 assert(mach->in(2) == val, "should be address");
179 break;
180 case Op_StoreB:
181 case Op_StoreC:
182 case Op_StoreCM:
183 case Op_StoreD:
184 case Op_StoreF:
185 case Op_StoreI:
186 case Op_StoreL:
187 case Op_StoreP:
188 case Op_StoreN:
189 case Op_StoreNKlass:
190 was_store = true; // Memory op is a store op
191 // Stores will have their address in slot 2 (memory in slot 1).
192 // If the value being nul-checked is in another slot, it means we
193 // are storing the checked value, which does NOT check the value!
194 if( mach->in(2) != val ) continue;
195 break; // Found a memory op?
196 case Op_StrComp:
197 case Op_StrEquals:
198 case Op_StrIndexOf:
199 case Op_StrIndexOfChar:
200 case Op_AryEq:
201 case Op_StrInflatedCopy:
202 case Op_StrCompressedCopy:
203 case Op_EncodeISOArray:
204 case Op_HasNegatives:
205 // Not a legit memory op for implicit null check regardless of
206 // embedded loads
207 continue;
208 default: // Also check for embedded loads
209 if( !mach->needs_anti_dependence_check() )
210 continue; // Not an memory op; skip it
211 if( must_clone[iop] ) {
212 // Do not move nodes which produce flags because
213 // RA will try to clone it to place near branch and
214 // it will cause recompilation, see clone_node().
215 continue;
216 }
217 {
218 // Check that value is used in memory address in
219 // instructions with embedded load (CmpP val1,(val2+off)).
220 Node* base;
221 Node* index;
222 const MachOper* oper = mach->memory_inputs(base, index);
223 if (oper == NULL || oper == (MachOper*)-1) {
224 continue; // Not an memory op; skip it
225 }
226 if (val == base ||
227 val == index && val->bottom_type()->isa_narrowoop()) {
228 break; // Found it
229 } else {
230 continue; // Skip it
231 }
232 }
233 break;
234 }
235
236 // On some OSes (AIX) the page at address 0 is only write protected.
237 // If so, only Store operations will trap.
238 // But a read accessing the base of a heap-based compressed heap will trap.
239 if (!was_store && needs_explicit_null_check_for_read(val)) {
240 continue;
241 }
242
243 // Check that node's control edge is not-null block's head or dominates it,
244 // otherwise we can't hoist it because there are other control dependencies.
245 Node* ctrl = mach->in(0);
246 if (ctrl != NULL && !(ctrl == not_null_block->head() ||
247 get_block_for_node(ctrl)->dominates(not_null_block))) {
248 continue;
249 }
250
251 // check if the offset is not too high for implicit exception
252 {
253 intptr_t offset = 0;
254 const TypePtr *adr_type = NULL; // Do not need this return value here
255 const Node* base = mach->get_base_and_disp(offset, adr_type);
256 if (base == NULL || base == NodeSentinel) {
257 // Narrow oop address doesn't have base, only index
258 if (val->bottom_type()->isa_narrowoop() &&
259 (MacroAssembler::needs_explicit_null_check(offset) ||
260 !Universe::narrow_oop_use_implicit_null_checks()))
261 continue; // Give up if offset is beyond page size
262 // cannot reason about it; is probably not implicit null exception
263 } else {
264 const TypePtr* tptr;
265 if (UseCompressedOops && (Universe::narrow_oop_shift() == 0 ||
266 Universe::narrow_klass_shift() == 0)) {
267 // 32-bits narrow oop can be the base of address expressions
268 tptr = base->get_ptr_type();
269 } else {
270 // only regular oops are expected here
271 tptr = base->bottom_type()->is_ptr();
272 }
273 // Give up if offset is not a compile-time constant
274 if (offset == Type::OffsetBot || tptr->_offset == Type::OffsetBot)
275 continue;
276 offset += tptr->_offset; // correct if base is offseted
277 if (MacroAssembler::needs_explicit_null_check(offset))
278 continue; // Give up is reference is beyond 4K page size
279 // Access to non-protected heap base
280 if (base->is_Mach() && base->as_Mach()->ideal_Opcode() == Op_DecodeN &&
281 !Universe::narrow_oop_use_implicit_null_checks())
282 continue;
283 }
284 }
285
286 // Check ctrl input to see if the null-check dominates the memory op
287 Block *cb = get_block_for_node(mach);
288 cb = cb->_idom; // Always hoist at least 1 block
289 if( !was_store ) { // Stores can be hoisted only one block
290 while( cb->_dom_depth > (block->_dom_depth + 1))
291 cb = cb->_idom; // Hoist loads as far as we want
292 // The non-null-block should dominate the memory op, too. Live
293 // range spilling will insert a spill in the non-null-block if it is
294 // needs to spill the memory op for an implicit null check.
295 if (cb->_dom_depth == (block->_dom_depth + 1)) {
296 if (cb != not_null_block) continue;
297 cb = cb->_idom;
298 }
299 }
300 if( cb != block ) continue;
301
302 // Found a memory user; see if it can be hoisted to check-block
303 uint vidx = 0; // Capture index of value into memop
304 uint j;
305 for( j = mach->req()-1; j > 0; j-- ) {
306 if( mach->in(j) == val ) {
307 vidx = j;
308 // Ignore DecodeN val which could be hoisted to where needed.
309 if( is_decoden ) continue;
310 }
311 // Block of memory-op input
312 Block *inb = get_block_for_node(mach->in(j));
313 Block *b = block; // Start from nul check
314 while( b != inb && b->_dom_depth > inb->_dom_depth )
315 b = b->_idom; // search upwards for input
316 // See if input dominates null check
317 if( b != inb )
318 break;
319 }
320 if( j > 0 )
321 continue;
322 Block *mb = get_block_for_node(mach);
323 // Hoisting stores requires more checks for the anti-dependence case.
324 // Give up hoisting if we have to move the store past any load.
325 if( was_store ) {
326 Block *b = mb; // Start searching here for a local load
327 // mach use (faulting) trying to hoist
328 // n might be blocker to hoisting
329 while( b != block ) {
330 uint k;
331 for( k = 1; k < b->number_of_nodes(); k++ ) {
332 Node *n = b->get_node(k);
333 if( n->needs_anti_dependence_check() &&
334 n->in(LoadNode::Memory) == mach->in(StoreNode::Memory) )
335 break; // Found anti-dependent load
336 }
337 if( k < b->number_of_nodes() )
338 break; // Found anti-dependent load
339 // Make sure control does not do a merge (would have to check allpaths)
340 if( b->num_preds() != 2 ) break;
341 b = get_block_for_node(b->pred(1)); // Move up to predecessor block
342 }
343 if( b != block ) continue;
344 }
345
346 // Make sure this memory op is not already being used for a NullCheck
347 Node *e = mb->end();
348 if( e->is_MachNullCheck() && e->in(1) == mach )
349 continue; // Already being used as a NULL check
350
351 // Found a candidate! Pick one with least dom depth - the highest
352 // in the dom tree should be closest to the null check.
353 if (best == NULL || get_block_for_node(mach)->_dom_depth < get_block_for_node(best)->_dom_depth) {
354 best = mach;
355 bidx = vidx;
356 }
357 }
358 // No candidate!
359 if (best == NULL) {
360 return;
361 }
362
363 // ---- Found an implicit null check
364 #ifndef PRODUCT
365 extern int implicit_null_checks;
366 implicit_null_checks++;
367 #endif
368
369 if( is_decoden ) {
370 // Check if we need to hoist decodeHeapOop_not_null first.
371 Block *valb = get_block_for_node(val);
372 if( block != valb && block->_dom_depth < valb->_dom_depth ) {
373 // Hoist it up to the end of the test block.
374 valb->find_remove(val);
375 block->add_inst(val);
376 map_node_to_block(val, block);
377 // DecodeN on x86 may kill flags. Check for flag-killing projections
378 // that also need to be hoisted.
379 for (DUIterator_Fast jmax, j = val->fast_outs(jmax); j < jmax; j++) {
380 Node* n = val->fast_out(j);
381 if( n->is_MachProj() ) {
382 get_block_for_node(n)->find_remove(n);
383 block->add_inst(n);
384 map_node_to_block(n, block);
385 }
386 }
387 }
388 }
389 // Hoist the memory candidate up to the end of the test block.
390 Block *old_block = get_block_for_node(best);
391 old_block->find_remove(best);
392 block->add_inst(best);
393 map_node_to_block(best, block);
394
395 // Move the control dependence if it is pinned to not-null block.
396 // Don't change it in other cases: NULL or dominating control.
397 if (best->in(0) == not_null_block->head()) {
398 // Set it to control edge of null check.
399 best->set_req(0, proj->in(0)->in(0));
400 }
401
402 // Check for flag-killing projections that also need to be hoisted
403 // Should be DU safe because no edge updates.
404 for (DUIterator_Fast jmax, j = best->fast_outs(jmax); j < jmax; j++) {
405 Node* n = best->fast_out(j);
406 if( n->is_MachProj() ) {
407 get_block_for_node(n)->find_remove(n);
408 block->add_inst(n);
409 map_node_to_block(n, block);
410 }
411 }
412
413 // proj==Op_True --> ne test; proj==Op_False --> eq test.
414 // One of two graph shapes got matched:
415 // (IfTrue (If (Bool NE (CmpP ptr NULL))))
416 // (IfFalse (If (Bool EQ (CmpP ptr NULL))))
417 // NULL checks are always branch-if-eq. If we see a IfTrue projection
418 // then we are replacing a 'ne' test with a 'eq' NULL check test.
419 // We need to flip the projections to keep the same semantics.
420 if( proj->Opcode() == Op_IfTrue ) {
421 // Swap order of projections in basic block to swap branch targets
422 Node *tmp1 = block->get_node(block->end_idx()+1);
423 Node *tmp2 = block->get_node(block->end_idx()+2);
424 block->map_node(tmp2, block->end_idx()+1);
425 block->map_node(tmp1, block->end_idx()+2);
426 Node *tmp = new Node(C->top()); // Use not NULL input
427 tmp1->replace_by(tmp);
428 tmp2->replace_by(tmp1);
429 tmp->replace_by(tmp2);
430 tmp->destruct();
431 }
432
433 // Remove the existing null check; use a new implicit null check instead.
434 // Since schedule-local needs precise def-use info, we need to correct
435 // it as well.
436 Node *old_tst = proj->in(0);
437 MachNode *nul_chk = new MachNullCheckNode(old_tst->in(0),best,bidx);
438 block->map_node(nul_chk, block->end_idx());
439 map_node_to_block(nul_chk, block);
440 // Redirect users of old_test to nul_chk
441 for (DUIterator_Last i2min, i2 = old_tst->last_outs(i2min); i2 >= i2min; --i2)
442 old_tst->last_out(i2)->set_req(0, nul_chk);
443 // Clean-up any dead code
444 for (uint i3 = 0; i3 < old_tst->req(); i3++) {
445 Node* in = old_tst->in(i3);
446 old_tst->set_req(i3, NULL);
447 if (in->outcnt() == 0) {
448 // Remove dead input node
449 in->disconnect_inputs(NULL, C);
450 block->find_remove(in);
451 }
452 }
453
454 latency_from_uses(nul_chk);
455 latency_from_uses(best);
456
457 // insert anti-dependences to defs in this block
458 if (! best->needs_anti_dependence_check()) {
459 for (uint k = 1; k < block->number_of_nodes(); k++) {
460 Node *n = block->get_node(k);
461 if (n->needs_anti_dependence_check() &&
462 n->in(LoadNode::Memory) == best->in(StoreNode::Memory)) {
463 // Found anti-dependent load
464 insert_anti_dependences(block, n);
465 }
466 }
467 }
468 }
469
470
471 //------------------------------select-----------------------------------------
472 // Select a nice fellow from the worklist to schedule next. If there is only
473 // one choice, then use it. Projections take top priority for correctness
474 // reasons - if I see a projection, then it is next. There are a number of
475 // other special cases, for instructions that consume condition codes, et al.
476 // These are chosen immediately. Some instructions are required to immediately
477 // precede the last instruction in the block, and these are taken last. Of the
478 // remaining cases (most), choose the instruction with the greatest latency
479 // (that is, the most number of pseudo-cycles required to the end of the
480 // routine). If there is a tie, choose the instruction with the most inputs.
481 Node* PhaseCFG::select(
482 Block* block,
483 Node_List &worklist,
484 GrowableArray<int> &ready_cnt,
485 VectorSet &next_call,
486 uint sched_slot,
487 intptr_t* recalc_pressure_nodes) {
488
489 // If only a single entry on the stack, use it
490 uint cnt = worklist.size();
491 if (cnt == 1) {
492 Node *n = worklist[0];
493 worklist.map(0,worklist.pop());
494 return n;
495 }
496
497 uint choice = 0; // Bigger is most important
498 uint latency = 0; // Bigger is scheduled first
499 uint score = 0; // Bigger is better
500 int idx = -1; // Index in worklist
501 int cand_cnt = 0; // Candidate count
502 bool block_size_threshold_ok = (block->number_of_nodes() > 10) ? true : false;
503
504 for( uint i=0; i<cnt; i++ ) { // Inspect entire worklist
505 // Order in worklist is used to break ties.
506 // See caller for how this is used to delay scheduling
507 // of induction variable increments to after the other
508 // uses of the phi are scheduled.
509 Node *n = worklist[i]; // Get Node on worklist
510
511 int iop = n->is_Mach() ? n->as_Mach()->ideal_Opcode() : 0;
512 if( n->is_Proj() || // Projections always win
513 n->Opcode()== Op_Con || // So does constant 'Top'
514 iop == Op_CreateEx || // Create-exception must start block
515 iop == Op_CheckCastPP
516 ) {
517 worklist.map(i,worklist.pop());
518 return n;
519 }
520
521 // Final call in a block must be adjacent to 'catch'
522 Node *e = block->end();
523 if( e->is_Catch() && e->in(0)->in(0) == n )
524 continue;
525
526 // Memory op for an implicit null check has to be at the end of the block
527 if( e->is_MachNullCheck() && e->in(1) == n )
528 continue;
529
530 // Schedule IV increment last.
531 if (e->is_Mach() && e->as_Mach()->ideal_Opcode() == Op_CountedLoopEnd) {
532 // Cmp might be matched into CountedLoopEnd node.
533 Node *cmp = (e->in(1)->ideal_reg() == Op_RegFlags) ? e->in(1) : e;
534 if (cmp->req() > 1 && cmp->in(1) == n && n->is_iteratively_computed()) {
535 continue;
536 }
537 }
538
539 uint n_choice = 2;
540
541 // See if this instruction is consumed by a branch. If so, then (as the
542 // branch is the last instruction in the basic block) force it to the
543 // end of the basic block
544 if ( must_clone[iop] ) {
545 // See if any use is a branch
546 bool found_machif = false;
547
548 for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) {
549 Node* use = n->fast_out(j);
550
551 // The use is a conditional branch, make them adjacent
552 if (use->is_MachIf() && get_block_for_node(use) == block) {
553 found_machif = true;
554 break;
555 }
556
557 // More than this instruction pending for successor to be ready,
558 // don't choose this if other opportunities are ready
559 if (ready_cnt.at(use->_idx) > 1)
560 n_choice = 1;
561 }
562
563 // loop terminated, prefer not to use this instruction
564 if (found_machif)
565 continue;
566 }
567
568 // See if this has a predecessor that is "must_clone", i.e. sets the
569 // condition code. If so, choose this first
570 for (uint j = 0; j < n->req() ; j++) {
571 Node *inn = n->in(j);
572 if (inn) {
573 if (inn->is_Mach() && must_clone[inn->as_Mach()->ideal_Opcode()] ) {
574 n_choice = 3;
575 break;
576 }
577 }
578 }
579
580 // MachTemps should be scheduled last so they are near their uses
581 if (n->is_MachTemp()) {
582 n_choice = 1;
583 }
584
585 uint n_latency = get_latency_for_node(n);
586 uint n_score = n->req(); // Many inputs get high score to break ties
587
588 if (OptoRegScheduling && block_size_threshold_ok) {
589 if (recalc_pressure_nodes[n->_idx] == 0x7fff7fff) {
590 _regalloc->_scratch_int_pressure.init(_regalloc->_sched_int_pressure.high_pressure_limit());
591 _regalloc->_scratch_float_pressure.init(_regalloc->_sched_float_pressure.high_pressure_limit());
592 // simulate the notion that we just picked this node to schedule
593 n->add_flag(Node::Flag_is_scheduled);
594 // now caculate its effect upon the graph if we did
595 adjust_register_pressure(n, block, recalc_pressure_nodes, false);
596 // return its state for finalize in case somebody else wins
597 n->remove_flag(Node::Flag_is_scheduled);
598 // now save the two final pressure components of register pressure, limiting pressure calcs to short size
599 short int_pressure = (short)_regalloc->_scratch_int_pressure.current_pressure();
600 short float_pressure = (short)_regalloc->_scratch_float_pressure.current_pressure();
601 recalc_pressure_nodes[n->_idx] = int_pressure;
602 recalc_pressure_nodes[n->_idx] |= (float_pressure << 16);
603 }
604
605 if (_scheduling_for_pressure) {
606 latency = n_latency;
607 if (n_choice != 3) {
608 // Now evaluate each register pressure component based on threshold in the score.
609 // In general the defining register type will dominate the score, ergo we will not see register pressure grow on both banks
610 // on a single instruction, but we might see it shrink on both banks.
611 // For each use of register that has a register class that is over the high pressure limit, we build n_score up for
612 // live ranges that terminate on this instruction.
613 if (_regalloc->_sched_int_pressure.current_pressure() > _regalloc->_sched_int_pressure.high_pressure_limit()) {
614 short int_pressure = (short)recalc_pressure_nodes[n->_idx];
615 n_score = (int_pressure < 0) ? ((score + n_score) - int_pressure) : (int_pressure > 0) ? 1 : n_score;
616 }
617 if (_regalloc->_sched_float_pressure.current_pressure() > _regalloc->_sched_float_pressure.high_pressure_limit()) {
618 short float_pressure = (short)(recalc_pressure_nodes[n->_idx] >> 16);
619 n_score = (float_pressure < 0) ? ((score + n_score) - float_pressure) : (float_pressure > 0) ? 1 : n_score;
620 }
621 } else {
622 // make sure we choose these candidates
623 score = 0;
624 }
625 }
626 }
627
628 // Keep best latency found
629 cand_cnt++;
630 if (choice < n_choice ||
631 (choice == n_choice &&
632 ((StressLCM && Compile::randomized_select(cand_cnt)) ||
633 (!StressLCM &&
634 (latency < n_latency ||
635 (latency == n_latency &&
636 (score < n_score))))))) {
637 choice = n_choice;
638 latency = n_latency;
639 score = n_score;
640 idx = i; // Also keep index in worklist
641 }
642 } // End of for all ready nodes in worklist
643
644 assert(idx >= 0, "index should be set");
645 Node *n = worklist[(uint)idx]; // Get the winner
646
647 worklist.map((uint)idx, worklist.pop()); // Compress worklist
648 return n;
649 }
650
651 //-------------------------adjust_register_pressure----------------------------
652 void PhaseCFG::adjust_register_pressure(Node* n, Block* block, intptr_t* recalc_pressure_nodes, bool finalize_mode) {
653 PhaseLive* liveinfo = _regalloc->get_live();
654 IndexSet* liveout = liveinfo->live(block);
655 // first adjust the register pressure for the sources
656 for (uint i = 1; i < n->req(); i++) {
657 bool lrg_ends = false;
658 Node *src_n = n->in(i);
659 if (src_n == NULL) continue;
660 if (!src_n->is_Mach()) continue;
661 uint src = _regalloc->_lrg_map.find(src_n);
662 if (src == 0) continue;
663 LRG& lrg_src = _regalloc->lrgs(src);
664 // detect if the live range ends or not
665 if (liveout->member(src) == false) {
666 lrg_ends = true;
667 for (DUIterator_Fast jmax, j = src_n->fast_outs(jmax); j < jmax; j++) {
668 Node* m = src_n->fast_out(j); // Get user
669 if (m == n) continue;
670 if (!m->is_Mach()) continue;
671 MachNode *mach = m->as_Mach();
672 bool src_matches = false;
673 int iop = mach->ideal_Opcode();
674
675 switch (iop) {
676 case Op_StoreB:
677 case Op_StoreC:
678 case Op_StoreCM:
679 case Op_StoreD:
680 case Op_StoreF:
681 case Op_StoreI:
682 case Op_StoreL:
683 case Op_StoreP:
684 case Op_StoreN:
685 case Op_StoreVector:
686 case Op_StoreNKlass:
687 for (uint k = 1; k < m->req(); k++) {
688 Node *in = m->in(k);
689 if (in == src_n) {
690 src_matches = true;
691 break;
692 }
693 }
694 break;
695
696 default:
697 src_matches = true;
698 break;
699 }
700
701 // If we have a store as our use, ignore the non source operands
702 if (src_matches == false) continue;
703
704 // Mark every unscheduled use which is not n with a recalculation
705 if ((get_block_for_node(m) == block) && (!m->is_scheduled())) {
706 if (finalize_mode && !m->is_Phi()) {
707 recalc_pressure_nodes[m->_idx] = 0x7fff7fff;
708 }
709 lrg_ends = false;
710 }
711 }
712 }
713 // if none, this live range ends and we can adjust register pressure
714 if (lrg_ends) {
715 if (finalize_mode) {
716 _regalloc->lower_pressure(block, 0, lrg_src, NULL, _regalloc->_sched_int_pressure, _regalloc->_sched_float_pressure);
717 } else {
718 _regalloc->lower_pressure(block, 0, lrg_src, NULL, _regalloc->_scratch_int_pressure, _regalloc->_scratch_float_pressure);
719 }
720 }
721 }
722
723 // now add the register pressure from the dest and evaluate which heuristic we should use:
724 // 1.) The default, latency scheduling
725 // 2.) Register pressure scheduling based on the high pressure limit threshold for int or float register stacks
726 uint dst = _regalloc->_lrg_map.find(n);
727 if (dst != 0) {
728 LRG& lrg_dst = _regalloc->lrgs(dst);
729 if (finalize_mode) {
730 _regalloc->raise_pressure(block, lrg_dst, _regalloc->_sched_int_pressure, _regalloc->_sched_float_pressure);
731 // check to see if we fall over the register pressure cliff here
732 if (_regalloc->_sched_int_pressure.current_pressure() > _regalloc->_sched_int_pressure.high_pressure_limit()) {
733 _scheduling_for_pressure = true;
734 } else if (_regalloc->_sched_float_pressure.current_pressure() > _regalloc->_sched_float_pressure.high_pressure_limit()) {
735 _scheduling_for_pressure = true;
736 } else {
737 // restore latency scheduling mode
738 _scheduling_for_pressure = false;
739 }
740 } else {
741 _regalloc->raise_pressure(block, lrg_dst, _regalloc->_scratch_int_pressure, _regalloc->_scratch_float_pressure);
742 }
743 }
744 }
745
746 //------------------------------set_next_call----------------------------------
747 void PhaseCFG::set_next_call(Block* block, Node* n, VectorSet& next_call) {
748 if( next_call.test_set(n->_idx) ) return;
749 for( uint i=0; i<n->len(); i++ ) {
750 Node *m = n->in(i);
751 if( !m ) continue; // must see all nodes in block that precede call
752 if (get_block_for_node(m) == block) {
753 set_next_call(block, m, next_call);
754 }
755 }
756 }
757
758 //------------------------------needed_for_next_call---------------------------
759 // Set the flag 'next_call' for each Node that is needed for the next call to
760 // be scheduled. This flag lets me bias scheduling so Nodes needed for the
761 // next subroutine call get priority - basically it moves things NOT needed
762 // for the next call till after the call. This prevents me from trying to
763 // carry lots of stuff live across a call.
764 void PhaseCFG::needed_for_next_call(Block* block, Node* this_call, VectorSet& next_call) {
765 // Find the next control-defining Node in this block
766 Node* call = NULL;
767 for (DUIterator_Fast imax, i = this_call->fast_outs(imax); i < imax; i++) {
768 Node* m = this_call->fast_out(i);
769 if (get_block_for_node(m) == block && // Local-block user
770 m != this_call && // Not self-start node
771 m->is_MachCall()) {
772 call = m;
773 break;
774 }
775 }
776 if (call == NULL) return; // No next call (e.g., block end is near)
777 // Set next-call for all inputs to this call
778 set_next_call(block, call, next_call);
779 }
780
781 //------------------------------add_call_kills-------------------------------------
782 // helper function that adds caller save registers to MachProjNode
783 static void add_call_kills(MachProjNode *proj, RegMask& regs, const char* save_policy, bool exclude_soe) {
784 // Fill in the kill mask for the call
785 for( OptoReg::Name r = OptoReg::Name(0); r < _last_Mach_Reg; r=OptoReg::add(r,1) ) {
786 if( !regs.Member(r) ) { // Not already defined by the call
787 // Save-on-call register?
788 if ((save_policy[r] == 'C') ||
789 (save_policy[r] == 'A') ||
790 ((save_policy[r] == 'E') && exclude_soe)) {
791 proj->_rout.Insert(r);
792 }
793 }
794 }
795 }
796
797
798 //------------------------------sched_call-------------------------------------
799 uint PhaseCFG::sched_call(Block* block, uint node_cnt, Node_List& worklist, GrowableArray<int>& ready_cnt, MachCallNode* mcall, VectorSet& next_call) {
800 RegMask regs;
801
802 // Schedule all the users of the call right now. All the users are
803 // projection Nodes, so they must be scheduled next to the call.
804 // Collect all the defined registers.
805 for (DUIterator_Fast imax, i = mcall->fast_outs(imax); i < imax; i++) {
806 Node* n = mcall->fast_out(i);
807 assert( n->is_MachProj(), "" );
808 int n_cnt = ready_cnt.at(n->_idx)-1;
809 ready_cnt.at_put(n->_idx, n_cnt);
810 assert( n_cnt == 0, "" );
811 // Schedule next to call
812 block->map_node(n, node_cnt++);
813 // Collect defined registers
814 regs.OR(n->out_RegMask());
815 // Check for scheduling the next control-definer
816 if( n->bottom_type() == Type::CONTROL )
817 // Warm up next pile of heuristic bits
818 needed_for_next_call(block, n, next_call);
819
820 // Children of projections are now all ready
821 for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) {
822 Node* m = n->fast_out(j); // Get user
823 if(get_block_for_node(m) != block) {
824 continue;
825 }
826 if( m->is_Phi() ) continue;
827 int m_cnt = ready_cnt.at(m->_idx) - 1;
828 ready_cnt.at_put(m->_idx, m_cnt);
829 if( m_cnt == 0 )
830 worklist.push(m);
831 }
832
833 }
834
835 // Act as if the call defines the Frame Pointer.
836 // Certainly the FP is alive and well after the call.
837 regs.Insert(_matcher.c_frame_pointer());
838
839 // Set all registers killed and not already defined by the call.
840 uint r_cnt = mcall->tf()->range()->cnt();
841 int op = mcall->ideal_Opcode();
842 MachProjNode *proj = new MachProjNode( mcall, r_cnt+1, RegMask::Empty, MachProjNode::fat_proj );
843 map_node_to_block(proj, block);
844 block->insert_node(proj, node_cnt++);
845
846 // Select the right register save policy.
847 const char *save_policy = NULL;
848 switch (op) {
849 case Op_CallRuntime:
850 case Op_CallLeaf:
851 case Op_CallLeafNoFP:
852 // Calling C code so use C calling convention
853 save_policy = _matcher._c_reg_save_policy;
854 break;
855
856 case Op_CallStaticJava:
857 case Op_CallDynamicJava:
858 // Calling Java code so use Java calling convention
859 save_policy = _matcher._register_save_policy;
860 break;
861
862 default:
863 ShouldNotReachHere();
864 }
865
866 // When using CallRuntime mark SOE registers as killed by the call
867 // so values that could show up in the RegisterMap aren't live in a
868 // callee saved register since the register wouldn't know where to
869 // find them. CallLeaf and CallLeafNoFP are ok because they can't
870 // have debug info on them. Strictly speaking this only needs to be
871 // done for oops since idealreg2debugmask takes care of debug info
872 // references but there no way to handle oops differently than other
873 // pointers as far as the kill mask goes.
874 bool exclude_soe = op == Op_CallRuntime;
875
876 // If the call is a MethodHandle invoke, we need to exclude the
877 // register which is used to save the SP value over MH invokes from
878 // the mask. Otherwise this register could be used for
879 // deoptimization information.
880 if (op == Op_CallStaticJava) {
881 MachCallStaticJavaNode* mcallstaticjava = (MachCallStaticJavaNode*) mcall;
882 if (mcallstaticjava->_method_handle_invoke)
883 proj->_rout.OR(Matcher::method_handle_invoke_SP_save_mask());
884 }
885
886 add_call_kills(proj, regs, save_policy, exclude_soe);
887
888 return node_cnt;
889 }
890
891
892 //------------------------------schedule_local---------------------------------
893 // Topological sort within a block. Someday become a real scheduler.
894 bool PhaseCFG::schedule_local(Block* block, GrowableArray<int>& ready_cnt, VectorSet& next_call, intptr_t *recalc_pressure_nodes) {
895 // Already "sorted" are the block start Node (as the first entry), and
896 // the block-ending Node and any trailing control projections. We leave
897 // these alone. PhiNodes and ParmNodes are made to follow the block start
898 // Node. Everything else gets topo-sorted.
899
900 #ifndef PRODUCT
901 if (trace_opto_pipelining()) {
902 tty->print_cr("# --- schedule_local B%d, before: ---", block->_pre_order);
903 for (uint i = 0;i < block->number_of_nodes(); i++) {
904 tty->print("# ");
905 block->get_node(i)->fast_dump();
906 }
907 tty->print_cr("#");
908 }
909 #endif
910
911 // RootNode is already sorted
912 if (block->number_of_nodes() == 1) {
913 return true;
914 }
915
916 bool block_size_threshold_ok = (block->number_of_nodes() > 10) ? true : false;
917
918 // We track the uses of local definitions as input dependences so that
919 // we know when a given instruction is avialable to be scheduled.
920 uint i;
921 if (OptoRegScheduling && block_size_threshold_ok) {
922 for (i = 1; i < block->number_of_nodes(); i++) { // setup nodes for pressure calc
923 Node *n = block->get_node(i);
924 n->remove_flag(Node::Flag_is_scheduled);
925 if (!n->is_Phi()) {
926 recalc_pressure_nodes[n->_idx] = 0x7fff7fff;
927 }
928 }
929 }
930
931 // Move PhiNodes and ParmNodes from 1 to cnt up to the start
932 uint node_cnt = block->end_idx();
933 uint phi_cnt = 1;
934 for( i = 1; i<node_cnt; i++ ) { // Scan for Phi
935 Node *n = block->get_node(i);
936 if( n->is_Phi() || // Found a PhiNode or ParmNode
937 (n->is_Proj() && n->in(0) == block->head()) ) {
938 // Move guy at 'phi_cnt' to the end; makes a hole at phi_cnt
939 block->map_node(block->get_node(phi_cnt), i);
940 block->map_node(n, phi_cnt++); // swap Phi/Parm up front
941 if (OptoRegScheduling && block_size_threshold_ok) {
942 // mark n as scheduled
943 n->add_flag(Node::Flag_is_scheduled);
944 }
945 } else { // All others
946 // Count block-local inputs to 'n'
947 uint cnt = n->len(); // Input count
948 uint local = 0;
949 for( uint j=0; j<cnt; j++ ) {
950 Node *m = n->in(j);
951 if( m && get_block_for_node(m) == block && !m->is_top() )
952 local++; // One more block-local input
953 }
954 ready_cnt.at_put(n->_idx, local); // Count em up
955
956 #ifdef ASSERT
957 if( UseConcMarkSweepGC || UseG1GC ) {
958 if( n->is_Mach() && n->as_Mach()->ideal_Opcode() == Op_StoreCM ) {
959 // Check the precedence edges
960 for (uint prec = n->req(); prec < n->len(); prec++) {
961 Node* oop_store = n->in(prec);
962 if (oop_store != NULL) {
963 assert(get_block_for_node(oop_store)->_dom_depth <= block->_dom_depth, "oop_store must dominate card-mark");
964 }
965 }
966 }
967 }
968 #endif
969
970 // A few node types require changing a required edge to a precedence edge
971 // before allocation.
972 if( n->is_Mach() && n->req() > TypeFunc::Parms &&
973 (n->as_Mach()->ideal_Opcode() == Op_MemBarAcquire ||
974 n->as_Mach()->ideal_Opcode() == Op_MemBarVolatile) ) {
975 // MemBarAcquire could be created without Precedent edge.
976 // del_req() replaces the specified edge with the last input edge
977 // and then removes the last edge. If the specified edge > number of
978 // edges the last edge will be moved outside of the input edges array
979 // and the edge will be lost. This is why this code should be
980 // executed only when Precedent (== TypeFunc::Parms) edge is present.
981 Node *x = n->in(TypeFunc::Parms);
982 if (x != NULL && get_block_for_node(x) == block && n->find_prec_edge(x) != -1) {
983 // Old edge to node within same block will get removed, but no precedence
984 // edge will get added because it already exists. Update ready count.
985 int cnt = ready_cnt.at(n->_idx);
986 assert(cnt > 1, "MemBar node %d must not get ready here", n->_idx);
987 ready_cnt.at_put(n->_idx, cnt-1);
988 }
989 n->del_req(TypeFunc::Parms);
990 n->add_prec(x);
991 }
992 }
993 }
994 for(uint i2=i; i2< block->number_of_nodes(); i2++ ) // Trailing guys get zapped count
995 ready_cnt.at_put(block->get_node(i2)->_idx, 0);
996
997 // All the prescheduled guys do not hold back internal nodes
998 uint i3;
999 for (i3 = 0; i3 < phi_cnt; i3++) { // For all pre-scheduled
1000 Node *n = block->get_node(i3); // Get pre-scheduled
1001 for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) {
1002 Node* m = n->fast_out(j);
1003 if (get_block_for_node(m) == block) { // Local-block user
1004 int m_cnt = ready_cnt.at(m->_idx)-1;
1005 if (OptoRegScheduling && block_size_threshold_ok) {
1006 // mark m as scheduled
1007 if (m_cnt < 0) {
1008 m->add_flag(Node::Flag_is_scheduled);
1009 }
1010 }
1011 ready_cnt.at_put(m->_idx, m_cnt); // Fix ready count
1012 }
1013 }
1014 }
1015
1016 Node_List delay;
1017 // Make a worklist
1018 Node_List worklist;
1019 for(uint i4=i3; i4<node_cnt; i4++ ) { // Put ready guys on worklist
1020 Node *m = block->get_node(i4);
1021 if( !ready_cnt.at(m->_idx) ) { // Zero ready count?
1022 if (m->is_iteratively_computed()) {
1023 // Push induction variable increments last to allow other uses
1024 // of the phi to be scheduled first. The select() method breaks
1025 // ties in scheduling by worklist order.
1026 delay.push(m);
1027 } else if (m->is_Mach() && m->as_Mach()->ideal_Opcode() == Op_CreateEx) {
1028 // Force the CreateEx to the top of the list so it's processed
1029 // first and ends up at the start of the block.
1030 worklist.insert(0, m);
1031 } else {
1032 worklist.push(m); // Then on to worklist!
1033 }
1034 }
1035 }
1036 while (delay.size()) {
1037 Node* d = delay.pop();
1038 worklist.push(d);
1039 }
1040
1041 if (OptoRegScheduling && block_size_threshold_ok) {
1042 // To stage register pressure calculations we need to examine the live set variables
1043 // breaking them up by register class to compartmentalize the calculations.
1044 uint float_pressure = Matcher::float_pressure(FLOATPRESSURE);
1045 _regalloc->_sched_int_pressure.init(INTPRESSURE);
1046 _regalloc->_sched_float_pressure.init(float_pressure);
1047 _regalloc->_scratch_int_pressure.init(INTPRESSURE);
1048 _regalloc->_scratch_float_pressure.init(float_pressure);
1049
1050 _regalloc->compute_entry_block_pressure(block);
1051 }
1052
1053 // Warm up the 'next_call' heuristic bits
1054 needed_for_next_call(block, block->head(), next_call);
1055
1056 #ifndef PRODUCT
1057 if (trace_opto_pipelining()) {
1058 for (uint j=0; j< block->number_of_nodes(); j++) {
1059 Node *n = block->get_node(j);
1060 int idx = n->_idx;
1061 tty->print("# ready cnt:%3d ", ready_cnt.at(idx));
1062 tty->print("latency:%3d ", get_latency_for_node(n));
1063 tty->print("%4d: %s\n", idx, n->Name());
1064 }
1065 }
1066 #endif
1067
1068 uint max_idx = (uint)ready_cnt.length();
1069 // Pull from worklist and schedule
1070 while( worklist.size() ) { // Worklist is not ready
1071
1072 #ifndef PRODUCT
1073 if (trace_opto_pipelining()) {
1074 tty->print("# ready list:");
1075 for( uint i=0; i<worklist.size(); i++ ) { // Inspect entire worklist
1076 Node *n = worklist[i]; // Get Node on worklist
1077 tty->print(" %d", n->_idx);
1078 }
1079 tty->cr();
1080 }
1081 #endif
1082
1083 // Select and pop a ready guy from worklist
1084 Node* n = select(block, worklist, ready_cnt, next_call, phi_cnt, recalc_pressure_nodes);
1085 block->map_node(n, phi_cnt++); // Schedule him next
1086
1087 if (OptoRegScheduling && block_size_threshold_ok) {
1088 n->add_flag(Node::Flag_is_scheduled);
1089
1090 // Now adjust the resister pressure with the node we selected
1091 if (!n->is_Phi()) {
1092 adjust_register_pressure(n, block, recalc_pressure_nodes, true);
1093 }
1094 }
1095
1096 #ifndef PRODUCT
1097 if (trace_opto_pipelining()) {
1098 tty->print("# select %d: %s", n->_idx, n->Name());
1099 tty->print(", latency:%d", get_latency_for_node(n));
1100 n->dump();
1101 if (Verbose) {
1102 tty->print("# ready list:");
1103 for( uint i=0; i<worklist.size(); i++ ) { // Inspect entire worklist
1104 Node *n = worklist[i]; // Get Node on worklist
1105 tty->print(" %d", n->_idx);
1106 }
1107 tty->cr();
1108 }
1109 }
1110
1111 #endif
1112 if( n->is_MachCall() ) {
1113 MachCallNode *mcall = n->as_MachCall();
1114 phi_cnt = sched_call(block, phi_cnt, worklist, ready_cnt, mcall, next_call);
1115 continue;
1116 }
1117
1118 if (n->is_Mach() && n->as_Mach()->has_call()) {
1119 RegMask regs;
1120 regs.Insert(_matcher.c_frame_pointer());
1121 regs.OR(n->out_RegMask());
1122
1123 MachProjNode *proj = new MachProjNode( n, 1, RegMask::Empty, MachProjNode::fat_proj );
1124 map_node_to_block(proj, block);
1125 block->insert_node(proj, phi_cnt++);
1126
1127 add_call_kills(proj, regs, _matcher._c_reg_save_policy, false);
1128 }
1129
1130 // Children are now all ready
1131 for (DUIterator_Fast i5max, i5 = n->fast_outs(i5max); i5 < i5max; i5++) {
1132 Node* m = n->fast_out(i5); // Get user
1133 if (get_block_for_node(m) != block) {
1134 continue;
1135 }
1136 if( m->is_Phi() ) continue;
1137 if (m->_idx >= max_idx) { // new node, skip it
1138 assert(m->is_MachProj() && n->is_Mach() && n->as_Mach()->has_call(), "unexpected node types");
1139 continue;
1140 }
1141 int m_cnt = ready_cnt.at(m->_idx) - 1;
1142 ready_cnt.at_put(m->_idx, m_cnt);
1143 if( m_cnt == 0 )
1144 worklist.push(m);
1145 }
1146 }
1147
1148 if( phi_cnt != block->end_idx() ) {
1149 // did not schedule all. Retry, Bailout, or Die
1150 if (C->subsume_loads() == true && !C->failing()) {
1151 // Retry with subsume_loads == false
1152 // If this is the first failure, the sentinel string will "stick"
1153 // to the Compile object, and the C2Compiler will see it and retry.
1154 C->record_failure(C2Compiler::retry_no_subsuming_loads());
1155 } else {
1156 assert(false, "graph should be schedulable");
1157 }
1158 // assert( phi_cnt == end_idx(), "did not schedule all" );
1159 return false;
1160 }
1161
1162 if (OptoRegScheduling && block_size_threshold_ok) {
1163 _regalloc->compute_exit_block_pressure(block);
1164 block->_reg_pressure = _regalloc->_sched_int_pressure.final_pressure();
1165 block->_freg_pressure = _regalloc->_sched_float_pressure.final_pressure();
1166 }
1167
1168 #ifndef PRODUCT
1169 if (trace_opto_pipelining()) {
1170 tty->print_cr("#");
1171 tty->print_cr("# after schedule_local");
1172 for (uint i = 0;i < block->number_of_nodes();i++) {
1173 tty->print("# ");
1174 block->get_node(i)->fast_dump();
1175 }
1176 tty->print_cr("# ");
1177
1178 if (OptoRegScheduling && block_size_threshold_ok) {
1179 tty->print_cr("# pressure info : %d", block->_pre_order);
1180 _regalloc->print_pressure_info(_regalloc->_sched_int_pressure, "int register info");
1181 _regalloc->print_pressure_info(_regalloc->_sched_float_pressure, "float register info");
1182 }
1183 tty->cr();
1184 }
1185 #endif
1186
1187 return true;
1188 }
1189
1190 //--------------------------catch_cleanup_fix_all_inputs-----------------------
1191 static void catch_cleanup_fix_all_inputs(Node *use, Node *old_def, Node *new_def) {
1192 for (uint l = 0; l < use->len(); l++) {
1193 if (use->in(l) == old_def) {
1194 if (l < use->req()) {
1195 use->set_req(l, new_def);
1196 } else {
1197 use->rm_prec(l);
1198 use->add_prec(new_def);
1199 l--;
1200 }
1201 }
1202 }
1203 }
1204
1205 //------------------------------catch_cleanup_find_cloned_def------------------
1206 Node* PhaseCFG::catch_cleanup_find_cloned_def(Block *use_blk, Node *def, Block *def_blk, int n_clone_idx) {
1207 assert( use_blk != def_blk, "Inter-block cleanup only");
1208
1209 // The use is some block below the Catch. Find and return the clone of the def
1210 // that dominates the use. If there is no clone in a dominating block, then
1211 // create a phi for the def in a dominating block.
1212
1213 // Find which successor block dominates this use. The successor
1214 // blocks must all be single-entry (from the Catch only; I will have
1215 // split blocks to make this so), hence they all dominate.
1216 while( use_blk->_dom_depth > def_blk->_dom_depth+1 )
1217 use_blk = use_blk->_idom;
1218
1219 // Find the successor
1220 Node *fixup = NULL;
1221
1222 uint j;
1223 for( j = 0; j < def_blk->_num_succs; j++ )
1224 if( use_blk == def_blk->_succs[j] )
1225 break;
1226
1227 if( j == def_blk->_num_succs ) {
1228 // Block at same level in dom-tree is not a successor. It needs a
1229 // PhiNode, the PhiNode uses from the def and IT's uses need fixup.
1230 Node_Array inputs = new Node_List(Thread::current()->resource_area());
1231 for(uint k = 1; k < use_blk->num_preds(); k++) {
1232 Block* block = get_block_for_node(use_blk->pred(k));
1233 inputs.map(k, catch_cleanup_find_cloned_def(block, def, def_blk, n_clone_idx));
1234 }
1235
1236 // Check to see if the use_blk already has an identical phi inserted.
1237 // If it exists, it will be at the first position since all uses of a
1238 // def are processed together.
1239 Node *phi = use_blk->get_node(1);
1240 if( phi->is_Phi() ) {
1241 fixup = phi;
1242 for (uint k = 1; k < use_blk->num_preds(); k++) {
1243 if (phi->in(k) != inputs[k]) {
1244 // Not a match
1245 fixup = NULL;
1246 break;
1247 }
1248 }
1249 }
1250
1251 // If an existing PhiNode was not found, make a new one.
1252 if (fixup == NULL) {
1253 Node *new_phi = PhiNode::make(use_blk->head(), def);
1254 use_blk->insert_node(new_phi, 1);
1255 map_node_to_block(new_phi, use_blk);
1256 for (uint k = 1; k < use_blk->num_preds(); k++) {
1257 new_phi->set_req(k, inputs[k]);
1258 }
1259 fixup = new_phi;
1260 }
1261
1262 } else {
1263 // Found the use just below the Catch. Make it use the clone.
1264 fixup = use_blk->get_node(n_clone_idx);
1265 }
1266
1267 return fixup;
1268 }
1269
1270 //--------------------------catch_cleanup_intra_block--------------------------
1271 // Fix all input edges in use that reference "def". The use is in the same
1272 // block as the def and both have been cloned in each successor block.
1273 static void catch_cleanup_intra_block(Node *use, Node *def, Block *blk, int beg, int n_clone_idx) {
1274
1275 // Both the use and def have been cloned. For each successor block,
1276 // get the clone of the use, and make its input the clone of the def
1277 // found in that block.
1278
1279 uint use_idx = blk->find_node(use);
1280 uint offset_idx = use_idx - beg;
1281 for( uint k = 0; k < blk->_num_succs; k++ ) {
1282 // Get clone in each successor block
1283 Block *sb = blk->_succs[k];
1284 Node *clone = sb->get_node(offset_idx+1);
1285 assert( clone->Opcode() == use->Opcode(), "" );
1286
1287 // Make use-clone reference the def-clone
1288 catch_cleanup_fix_all_inputs(clone, def, sb->get_node(n_clone_idx));
1289 }
1290 }
1291
1292 //------------------------------catch_cleanup_inter_block---------------------
1293 // Fix all input edges in use that reference "def". The use is in a different
1294 // block than the def.
1295 void PhaseCFG::catch_cleanup_inter_block(Node *use, Block *use_blk, Node *def, Block *def_blk, int n_clone_idx) {
1296 if( !use_blk ) return; // Can happen if the use is a precedence edge
1297
1298 Node *new_def = catch_cleanup_find_cloned_def(use_blk, def, def_blk, n_clone_idx);
1299 catch_cleanup_fix_all_inputs(use, def, new_def);
1300 }
1301
1302 //------------------------------call_catch_cleanup-----------------------------
1303 // If we inserted any instructions between a Call and his CatchNode,
1304 // clone the instructions on all paths below the Catch.
1305 void PhaseCFG::call_catch_cleanup(Block* block) {
1306
1307 // End of region to clone
1308 uint end = block->end_idx();
1309 if( !block->get_node(end)->is_Catch() ) return;
1310 // Start of region to clone
1311 uint beg = end;
1312 while(!block->get_node(beg-1)->is_MachProj() ||
1313 !block->get_node(beg-1)->in(0)->is_MachCall() ) {
1314 beg--;
1315 assert(beg > 0,"Catch cleanup walking beyond block boundary");
1316 }
1317 // Range of inserted instructions is [beg, end)
1318 if( beg == end ) return;
1319
1320 // Clone along all Catch output paths. Clone area between the 'beg' and
1321 // 'end' indices.
1322 for( uint i = 0; i < block->_num_succs; i++ ) {
1323 Block *sb = block->_succs[i];
1324 // Clone the entire area; ignoring the edge fixup for now.
1325 for( uint j = end; j > beg; j-- ) {
1326 Node *clone = block->get_node(j-1)->clone();
1327 sb->insert_node(clone, 1);
1328 map_node_to_block(clone, sb);
1329 if (clone->needs_anti_dependence_check()) {
1330 insert_anti_dependences(sb, clone);
1331 }
1332 }
1333 }
1334
1335
1336 // Fixup edges. Check the def-use info per cloned Node
1337 for(uint i2 = beg; i2 < end; i2++ ) {
1338 uint n_clone_idx = i2-beg+1; // Index of clone of n in each successor block
1339 Node *n = block->get_node(i2); // Node that got cloned
1340 // Need DU safe iterator because of edge manipulation in calls.
1341 Unique_Node_List *out = new Unique_Node_List(Thread::current()->resource_area());
1342 for (DUIterator_Fast j1max, j1 = n->fast_outs(j1max); j1 < j1max; j1++) {
1343 out->push(n->fast_out(j1));
1344 }
1345 uint max = out->size();
1346 for (uint j = 0; j < max; j++) {// For all users
1347 Node *use = out->pop();
1348 Block *buse = get_block_for_node(use);
1349 if( use->is_Phi() ) {
1350 for( uint k = 1; k < use->req(); k++ )
1351 if( use->in(k) == n ) {
1352 Block* b = get_block_for_node(buse->pred(k));
1353 Node *fixup = catch_cleanup_find_cloned_def(b, n, block, n_clone_idx);
1354 use->set_req(k, fixup);
1355 }
1356 } else {
1357 if (block == buse) {
1358 catch_cleanup_intra_block(use, n, block, beg, n_clone_idx);
1359 } else {
1360 catch_cleanup_inter_block(use, buse, n, block, n_clone_idx);
1361 }
1362 }
1363 } // End for all users
1364
1365 } // End of for all Nodes in cloned area
1366
1367 // Remove the now-dead cloned ops
1368 for(uint i3 = beg; i3 < end; i3++ ) {
1369 block->get_node(beg)->disconnect_inputs(NULL, C);
1370 block->remove_node(beg);
1371 }
1372
1373 // If the successor blocks have a CreateEx node, move it back to the top
1374 for(uint i4 = 0; i4 < block->_num_succs; i4++ ) {
1375 Block *sb = block->_succs[i4];
1376 uint new_cnt = end - beg;
1377 // Remove any newly created, but dead, nodes.
1378 for( uint j = new_cnt; j > 0; j-- ) {
1379 Node *n = sb->get_node(j);
1380 if (n->outcnt() == 0 &&
1381 (!n->is_Proj() || n->as_Proj()->in(0)->outcnt() == 1) ){
1382 n->disconnect_inputs(NULL, C);
1383 sb->remove_node(j);
1384 new_cnt--;
1385 }
1386 }
1387 // If any newly created nodes remain, move the CreateEx node to the top
1388 if (new_cnt > 0) {
1389 Node *cex = sb->get_node(1+new_cnt);
1390 if( cex->is_Mach() && cex->as_Mach()->ideal_Opcode() == Op_CreateEx ) {
1391 sb->remove_node(1+new_cnt);
1392 sb->insert_node(cex, 1);
1393 }
1394 }
1395 }
1396 }