1 /*
   2  * Copyright (c) 2005, 2017, Oracle and/or its affiliates. All rights reserved.
   3  * Copyright (c) 2012, 2017, SAP SE. All rights reserved.
   4  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   5  *
   6  * This code is free software; you can redistribute it and/or modify it
   7  * under the terms of the GNU General Public License version 2 only, as
   8  * published by the Free Software Foundation.
   9  *
  10  * This code is distributed in the hope that it will be useful, but WITHOUT
  11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  13  * version 2 for more details (a copy is included in the LICENSE file that
  14  * accompanied this code).
  15  *
  16  * You should have received a copy of the GNU General Public License version
  17  * 2 along with this work; if not, write to the Free Software Foundation,
  18  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  19  *
  20  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  21  * or visit www.oracle.com if you need additional information or have any
  22  * questions.
  23  *
  24  */
  25 
  26 #include "precompiled.hpp"
  27 #include "c1/c1_Compilation.hpp"
  28 #include "c1/c1_FrameMap.hpp"
  29 #include "c1/c1_Instruction.hpp"
  30 #include "c1/c1_LIRAssembler.hpp"
  31 #include "c1/c1_LIRGenerator.hpp"
  32 #include "c1/c1_Runtime1.hpp"
  33 #include "c1/c1_ValueStack.hpp"
  34 #include "ci/ciArray.hpp"
  35 #include "ci/ciObjArrayKlass.hpp"
  36 #include "ci/ciTypeArrayKlass.hpp"
  37 #include "runtime/sharedRuntime.hpp"
  38 #include "runtime/stubRoutines.hpp"
  39 #include "vmreg_ppc.inline.hpp"
  40 
  41 #ifdef ASSERT
  42 #define __ gen()->lir(__FILE__, __LINE__)->
  43 #else
  44 #define __ gen()->lir()->
  45 #endif
  46 
  47 void LIRItem::load_byte_item() {
  48   // Byte loads use same registers as other loads.
  49   load_item();
  50 }
  51 
  52 
  53 void LIRItem::load_nonconstant() {
  54   LIR_Opr r = value()->operand();
  55   if (_gen->can_inline_as_constant(value())) {
  56     if (!r->is_constant()) {
  57       r = LIR_OprFact::value_type(value()->type());
  58     }
  59     _result = r;
  60   } else {
  61     load_item();
  62   }
  63 }
  64 
  65 
  66 //--------------------------------------------------------------
  67 //               LIRGenerator
  68 //--------------------------------------------------------------
  69 
  70 LIR_Opr LIRGenerator::exceptionOopOpr()              { return FrameMap::R3_oop_opr; }
  71 LIR_Opr LIRGenerator::exceptionPcOpr()               { return FrameMap::R4_opr; }
  72 LIR_Opr LIRGenerator::syncLockOpr()                  { return FrameMap::R5_opr; }     // Need temp effect for MonitorEnterStub.
  73 LIR_Opr LIRGenerator::syncTempOpr()                  { return FrameMap::R4_oop_opr; } // Need temp effect for MonitorEnterStub.
  74 LIR_Opr LIRGenerator::getThreadTemp()                { return LIR_OprFact::illegalOpr; } // not needed
  75 
  76 LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) {
  77   LIR_Opr opr;
  78   switch (type->tag()) {
  79   case intTag:     opr = FrameMap::R3_opr;         break;
  80   case objectTag:  opr = FrameMap::R3_oop_opr;     break;
  81   case longTag:    opr = FrameMap::R3_long_opr;    break;
  82   case floatTag:   opr = FrameMap::F1_opr;         break;
  83   case doubleTag:  opr = FrameMap::F1_double_opr;  break;
  84 
  85   case addressTag:
  86   default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
  87   }
  88 
  89   assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch");
  90   return opr;
  91 }
  92 
  93 LIR_Opr LIRGenerator::rlock_callee_saved(BasicType type) {
  94   ShouldNotReachHere();
  95   return LIR_OprFact::illegalOpr;
  96 }
  97 
  98 
  99 LIR_Opr LIRGenerator::rlock_byte(BasicType type) {
 100   return new_register(T_INT);
 101 }
 102 
 103 
 104 //--------- loading items into registers --------------------------------
 105 
 106 // PPC cannot inline all constants.
 107 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const {
 108   if (v->type()->as_IntConstant() != NULL) {
 109     return Assembler::is_simm16(v->type()->as_IntConstant()->value());
 110   } else if (v->type()->as_LongConstant() != NULL) {
 111     return Assembler::is_simm16(v->type()->as_LongConstant()->value());
 112   } else if (v->type()->as_ObjectConstant() != NULL) {
 113     return v->type()->as_ObjectConstant()->value()->is_null_object();
 114   } else {
 115     return false;
 116   }
 117 }
 118 
 119 
 120 // Only simm16 constants can be inlined.
 121 bool LIRGenerator::can_inline_as_constant(Value i) const {
 122   return can_store_as_constant(i, as_BasicType(i->type()));
 123 }
 124 
 125 
 126 bool LIRGenerator::can_inline_as_constant(LIR_Const* c) const {
 127   if (c->type() == T_INT) {
 128     return Assembler::is_simm16(c->as_jint());
 129   }
 130   if (c->type() == T_LONG) {
 131     return Assembler::is_simm16(c->as_jlong());
 132   }
 133   if (c->type() == T_OBJECT) {
 134     return c->as_jobject() == NULL;
 135   }
 136   return false;
 137 }
 138 
 139 
 140 LIR_Opr LIRGenerator::safepoint_poll_register() {
 141   return new_register(T_INT);
 142 }
 143 
 144 
 145 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index,
 146                                             int shift, int disp, BasicType type) {
 147   assert(base->is_register(), "must be");
 148   intx large_disp = disp;
 149 
 150   // Accumulate fixed displacements.
 151   if (index->is_constant()) {
 152     large_disp += (intx)(index->as_constant_ptr()->as_jint()) << shift;
 153     index = LIR_OprFact::illegalOpr;
 154   }
 155 
 156   if (index->is_register()) {
 157     // Apply the shift and accumulate the displacement.
 158     if (shift > 0) {
 159       LIR_Opr tmp = new_pointer_register();
 160       __ shift_left(index, shift, tmp);
 161       index = tmp;
 162     }
 163     if (large_disp != 0) {
 164       LIR_Opr tmp = new_pointer_register();
 165       if (Assembler::is_simm16(large_disp)) {
 166         __ add(index, LIR_OprFact::intptrConst(large_disp), tmp);
 167         index = tmp;
 168       } else {
 169         __ move(LIR_OprFact::intptrConst(large_disp), tmp);
 170         __ add(tmp, index, tmp);
 171         index = tmp;
 172       }
 173       large_disp = 0;
 174     }
 175   } else if (!Assembler::is_simm16(large_disp)) {
 176     // Index is illegal so replace it with the displacement loaded into a register.
 177     index = new_pointer_register();
 178     __ move(LIR_OprFact::intptrConst(large_disp), index);
 179     large_disp = 0;
 180   }
 181 
 182   // At this point we either have base + index or base + displacement.
 183   if (large_disp == 0) {
 184     return new LIR_Address(base, index, type);
 185   } else {
 186     assert(Assembler::is_simm16(large_disp), "must be");
 187     return new LIR_Address(base, large_disp, type);
 188   }
 189 }
 190 
 191 
 192 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr,
 193                                               BasicType type, bool needs_card_mark) {
 194   int elem_size = type2aelembytes(type);
 195   int shift = exact_log2(elem_size);
 196 
 197   LIR_Opr base_opr;
 198   intx offset = arrayOopDesc::base_offset_in_bytes(type);
 199 
 200   if (index_opr->is_constant()) {
 201     intx i = index_opr->as_constant_ptr()->as_jint();
 202     intx array_offset = i * elem_size;
 203     if (Assembler::is_simm16(array_offset + offset)) {
 204       base_opr = array_opr;
 205       offset = array_offset + offset;
 206     } else {
 207       base_opr = new_pointer_register();
 208       if (Assembler::is_simm16(array_offset)) {
 209         __ add(array_opr, LIR_OprFact::intptrConst(array_offset), base_opr);
 210       } else {
 211         __ move(LIR_OprFact::intptrConst(array_offset), base_opr);
 212         __ add(base_opr, array_opr, base_opr);
 213       }
 214     }
 215   } else {
 216 #ifdef _LP64
 217     if (index_opr->type() == T_INT) {
 218       LIR_Opr tmp = new_register(T_LONG);
 219       __ convert(Bytecodes::_i2l, index_opr, tmp);
 220       index_opr = tmp;
 221     }
 222 #endif
 223 
 224     base_opr = new_pointer_register();
 225     assert (index_opr->is_register(), "Must be register");
 226     if (shift > 0) {
 227       __ shift_left(index_opr, shift, base_opr);
 228       __ add(base_opr, array_opr, base_opr);
 229     } else {
 230       __ add(index_opr, array_opr, base_opr);
 231     }
 232   }
 233   if (needs_card_mark) {
 234     LIR_Opr ptr = new_pointer_register();
 235     __ add(base_opr, LIR_OprFact::intptrConst(offset), ptr);
 236     return new LIR_Address(ptr, type);
 237   } else {
 238     return new LIR_Address(base_opr, offset, type);
 239   }
 240 }
 241 
 242 
 243 LIR_Opr LIRGenerator::load_immediate(int x, BasicType type) {
 244   LIR_Opr r = NULL;
 245   if (type == T_LONG) {
 246     r = LIR_OprFact::longConst(x);
 247   } else if (type == T_INT) {
 248     r = LIR_OprFact::intConst(x);
 249   } else {
 250     ShouldNotReachHere();
 251   }
 252   if (!Assembler::is_simm16(x)) {
 253     LIR_Opr tmp = new_register(type);
 254     __ move(r, tmp);
 255     return tmp;
 256   }
 257   return r;
 258 }
 259 
 260 
 261 void LIRGenerator::increment_counter(address counter, BasicType type, int step) {
 262   LIR_Opr pointer = new_pointer_register();
 263   __ move(LIR_OprFact::intptrConst(counter), pointer);
 264   LIR_Address* addr = new LIR_Address(pointer, type);
 265   increment_counter(addr, step);
 266 }
 267 
 268 
 269 void LIRGenerator::increment_counter(LIR_Address* addr, int step) {
 270   LIR_Opr temp = new_register(addr->type());
 271   __ move(addr, temp);
 272   __ add(temp, load_immediate(step, addr->type()), temp);
 273   __ move(temp, addr);
 274 }
 275 
 276 
 277 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
 278   LIR_Opr tmp = FrameMap::R0_opr;
 279   __ load(new LIR_Address(base, disp, T_INT), tmp, info);
 280   __ cmp(condition, tmp, c);
 281 }
 282 
 283 
 284 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base,
 285                                int disp, BasicType type, CodeEmitInfo* info) {
 286   LIR_Opr tmp = FrameMap::R0_opr;
 287   __ load(new LIR_Address(base, disp, type), tmp, info);
 288   __ cmp(condition, reg, tmp);
 289 }
 290 
 291 
 292 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base,
 293                                LIR_Opr disp, BasicType type, CodeEmitInfo* info) {
 294   LIR_Opr tmp = FrameMap::R0_opr;
 295   __ load(new LIR_Address(base, disp, type), tmp, info);
 296   __ cmp(condition, reg, tmp);
 297 }
 298 
 299 
 300 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, int c, LIR_Opr result, LIR_Opr tmp) {
 301   assert(left != result, "should be different registers");
 302   if (is_power_of_2(c + 1)) {
 303     __ shift_left(left, log2_intptr(c + 1), result);
 304     __ sub(result, left, result);
 305     return true;
 306   } else if (is_power_of_2(c - 1)) {
 307     __ shift_left(left, log2_intptr(c - 1), result);
 308     __ add(result, left, result);
 309     return true;
 310   }
 311   return false;
 312 }
 313 
 314 
 315 void LIRGenerator::store_stack_parameter(LIR_Opr item, ByteSize offset_from_sp) {
 316   BasicType t = item->type();
 317   LIR_Opr sp_opr = FrameMap::SP_opr;
 318   if ((t == T_LONG || t == T_DOUBLE) &&
 319       ((in_bytes(offset_from_sp) - STACK_BIAS) % 8 != 0)) {
 320     __ unaligned_move(item, new LIR_Address(sp_opr, in_bytes(offset_from_sp), t));
 321   } else {
 322     __ move(item, new LIR_Address(sp_opr, in_bytes(offset_from_sp), t));
 323   }
 324 }
 325 
 326 
 327 //----------------------------------------------------------------------
 328 //             visitor functions
 329 //----------------------------------------------------------------------
 330 
 331 void LIRGenerator::do_StoreIndexed(StoreIndexed* x) {
 332   assert(x->is_pinned(),"");
 333   bool needs_range_check = x->compute_needs_range_check();
 334   bool use_length = x->length() != NULL;
 335   bool obj_store = x->elt_type() == T_ARRAY || x->elt_type() == T_OBJECT;
 336   bool needs_store_check = obj_store && (x->value()->as_Constant() == NULL ||
 337                                          !get_jobject_constant(x->value())->is_null_object() ||
 338                                          x->should_profile());
 339 
 340   LIRItem array(x->array(), this);
 341   LIRItem index(x->index(), this);
 342   LIRItem value(x->value(), this);
 343   LIRItem length(this);
 344 
 345   array.load_item();
 346   index.load_nonconstant();
 347 
 348   if (use_length && needs_range_check) {
 349     length.set_instruction(x->length());
 350     length.load_item();
 351   }
 352   if (needs_store_check || x->check_boolean()) {
 353     value.load_item();
 354   } else {
 355     value.load_for_store(x->elt_type());
 356   }
 357 
 358   set_no_result(x);
 359 
 360   // The CodeEmitInfo must be duplicated for each different
 361   // LIR-instruction because spilling can occur anywhere between two
 362   // instructions and so the debug information must be different.
 363   CodeEmitInfo* range_check_info = state_for(x);
 364   CodeEmitInfo* null_check_info = NULL;
 365   if (x->needs_null_check()) {
 366     null_check_info = new CodeEmitInfo(range_check_info);
 367   }
 368 
 369   // Emit array address setup early so it schedules better.
 370   LIR_Address* array_addr = emit_array_address(array.result(), index.result(), x->elt_type(), obj_store);
 371 
 372   if (GenerateRangeChecks && needs_range_check) {
 373     if (use_length) {
 374       __ cmp(lir_cond_belowEqual, length.result(), index.result());
 375       __ branch(lir_cond_belowEqual, T_INT, new RangeCheckStub(range_check_info, index.result()));
 376     } else {
 377       array_range_check(array.result(), index.result(), null_check_info, range_check_info);
 378       // Range_check also does the null check.
 379       null_check_info = NULL;
 380     }
 381   }
 382 
 383   if (GenerateArrayStoreCheck && needs_store_check) {
 384     // Following registers are used by slow_subtype_check:
 385     LIR_Opr tmp1 = FrameMap::R4_opr; // super_klass
 386     LIR_Opr tmp2 = FrameMap::R5_opr; // sub_klass
 387     LIR_Opr tmp3 = FrameMap::R6_opr; // temp
 388 
 389     CodeEmitInfo* store_check_info = new CodeEmitInfo(range_check_info);
 390     __ store_check(value.result(), array.result(), tmp1, tmp2, tmp3,
 391                    store_check_info, x->profiled_method(), x->profiled_bci());
 392   }
 393 
 394   if (obj_store) {
 395     // Needs GC write barriers.
 396     pre_barrier(LIR_OprFact::address(array_addr), LIR_OprFact::illegalOpr /* pre_val */,
 397                 true /* do_load */, false /* patch */, NULL);
 398   }
 399   LIR_Opr result = maybe_mask_boolean(x, array.result(), value.result(), null_check_info);
 400   __ move(result, array_addr, null_check_info);
 401   if (obj_store) {
 402     // Precise card mark.
 403     post_barrier(LIR_OprFact::address(array_addr), value.result());
 404   }
 405 }
 406 
 407 
 408 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) {
 409   assert(x->is_pinned(),"");
 410   LIRItem obj(x->obj(), this);
 411   obj.load_item();
 412 
 413   set_no_result(x);
 414 
 415   // We use R4+R5 in order to get a temp effect. These regs are used in slow path (MonitorEnterStub).
 416   LIR_Opr lock    = FrameMap::R5_opr;
 417   LIR_Opr scratch = FrameMap::R4_opr;
 418   LIR_Opr hdr     = FrameMap::R6_opr;
 419 
 420   CodeEmitInfo* info_for_exception = NULL;
 421   if (x->needs_null_check()) {
 422     info_for_exception = state_for(x);
 423   }
 424 
 425   // This CodeEmitInfo must not have the xhandlers because here the
 426   // object is already locked (xhandlers expects object to be unlocked).
 427   CodeEmitInfo* info = state_for(x, x->state(), true);
 428   monitor_enter(obj.result(), lock, hdr, scratch, x->monitor_no(), info_for_exception, info);
 429 }
 430 
 431 
 432 void LIRGenerator::do_MonitorExit(MonitorExit* x) {
 433   assert(x->is_pinned(),"");
 434   LIRItem obj(x->obj(), this);
 435   obj.dont_load_item();
 436 
 437   set_no_result(x);
 438   LIR_Opr lock     = FrameMap::R5_opr;
 439   LIR_Opr hdr      = FrameMap::R4_opr; // Used for slow path (MonitorExitStub).
 440   LIR_Opr obj_temp = FrameMap::R6_opr;
 441   monitor_exit(obj_temp, lock, hdr, LIR_OprFact::illegalOpr, x->monitor_no());
 442 }
 443 
 444 
 445 // _ineg, _lneg, _fneg, _dneg
 446 void LIRGenerator::do_NegateOp(NegateOp* x) {
 447   LIRItem value(x->x(), this);
 448   value.load_item();
 449   LIR_Opr reg = rlock_result(x);
 450   __ negate(value.result(), reg);
 451 }
 452 
 453 
 454 // for  _fadd, _fmul, _fsub, _fdiv, _frem
 455 //      _dadd, _dmul, _dsub, _ddiv, _drem
 456 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) {
 457   switch (x->op()) {
 458   case Bytecodes::_fadd:
 459   case Bytecodes::_fmul:
 460   case Bytecodes::_fsub:
 461   case Bytecodes::_fdiv:
 462   case Bytecodes::_dadd:
 463   case Bytecodes::_dmul:
 464   case Bytecodes::_dsub:
 465   case Bytecodes::_ddiv: {
 466     LIRItem left(x->x(), this);
 467     LIRItem right(x->y(), this);
 468     left.load_item();
 469     right.load_item();
 470     rlock_result(x);
 471     arithmetic_op_fpu(x->op(), x->operand(), left.result(), right.result(), x->is_strictfp());
 472   }
 473   break;
 474 
 475   case Bytecodes::_frem:
 476   case Bytecodes::_drem: {
 477     address entry = NULL;
 478     switch (x->op()) {
 479     case Bytecodes::_frem:
 480       entry = CAST_FROM_FN_PTR(address, SharedRuntime::frem);
 481       break;
 482     case Bytecodes::_drem:
 483       entry = CAST_FROM_FN_PTR(address, SharedRuntime::drem);
 484       break;
 485     default:
 486       ShouldNotReachHere();
 487     }
 488     LIR_Opr result = call_runtime(x->x(), x->y(), entry, x->type(), NULL);
 489     set_result(x, result);
 490   }
 491   break;
 492 
 493   default: ShouldNotReachHere();
 494   }
 495 }
 496 
 497 
 498 // for  _ladd, _lmul, _lsub, _ldiv, _lrem
 499 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) {
 500   bool is_div_rem = x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem;
 501 
 502   LIRItem right(x->y(), this);
 503   // Missing test if instr is commutative and if we should swap.
 504   if (right.value()->type()->as_LongConstant() &&
 505       (x->op() == Bytecodes::_lsub && right.value()->type()->as_LongConstant()->value() == ((-1)<<15)) ) {
 506     // Sub is implemented by addi and can't support min_simm16 as constant..
 507     right.load_item();
 508   } else {
 509     right.load_nonconstant();
 510   }
 511   assert(right.is_constant() || right.is_register(), "wrong state of right");
 512 
 513   if (is_div_rem) {
 514     LIR_Opr divisor = right.result();
 515     if (divisor->is_register()) {
 516       CodeEmitInfo* null_check_info = state_for(x);
 517       __ cmp(lir_cond_equal, divisor, LIR_OprFact::longConst(0));
 518       __ branch(lir_cond_equal, T_LONG, new DivByZeroStub(null_check_info));
 519     } else {
 520       jlong const_divisor = divisor->as_constant_ptr()->as_jlong();
 521       if (const_divisor == 0) {
 522         CodeEmitInfo* null_check_info = state_for(x);
 523         __ jump(new DivByZeroStub(null_check_info));
 524         rlock_result(x);
 525         __ move(LIR_OprFact::longConst(0), x->operand()); // dummy
 526         return;
 527       }
 528       if (x->op() == Bytecodes::_lrem && !is_power_of_2(const_divisor) && const_divisor != -1) {
 529         // Remainder computation would need additional tmp != R0.
 530         right.load_item();
 531       }
 532     }
 533   }
 534 
 535   LIRItem left(x->x(), this);
 536   left.load_item();
 537   rlock_result(x);
 538   if (is_div_rem) {
 539     CodeEmitInfo* info = NULL; // Null check already done above.
 540     LIR_Opr tmp = FrameMap::R0_opr;
 541     if (x->op() == Bytecodes::_lrem) {
 542       __ irem(left.result(), right.result(), x->operand(), tmp, info);
 543     } else if (x->op() == Bytecodes::_ldiv) {
 544       __ idiv(left.result(), right.result(), x->operand(), tmp, info);
 545     }
 546   } else {
 547     arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), NULL);
 548   }
 549 }
 550 
 551 
 552 // for: _iadd, _imul, _isub, _idiv, _irem
 553 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) {
 554   bool is_div_rem = x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem;
 555 
 556   LIRItem right(x->y(), this);
 557   // Missing test if instr is commutative and if we should swap.
 558   if (right.value()->type()->as_IntConstant() &&
 559       (x->op() == Bytecodes::_isub && right.value()->type()->as_IntConstant()->value() == ((-1)<<15)) ) {
 560     // Sub is implemented by addi and can't support min_simm16 as constant.
 561     right.load_item();
 562   } else {
 563     right.load_nonconstant();
 564   }
 565   assert(right.is_constant() || right.is_register(), "wrong state of right");
 566 
 567   if (is_div_rem) {
 568     LIR_Opr divisor = right.result();
 569     if (divisor->is_register()) {
 570       CodeEmitInfo* null_check_info = state_for(x);
 571       __ cmp(lir_cond_equal, divisor, LIR_OprFact::intConst(0));
 572       __ branch(lir_cond_equal, T_INT, new DivByZeroStub(null_check_info));
 573     } else {
 574       jint const_divisor = divisor->as_constant_ptr()->as_jint();
 575       if (const_divisor == 0) {
 576         CodeEmitInfo* null_check_info = state_for(x);
 577         __ jump(new DivByZeroStub(null_check_info));
 578         rlock_result(x);
 579         __ move(LIR_OprFact::intConst(0), x->operand()); // dummy
 580         return;
 581       }
 582       if (x->op() == Bytecodes::_irem && !is_power_of_2(const_divisor) && const_divisor != -1) {
 583         // Remainder computation would need additional tmp != R0.
 584         right.load_item();
 585       }
 586     }
 587   }
 588 
 589   LIRItem left(x->x(), this);
 590   left.load_item();
 591   rlock_result(x);
 592   if (is_div_rem) {
 593     CodeEmitInfo* info = NULL; // Null check already done above.
 594     LIR_Opr tmp = FrameMap::R0_opr;
 595     if (x->op() == Bytecodes::_irem) {
 596       __ irem(left.result(), right.result(), x->operand(), tmp, info);
 597     } else if (x->op() == Bytecodes::_idiv) {
 598       __ idiv(left.result(), right.result(), x->operand(), tmp, info);
 599     }
 600   } else {
 601     arithmetic_op_int(x->op(), x->operand(), left.result(), right.result(), FrameMap::R0_opr);
 602   }
 603 }
 604 
 605 
 606 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) {
 607   ValueTag tag = x->type()->tag();
 608   assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters");
 609   switch (tag) {
 610     case floatTag:
 611     case doubleTag: do_ArithmeticOp_FPU(x);  return;
 612     case longTag:   do_ArithmeticOp_Long(x); return;
 613     case intTag:    do_ArithmeticOp_Int(x);  return;
 614   }
 615   ShouldNotReachHere();
 616 }
 617 
 618 
 619 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr
 620 void LIRGenerator::do_ShiftOp(ShiftOp* x) {
 621   LIRItem value(x->x(), this);
 622   LIRItem count(x->y(), this);
 623   value.load_item();
 624   LIR_Opr reg = rlock_result(x);
 625   LIR_Opr mcount;
 626   if (count.result()->is_register()) {
 627     mcount = FrameMap::R0_opr;
 628   } else {
 629     mcount = LIR_OprFact::illegalOpr;
 630   }
 631   shift_op(x->op(), reg, value.result(), count.result(), mcount);
 632 }
 633 
 634 
 635 inline bool can_handle_logic_op_as_uimm(ValueType *type, Bytecodes::Code bc) {
 636   jlong int_or_long_const;
 637   if (type->as_IntConstant()) {
 638     int_or_long_const = type->as_IntConstant()->value();
 639   } else if (type->as_LongConstant()) {
 640     int_or_long_const = type->as_LongConstant()->value();
 641   } else if (type->as_ObjectConstant()) {
 642     return type->as_ObjectConstant()->value()->is_null_object();
 643   } else {
 644     return false;
 645   }
 646 
 647   if (Assembler::is_uimm(int_or_long_const, 16)) return true;
 648   if ((int_or_long_const & 0xFFFF) == 0 &&
 649       Assembler::is_uimm((jlong)((julong)int_or_long_const >> 16), 16)) return true;
 650 
 651   // see Assembler::andi
 652   if (bc == Bytecodes::_iand &&
 653       (is_power_of_2_long(int_or_long_const+1) ||
 654        is_power_of_2_long(int_or_long_const) ||
 655        is_power_of_2_long(-int_or_long_const))) return true;
 656   if (bc == Bytecodes::_land &&
 657       (is_power_of_2_long(int_or_long_const+1) ||
 658        (Assembler::is_uimm(int_or_long_const, 32) && is_power_of_2_long(int_or_long_const)) ||
 659        (int_or_long_const != min_jlong && is_power_of_2_long(-int_or_long_const)))) return true;
 660 
 661   // special case: xor -1
 662   if ((bc == Bytecodes::_ixor || bc == Bytecodes::_lxor) &&
 663       int_or_long_const == -1) return true;
 664   return false;
 665 }
 666 
 667 
 668 // _iand, _land, _ior, _lor, _ixor, _lxor
 669 void LIRGenerator::do_LogicOp(LogicOp* x) {
 670   LIRItem left(x->x(), this);
 671   LIRItem right(x->y(), this);
 672 
 673   left.load_item();
 674 
 675   Value rval = right.value();
 676   LIR_Opr r = rval->operand();
 677   ValueType *type = rval->type();
 678   // Logic instructions use unsigned immediate values.
 679   if (can_handle_logic_op_as_uimm(type, x->op())) {
 680     if (!r->is_constant()) {
 681       r = LIR_OprFact::value_type(type);
 682       rval->set_operand(r);
 683     }
 684     right.set_result(r);
 685   } else {
 686     right.load_item();
 687   }
 688 
 689   LIR_Opr reg = rlock_result(x);
 690 
 691   logic_op(x->op(), reg, left.result(), right.result());
 692 }
 693 
 694 
 695 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg
 696 void LIRGenerator::do_CompareOp(CompareOp* x) {
 697   LIRItem left(x->x(), this);
 698   LIRItem right(x->y(), this);
 699   left.load_item();
 700   right.load_item();
 701   LIR_Opr reg = rlock_result(x);
 702   if (x->x()->type()->is_float_kind()) {
 703     Bytecodes::Code code = x->op();
 704     __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl));
 705   } else if (x->x()->type()->tag() == longTag) {
 706     __ lcmp2int(left.result(), right.result(), reg);
 707   } else {
 708     Unimplemented();
 709   }
 710 }
 711 
 712 
 713 void LIRGenerator::do_CompareAndSwap(Intrinsic* x, ValueType* type) {
 714   assert(x->number_of_arguments() == 4, "wrong type");
 715   LIRItem obj   (x->argument_at(0), this);  // object
 716   LIRItem offset(x->argument_at(1), this);  // offset of field
 717   LIRItem cmp   (x->argument_at(2), this);  // Value to compare with field.
 718   LIRItem val   (x->argument_at(3), this);  // Replace field with val if matches cmp.
 719 
 720   LIR_Opr t1 = LIR_OprFact::illegalOpr;
 721   LIR_Opr t2 = LIR_OprFact::illegalOpr;
 722   LIR_Opr addr = new_pointer_register();
 723 
 724   // Get address of field.
 725   obj.load_item();
 726   offset.load_item();
 727   cmp.load_item();
 728   val.load_item();
 729 
 730   __ add(obj.result(), offset.result(), addr);
 731 
 732   // Volatile load may be followed by Unsafe CAS.
 733   if (support_IRIW_for_not_multiple_copy_atomic_cpu) {
 734     __ membar(); // To be safe. Unsafe semantics are unclear.
 735   } else {
 736     __ membar_release();
 737   }
 738 
 739   if (type == objectType) {  // Write-barrier needed for Object fields.
 740     // Only cmp value can get overwritten, no do_load required.
 741     pre_barrier(LIR_OprFact::illegalOpr /* addr */, cmp.result() /* pre_val */,
 742                 false /* do_load */, false /* patch */, NULL);
 743   }
 744 
 745   if (type == objectType) {
 746     if (UseCompressedOops) {
 747       t1 = new_register(T_OBJECT);
 748       t2 = new_register(T_OBJECT);
 749     }
 750     __ cas_obj(addr, cmp.result(), val.result(), t1, t2);
 751   } else if (type == intType) {
 752     __ cas_int(addr, cmp.result(), val.result(), t1, t2);
 753   } else if (type == longType) {
 754     __ cas_long(addr, cmp.result(), val.result(), t1, t2);
 755   } else {
 756     ShouldNotReachHere();
 757   }
 758   // Benerate conditional move of boolean result.
 759   LIR_Opr result = rlock_result(x);
 760   __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0),
 761            result, as_BasicType(type));
 762   if (type == objectType) {  // Write-barrier needed for Object fields.
 763     // Precise card mark since could either be object or array.
 764     post_barrier(addr, val.result());
 765   }
 766 }
 767 
 768 
 769 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) {
 770   switch (x->id()) {
 771     case vmIntrinsics::_dabs: {
 772       assert(x->number_of_arguments() == 1, "wrong type");
 773       LIRItem value(x->argument_at(0), this);
 774       value.load_item();
 775       LIR_Opr dst = rlock_result(x);
 776       __ abs(value.result(), dst, LIR_OprFact::illegalOpr);
 777       break;
 778     }
 779     case vmIntrinsics::_dsqrt: {
 780       if (VM_Version::has_fsqrt()) {
 781         assert(x->number_of_arguments() == 1, "wrong type");
 782         LIRItem value(x->argument_at(0), this);
 783         value.load_item();
 784         LIR_Opr dst = rlock_result(x);
 785         __ sqrt(value.result(), dst, LIR_OprFact::illegalOpr);
 786         break;
 787       } // else fallthru
 788     }
 789     case vmIntrinsics::_dlog10: // fall through
 790     case vmIntrinsics::_dlog: // fall through
 791     case vmIntrinsics::_dsin: // fall through
 792     case vmIntrinsics::_dtan: // fall through
 793     case vmIntrinsics::_dcos: // fall through
 794     case vmIntrinsics::_dexp: {
 795       assert(x->number_of_arguments() == 1, "wrong type");
 796 
 797       address runtime_entry = NULL;
 798       switch (x->id()) {
 799       case vmIntrinsics::_dsqrt:
 800         runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dsqrt);
 801         break;
 802       case vmIntrinsics::_dsin:
 803         runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dsin);
 804         break;
 805       case vmIntrinsics::_dcos:
 806         runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dcos);
 807         break;
 808       case vmIntrinsics::_dtan:
 809         runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dtan);
 810         break;
 811       case vmIntrinsics::_dlog:
 812         runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dlog);
 813         break;
 814       case vmIntrinsics::_dlog10:
 815         runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dlog10);
 816         break;
 817       case vmIntrinsics::_dexp:
 818         runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dexp);
 819         break;
 820       default:
 821         ShouldNotReachHere();
 822       }
 823 
 824       LIR_Opr result = call_runtime(x->argument_at(0), runtime_entry, x->type(), NULL);
 825       set_result(x, result);
 826       break;
 827     }
 828     case vmIntrinsics::_dpow: {
 829       assert(x->number_of_arguments() == 2, "wrong type");
 830       address runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dpow);
 831       LIR_Opr result = call_runtime(x->argument_at(0), x->argument_at(1), runtime_entry, x->type(), NULL);
 832       set_result(x, result);
 833       break;
 834     }
 835   }
 836 }
 837 
 838 
 839 void LIRGenerator::do_ArrayCopy(Intrinsic* x) {
 840   assert(x->number_of_arguments() == 5, "wrong type");
 841 
 842   // Make all state_for calls early since they can emit code.
 843   CodeEmitInfo* info = state_for(x, x->state());
 844 
 845   LIRItem src     (x->argument_at(0), this);
 846   LIRItem src_pos (x->argument_at(1), this);
 847   LIRItem dst     (x->argument_at(2), this);
 848   LIRItem dst_pos (x->argument_at(3), this);
 849   LIRItem length  (x->argument_at(4), this);
 850 
 851   // Load all values in callee_save_registers (C calling convention),
 852   // as this makes the parameter passing to the fast case simpler.
 853   src.load_item_force     (FrameMap::R14_oop_opr);
 854   src_pos.load_item_force (FrameMap::R15_opr);
 855   dst.load_item_force     (FrameMap::R17_oop_opr);
 856   dst_pos.load_item_force (FrameMap::R18_opr);
 857   length.load_item_force  (FrameMap::R19_opr);
 858   LIR_Opr tmp =            FrameMap::R20_opr;
 859 
 860   int flags;
 861   ciArrayKlass* expected_type;
 862   arraycopy_helper(x, &flags, &expected_type);
 863 
 864   __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(),
 865                length.result(), tmp,
 866                expected_type, flags, info);
 867   set_no_result(x);
 868 }
 869 
 870 
 871 // _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f
 872 // _i2b, _i2c, _i2s
 873 void LIRGenerator::do_Convert(Convert* x) {
 874   switch (x->op()) {
 875 
 876     // int -> float: force spill
 877     case Bytecodes::_l2f: {
 878       if (!VM_Version::has_fcfids()) { // fcfids is >= Power7 only
 879         // fcfid+frsp needs fixup code to avoid rounding incompatibility.
 880         address entry = CAST_FROM_FN_PTR(address, SharedRuntime::l2f);
 881         LIR_Opr result = call_runtime(x->value(), entry, x->type(), NULL);
 882         set_result(x, result);
 883         break;
 884       } // else fallthru
 885     }
 886     case Bytecodes::_l2d: {
 887       LIRItem value(x->value(), this);
 888       LIR_Opr reg = rlock_result(x);
 889       value.load_item();
 890       LIR_Opr tmp = force_to_spill(value.result(), T_DOUBLE);
 891       __ convert(x->op(), tmp, reg);
 892       break;
 893     }
 894     case Bytecodes::_i2f:
 895     case Bytecodes::_i2d: {
 896       LIRItem value(x->value(), this);
 897       LIR_Opr reg = rlock_result(x);
 898       value.load_item();
 899       // Convert i2l first.
 900       LIR_Opr tmp1 = new_register(T_LONG);
 901       __ convert(Bytecodes::_i2l, value.result(), tmp1);
 902       LIR_Opr tmp2 = force_to_spill(tmp1, T_DOUBLE);
 903       __ convert(x->op(), tmp2, reg);
 904       break;
 905     }
 906 
 907     // float -> int: result will be stored
 908     case Bytecodes::_f2l:
 909     case Bytecodes::_d2l: {
 910       LIRItem value(x->value(), this);
 911       LIR_Opr reg = rlock_result(x);
 912       value.set_destroys_register(); // USE_KILL
 913       value.load_item();
 914       set_vreg_flag(reg, must_start_in_memory);
 915       __ convert(x->op(), value.result(), reg);
 916       break;
 917     }
 918     case Bytecodes::_f2i:
 919     case Bytecodes::_d2i: {
 920       LIRItem value(x->value(), this);
 921       LIR_Opr reg = rlock_result(x);
 922       value.set_destroys_register(); // USE_KILL
 923       value.load_item();
 924       // Convert l2i afterwards.
 925       LIR_Opr tmp1 = new_register(T_LONG);
 926       set_vreg_flag(tmp1, must_start_in_memory);
 927       __ convert(x->op(), value.result(), tmp1);
 928       __ convert(Bytecodes::_l2i, tmp1, reg);
 929       break;
 930     }
 931 
 932     // Within same category: just register conversions.
 933     case Bytecodes::_i2b:
 934     case Bytecodes::_i2c:
 935     case Bytecodes::_i2s:
 936     case Bytecodes::_i2l:
 937     case Bytecodes::_l2i:
 938     case Bytecodes::_f2d:
 939     case Bytecodes::_d2f: {
 940       LIRItem value(x->value(), this);
 941       LIR_Opr reg = rlock_result(x);
 942       value.load_item();
 943       __ convert(x->op(), value.result(), reg);
 944       break;
 945     }
 946 
 947     default: ShouldNotReachHere();
 948   }
 949 }
 950 
 951 
 952 void LIRGenerator::do_NewInstance(NewInstance* x) {
 953   // This instruction can be deoptimized in the slow path.
 954   const LIR_Opr reg = result_register_for(x->type());
 955 #ifndef PRODUCT
 956   if (PrintNotLoaded && !x->klass()->is_loaded()) {
 957     tty->print_cr("   ###class not loaded at new bci %d", x->printable_bci());
 958   }
 959 #endif
 960   CodeEmitInfo* info = state_for(x, x->state());
 961   LIR_Opr klass_reg = FrameMap::R4_metadata_opr; // Used by slow path (NewInstanceStub).
 962   LIR_Opr tmp1 = FrameMap::R5_oop_opr;
 963   LIR_Opr tmp2 = FrameMap::R6_oop_opr;
 964   LIR_Opr tmp3 = FrameMap::R7_oop_opr;
 965   LIR_Opr tmp4 = FrameMap::R8_oop_opr;
 966   new_instance(reg, x->klass(), x->is_unresolved(), tmp1, tmp2, tmp3, tmp4, klass_reg, info);
 967 
 968   // Must prevent reordering of stores for object initialization
 969   // with stores that publish the new object.
 970   __ membar_storestore();
 971   LIR_Opr result = rlock_result(x);
 972   __ move(reg, result);
 973 }
 974 
 975 
 976 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) {
 977   // Evaluate state_for early since it may emit code.
 978   CodeEmitInfo* info = state_for(x, x->state());
 979 
 980   LIRItem length(x->length(), this);
 981   length.load_item();
 982 
 983   LIR_Opr reg = result_register_for(x->type());
 984   LIR_Opr klass_reg = FrameMap::R4_metadata_opr; // Used by slow path (NewTypeArrayStub).
 985   // We use R5 in order to get a temp effect. This reg is used in slow path (NewTypeArrayStub).
 986   LIR_Opr tmp1 = FrameMap::R5_oop_opr;
 987   LIR_Opr tmp2 = FrameMap::R6_oop_opr;
 988   LIR_Opr tmp3 = FrameMap::R7_oop_opr;
 989   LIR_Opr tmp4 = FrameMap::R8_oop_opr;
 990   LIR_Opr len = length.result();
 991   BasicType elem_type = x->elt_type();
 992 
 993   __ metadata2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg);
 994 
 995   CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info);
 996   __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path);
 997 
 998   // Must prevent reordering of stores for object initialization
 999   // with stores that publish the new object.
1000   __ membar_storestore();
1001   LIR_Opr result = rlock_result(x);
1002   __ move(reg, result);
1003 }
1004 
1005 
1006 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) {
1007   // Evaluate state_for early since it may emit code.
1008   CodeEmitInfo* info = state_for(x, x->state());
1009   // In case of patching (i.e., object class is not yet loaded),
1010   // we need to reexecute the instruction and therefore provide
1011   // the state before the parameters have been consumed.
1012   CodeEmitInfo* patching_info = NULL;
1013   if (!x->klass()->is_loaded() || PatchALot) {
1014     patching_info = state_for(x, x->state_before());
1015   }
1016 
1017   LIRItem length(x->length(), this);
1018   length.load_item();
1019 
1020   const LIR_Opr reg = result_register_for(x->type());
1021   LIR_Opr klass_reg = FrameMap::R4_metadata_opr; // Used by slow path (NewObjectArrayStub).
1022   // We use R5 in order to get a temp effect. This reg is used in slow path (NewObjectArrayStub).
1023   LIR_Opr tmp1 = FrameMap::R5_oop_opr;
1024   LIR_Opr tmp2 = FrameMap::R6_oop_opr;
1025   LIR_Opr tmp3 = FrameMap::R7_oop_opr;
1026   LIR_Opr tmp4 = FrameMap::R8_oop_opr;
1027   LIR_Opr len = length.result();
1028 
1029   CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info);
1030   ciMetadata* obj = ciObjArrayKlass::make(x->klass());
1031   if (obj == ciEnv::unloaded_ciobjarrayklass()) {
1032     BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error");
1033   }
1034   klass2reg_with_patching(klass_reg, obj, patching_info);
1035   __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path);
1036 
1037   // Must prevent reordering of stores for object initialization
1038   // with stores that publish the new object.
1039   __ membar_storestore();
1040   LIR_Opr result = rlock_result(x);
1041   __ move(reg, result);
1042 }
1043 
1044 
1045 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) {
1046   Values* dims = x->dims();
1047   int i = dims->length();
1048   LIRItemList* items = new LIRItemList(i, i, NULL);
1049   while (i-- > 0) {
1050     LIRItem* size = new LIRItem(dims->at(i), this);
1051     items->at_put(i, size);
1052   }
1053 
1054   // Evaluate state_for early since it may emit code.
1055   CodeEmitInfo* patching_info = NULL;
1056   if (!x->klass()->is_loaded() || PatchALot) {
1057     patching_info = state_for(x, x->state_before());
1058 
1059     // Cannot re-use same xhandlers for multiple CodeEmitInfos, so
1060     // clone all handlers (NOTE: Usually this is handled transparently
1061     // by the CodeEmitInfo cloning logic in CodeStub constructors but
1062     // is done explicitly here because a stub isn't being used).
1063     x->set_exception_handlers(new XHandlers(x->exception_handlers()));
1064   }
1065   CodeEmitInfo* info = state_for(x, x->state());
1066 
1067   i = dims->length();
1068   while (i-- > 0) {
1069     LIRItem* size = items->at(i);
1070     size->load_nonconstant();
1071     // FrameMap::_reserved_argument_area_size includes the dimensions
1072     // varargs, because it's initialized to hir()->max_stack() when the
1073     // FrameMap is created.
1074     store_stack_parameter(size->result(), in_ByteSize(i*sizeof(jint) + FrameMap::first_available_sp_in_frame));
1075   }
1076 
1077   const LIR_Opr klass_reg = FrameMap::R4_metadata_opr; // Used by slow path.
1078   klass2reg_with_patching(klass_reg, x->klass(), patching_info);
1079 
1080   LIR_Opr rank = FrameMap::R5_opr; // Used by slow path.
1081   __ move(LIR_OprFact::intConst(x->rank()), rank);
1082 
1083   LIR_Opr varargs = FrameMap::as_pointer_opr(R6); // Used by slow path.
1084   __ leal(LIR_OprFact::address(new LIR_Address(FrameMap::SP_opr, FrameMap::first_available_sp_in_frame, T_INT)),
1085           varargs);
1086 
1087   // Note: This instruction can be deoptimized in the slow path.
1088   LIR_OprList* args = new LIR_OprList(3);
1089   args->append(klass_reg);
1090   args->append(rank);
1091   args->append(varargs);
1092   const LIR_Opr reg = result_register_for(x->type());
1093   __ call_runtime(Runtime1::entry_for(Runtime1::new_multi_array_id),
1094                   LIR_OprFact::illegalOpr,
1095                   reg, args, info);
1096 
1097   // Must prevent reordering of stores for object initialization
1098   // with stores that publish the new object.
1099   __ membar_storestore();
1100   LIR_Opr result = rlock_result(x);
1101   __ move(reg, result);
1102 }
1103 
1104 
1105 void LIRGenerator::do_BlockBegin(BlockBegin* x) {
1106   // nothing to do for now
1107 }
1108 
1109 
1110 void LIRGenerator::do_CheckCast(CheckCast* x) {
1111   LIRItem obj(x->obj(), this);
1112   CodeEmitInfo* patching_info = NULL;
1113   if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check())) {
1114     // Must do this before locking the destination register as
1115     // an oop register, and before the obj is loaded (so x->obj()->item()
1116     // is valid for creating a debug info location).
1117     patching_info = state_for(x, x->state_before());
1118   }
1119   obj.load_item();
1120   LIR_Opr out_reg = rlock_result(x);
1121   CodeStub* stub;
1122   CodeEmitInfo* info_for_exception =
1123       (x->needs_exception_state() ? state_for(x) :
1124                                     state_for(x, x->state_before(), true /*ignore_xhandler*/));
1125 
1126   if (x->is_incompatible_class_change_check()) {
1127     assert(patching_info == NULL, "can't patch this");
1128     stub = new SimpleExceptionStub(Runtime1::throw_incompatible_class_change_error_id,
1129                                    LIR_OprFact::illegalOpr, info_for_exception);
1130   } else if (x->is_invokespecial_receiver_check()) {
1131     assert(patching_info == NULL, "can't patch this");
1132     stub = new DeoptimizeStub(info_for_exception,
1133                               Deoptimization::Reason_class_check,
1134                               Deoptimization::Action_none);
1135   } else {
1136     stub = new SimpleExceptionStub(Runtime1::throw_class_cast_exception_id, obj.result(), info_for_exception);
1137   }
1138   // Following registers are used by slow_subtype_check:
1139   LIR_Opr tmp1 = FrameMap::R4_oop_opr; // super_klass
1140   LIR_Opr tmp2 = FrameMap::R5_oop_opr; // sub_klass
1141   LIR_Opr tmp3 = FrameMap::R6_oop_opr; // temp
1142   __ checkcast(out_reg, obj.result(), x->klass(), tmp1, tmp2, tmp3,
1143                x->direct_compare(), info_for_exception, patching_info, stub,
1144                x->profiled_method(), x->profiled_bci());
1145 }
1146 
1147 
1148 void LIRGenerator::do_InstanceOf(InstanceOf* x) {
1149   LIRItem obj(x->obj(), this);
1150   CodeEmitInfo* patching_info = NULL;
1151   if (!x->klass()->is_loaded() || PatchALot) {
1152     patching_info = state_for(x, x->state_before());
1153   }
1154   // Ensure the result register is not the input register because the
1155   // result is initialized before the patching safepoint.
1156   obj.load_item();
1157   LIR_Opr out_reg = rlock_result(x);
1158   // Following registers are used by slow_subtype_check:
1159   LIR_Opr tmp1 = FrameMap::R4_oop_opr; // super_klass
1160   LIR_Opr tmp2 = FrameMap::R5_oop_opr; // sub_klass
1161   LIR_Opr tmp3 = FrameMap::R6_oop_opr; // temp
1162   __ instanceof(out_reg, obj.result(), x->klass(), tmp1, tmp2, tmp3,
1163                 x->direct_compare(), patching_info,
1164                 x->profiled_method(), x->profiled_bci());
1165 }
1166 
1167 
1168 void LIRGenerator::do_If(If* x) {
1169   assert(x->number_of_sux() == 2, "inconsistency");
1170   ValueTag tag = x->x()->type()->tag();
1171   LIRItem xitem(x->x(), this);
1172   LIRItem yitem(x->y(), this);
1173   LIRItem* xin = &xitem;
1174   LIRItem* yin = &yitem;
1175   If::Condition cond = x->cond();
1176 
1177   LIR_Opr left = LIR_OprFact::illegalOpr;
1178   LIR_Opr right = LIR_OprFact::illegalOpr;
1179 
1180   xin->load_item();
1181   left = xin->result();
1182 
1183   if (yin->result()->is_constant() && yin->result()->type() == T_INT &&
1184       Assembler::is_simm16(yin->result()->as_constant_ptr()->as_jint())) {
1185     // Inline int constants which are small enough to be immediate operands.
1186     right = LIR_OprFact::value_type(yin->value()->type());
1187   } else if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 &&
1188              (cond == If::eql || cond == If::neq)) {
1189     // Inline long zero.
1190     right = LIR_OprFact::value_type(yin->value()->type());
1191   } else if (tag == objectTag && yin->is_constant() && (yin->get_jobject_constant()->is_null_object())) {
1192     right = LIR_OprFact::value_type(yin->value()->type());
1193   } else {
1194     yin->load_item();
1195     right = yin->result();
1196   }
1197   set_no_result(x);
1198 
1199   // Add safepoint before generating condition code so it can be recomputed.
1200   if (x->is_safepoint()) {
1201     // Increment backedge counter if needed.
1202     increment_backedge_counter(state_for(x, x->state_before()), x->profiled_bci());
1203     __ safepoint(safepoint_poll_register(), state_for(x, x->state_before()));
1204   }
1205 
1206   __ cmp(lir_cond(cond), left, right);
1207   // Generate branch profiling. Profiling code doesn't kill flags.
1208   profile_branch(x, cond);
1209   move_to_phi(x->state());
1210   if (x->x()->type()->is_float_kind()) {
1211     __ branch(lir_cond(cond), right->type(), x->tsux(), x->usux());
1212   } else {
1213     __ branch(lir_cond(cond), right->type(), x->tsux());
1214   }
1215   assert(x->default_sux() == x->fsux(), "wrong destination above");
1216   __ jump(x->default_sux());
1217 }
1218 
1219 
1220 LIR_Opr LIRGenerator::getThreadPointer() {
1221   return FrameMap::as_pointer_opr(R16_thread);
1222 }
1223 
1224 
1225 void LIRGenerator::trace_block_entry(BlockBegin* block) {
1226   LIR_Opr arg1 = FrameMap::R3_opr; // ARG1
1227   __ move(LIR_OprFact::intConst(block->block_id()), arg1);
1228   LIR_OprList* args = new LIR_OprList(1);
1229   args->append(arg1);
1230   address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry);
1231   __ call_runtime_leaf(func, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, args);
1232 }
1233 
1234 
1235 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address,
1236                                         CodeEmitInfo* info) {
1237 #ifdef _LP64
1238   __ store(value, address, info);
1239 #else
1240   Unimplemented();
1241 //  __ volatile_store_mem_reg(value, address, info);
1242 #endif
1243 }
1244 
1245 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result,
1246                                        CodeEmitInfo* info) {
1247 #ifdef _LP64
1248   __ load(address, result, info);
1249 #else
1250   Unimplemented();
1251 //  __ volatile_load_mem_reg(address, result, info);
1252 #endif
1253 }
1254 
1255 
1256 void LIRGenerator::put_Object_unsafe(LIR_Opr src, LIR_Opr offset, LIR_Opr data,
1257                                      BasicType type, bool is_volatile) {
1258   LIR_Opr base_op = src;
1259   LIR_Opr index_op = offset;
1260 
1261   bool is_obj = (type == T_ARRAY || type == T_OBJECT);
1262 #ifndef _LP64
1263   if (is_volatile && type == T_LONG) {
1264     __ volatile_store_unsafe_reg(data, src, offset, type, NULL, lir_patch_none);
1265   } else
1266 #endif
1267   {
1268     if (type == T_BOOLEAN) {
1269       type = T_BYTE;
1270     }
1271     LIR_Address* addr;
1272     if (type == T_ARRAY || type == T_OBJECT) {
1273       LIR_Opr tmp = new_pointer_register();
1274       __ add(base_op, index_op, tmp);
1275       addr = new LIR_Address(tmp, type);
1276     } else {
1277       addr = new LIR_Address(base_op, index_op, type);
1278     }
1279 
1280     if (is_obj) {
1281       pre_barrier(LIR_OprFact::address(addr), LIR_OprFact::illegalOpr /* pre_val */,
1282           true /* do_load */, false /* patch */, NULL);
1283       // _bs->c1_write_barrier_pre(this, LIR_OprFact::address(addr));
1284     }
1285     __ move(data, addr);
1286     if (is_obj) {
1287       // This address is precise.
1288       post_barrier(LIR_OprFact::address(addr), data);
1289     }
1290   }
1291 }
1292 
1293 
1294 void LIRGenerator::get_Object_unsafe(LIR_Opr dst, LIR_Opr src, LIR_Opr offset,
1295                                      BasicType type, bool is_volatile) {
1296 #ifndef _LP64
1297   if (is_volatile && type == T_LONG) {
1298     __ volatile_load_unsafe_reg(src, offset, dst, type, NULL, lir_patch_none);
1299   } else
1300 #endif
1301     {
1302     LIR_Address* addr = new LIR_Address(src, offset, type);
1303     __ load(addr, dst);
1304   }
1305 }
1306 
1307 
1308 void LIRGenerator::do_UnsafeGetAndSetObject(UnsafeGetAndSetObject* x) {
1309   BasicType type = x->basic_type();
1310   LIRItem src(x->object(), this);
1311   LIRItem off(x->offset(), this);
1312   LIRItem value(x->value(), this);
1313 
1314   src.load_item();
1315   value.load_item();
1316   off.load_nonconstant();
1317 
1318   LIR_Opr dst = rlock_result(x, type);
1319   LIR_Opr data = value.result();
1320   bool is_obj = (type == T_ARRAY || type == T_OBJECT);
1321 
1322   LIR_Opr tmp = FrameMap::R0_opr;
1323   LIR_Opr ptr = new_pointer_register();
1324   __ add(src.result(), off.result(), ptr);
1325 
1326   if (support_IRIW_for_not_multiple_copy_atomic_cpu) {
1327     __ membar();
1328   } else {
1329     __ membar_release();
1330   }
1331 
1332   if (x->is_add()) {
1333     __ xadd(ptr, data, dst, tmp);
1334   } else {
1335     const bool can_move_barrier = true; // TODO: port GraphKit::can_move_pre_barrier() from C2
1336     if (!can_move_barrier && is_obj) {
1337       // Do the pre-write barrier, if any.
1338       pre_barrier(ptr, LIR_OprFact::illegalOpr /* pre_val */,
1339                   true /* do_load */, false /* patch */, NULL);
1340     }
1341     __ xchg(ptr, data, dst, tmp);
1342     if (is_obj) {
1343       // Seems to be a precise address.
1344       post_barrier(ptr, data);
1345       if (can_move_barrier) {
1346         pre_barrier(LIR_OprFact::illegalOpr, dst /* pre_val */,
1347                     false /* do_load */, false /* patch */, NULL);
1348       }
1349     }
1350   }
1351 
1352   if (support_IRIW_for_not_multiple_copy_atomic_cpu) {
1353     __ membar_acquire();
1354   } else {
1355     __ membar();
1356   }
1357 }
1358 
1359 
1360 void LIRGenerator::do_update_CRC32(Intrinsic* x) {
1361   assert(UseCRC32Intrinsics, "or should not be here");
1362   LIR_Opr result = rlock_result(x);
1363 
1364   switch (x->id()) {
1365     case vmIntrinsics::_updateCRC32: {
1366       LIRItem crc(x->argument_at(0), this);
1367       LIRItem val(x->argument_at(1), this);
1368       // Registers destroyed by update_crc32.
1369       crc.set_destroys_register();
1370       val.set_destroys_register();
1371       crc.load_item();
1372       val.load_item();
1373       __ update_crc32(crc.result(), val.result(), result);
1374       break;
1375     }
1376     case vmIntrinsics::_updateBytesCRC32:
1377     case vmIntrinsics::_updateByteBufferCRC32: {
1378       bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32);
1379 
1380       LIRItem crc(x->argument_at(0), this);
1381       LIRItem buf(x->argument_at(1), this);
1382       LIRItem off(x->argument_at(2), this);
1383       LIRItem len(x->argument_at(3), this);
1384       buf.load_item();
1385       off.load_nonconstant();
1386 
1387       LIR_Opr index = off.result();
1388       int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0;
1389       if (off.result()->is_constant()) {
1390         index = LIR_OprFact::illegalOpr;
1391         offset += off.result()->as_jint();
1392       }
1393       LIR_Opr base_op = buf.result();
1394       LIR_Address* a = NULL;
1395 
1396       if (index->is_valid()) {
1397         LIR_Opr tmp = new_register(T_LONG);
1398         __ convert(Bytecodes::_i2l, index, tmp);
1399         index = tmp;
1400         __ add(index, LIR_OprFact::intptrConst(offset), index);
1401         a = new LIR_Address(base_op, index, T_BYTE);
1402       } else {
1403         a = new LIR_Address(base_op, offset, T_BYTE);
1404       }
1405 
1406       BasicTypeList signature(3);
1407       signature.append(T_INT);
1408       signature.append(T_ADDRESS);
1409       signature.append(T_INT);
1410       CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1411       const LIR_Opr result_reg = result_register_for(x->type());
1412 
1413       LIR_Opr arg1 = cc->at(0),
1414               arg2 = cc->at(1),
1415               arg3 = cc->at(2);
1416 
1417       crc.load_item_force(arg1); // We skip int->long conversion here, because CRC32 stub doesn't care about high bits.
1418       __ leal(LIR_OprFact::address(a), arg2);
1419       len.load_item_force(arg3); // We skip int->long conversion here, , because CRC32 stub expects int.
1420 
1421       __ call_runtime_leaf(StubRoutines::updateBytesCRC32(), LIR_OprFact::illegalOpr, result_reg, cc->args());
1422       __ move(result_reg, result);
1423       break;
1424     }
1425     default: {
1426       ShouldNotReachHere();
1427     }
1428   }
1429 }
1430 
1431 void LIRGenerator::do_update_CRC32C(Intrinsic* x) {
1432   assert(UseCRC32CIntrinsics, "or should not be here");
1433   LIR_Opr result = rlock_result(x);
1434 
1435   switch (x->id()) {
1436     case vmIntrinsics::_updateBytesCRC32C:
1437     case vmIntrinsics::_updateDirectByteBufferCRC32C: {
1438       bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32C);
1439 
1440       LIRItem crc(x->argument_at(0), this);
1441       LIRItem buf(x->argument_at(1), this);
1442       LIRItem off(x->argument_at(2), this);
1443       LIRItem end(x->argument_at(3), this);
1444       buf.load_item();
1445       off.load_nonconstant();
1446       end.load_nonconstant();
1447 
1448       // len = end - off
1449       LIR_Opr len  = end.result();
1450       LIR_Opr tmpA = new_register(T_INT);
1451       LIR_Opr tmpB = new_register(T_INT);
1452       __ move(end.result(), tmpA);
1453       __ move(off.result(), tmpB);
1454       __ sub(tmpA, tmpB, tmpA);
1455       len = tmpA;
1456 
1457       LIR_Opr index = off.result();
1458       int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0;
1459       if (off.result()->is_constant()) {
1460         index = LIR_OprFact::illegalOpr;
1461         offset += off.result()->as_jint();
1462       }
1463       LIR_Opr base_op = buf.result();
1464       LIR_Address* a = NULL;
1465 
1466       if (index->is_valid()) {
1467         LIR_Opr tmp = new_register(T_LONG);
1468         __ convert(Bytecodes::_i2l, index, tmp);
1469         index = tmp;
1470         __ add(index, LIR_OprFact::intptrConst(offset), index);
1471         a = new LIR_Address(base_op, index, T_BYTE);
1472       } else {
1473         a = new LIR_Address(base_op, offset, T_BYTE);
1474       }
1475 
1476       BasicTypeList signature(3);
1477       signature.append(T_INT);
1478       signature.append(T_ADDRESS);
1479       signature.append(T_INT);
1480       CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1481       const LIR_Opr result_reg = result_register_for(x->type());
1482 
1483       LIR_Opr arg1 = cc->at(0),
1484               arg2 = cc->at(1),
1485               arg3 = cc->at(2);
1486 
1487       crc.load_item_force(arg1); // We skip int->long conversion here, because CRC32C stub doesn't care about high bits.
1488       __ leal(LIR_OprFact::address(a), arg2);
1489       __ move(len, cc->at(2));   // We skip int->long conversion here, because CRC32C stub expects int.
1490 
1491       __ call_runtime_leaf(StubRoutines::updateBytesCRC32C(), LIR_OprFact::illegalOpr, result_reg, cc->args());
1492       __ move(result_reg, result);
1493       break;
1494     }
1495     default: {
1496       ShouldNotReachHere();
1497     }
1498   }
1499 }
1500 
1501 void LIRGenerator::do_FmaIntrinsic(Intrinsic* x) {
1502   assert(x->number_of_arguments() == 3, "wrong type");
1503   assert(UseFMA, "Needs FMA instructions support.");
1504   LIRItem value(x->argument_at(0), this);
1505   LIRItem value1(x->argument_at(1), this);
1506   LIRItem value2(x->argument_at(2), this);
1507 
1508   value.load_item();
1509   value1.load_item();
1510   value2.load_item();
1511 
1512   LIR_Opr calc_input = value.result();
1513   LIR_Opr calc_input1 = value1.result();
1514   LIR_Opr calc_input2 = value2.result();
1515   LIR_Opr calc_result = rlock_result(x);
1516 
1517   switch (x->id()) {
1518   case vmIntrinsics::_fmaD: __ fmad(calc_input, calc_input1, calc_input2, calc_result); break;
1519   case vmIntrinsics::_fmaF: __ fmaf(calc_input, calc_input1, calc_input2, calc_result); break;
1520   default:                  ShouldNotReachHere();
1521   }
1522 }
1523 
1524 void LIRGenerator::do_vectorizedMismatch(Intrinsic* x) {
1525   fatal("vectorizedMismatch intrinsic is not implemented on this platform");
1526 }