src/hotspot/cpu/ppc/assembler_ppc.hpp

rev 47384 : 8188868: PPC64: Support AES intrinsics on Big Endian
Reviewed-by: goetz

*** 2297,2306 ****
--- 2297,2307 ----
    inline void lvsr(  VectorRegister d, Register s2);
  
    // Endianess specific concatenation of 2 loaded vectors.
    inline void load_perm(VectorRegister perm, Register addr);
    inline void vec_perm(VectorRegister first_dest, VectorRegister second, VectorRegister perm);
+   inline void vec_perm(VectorRegister dest, VectorRegister first, VectorRegister second, VectorRegister perm);
  
    // RegisterOrConstant versions.
    // These emitters choose between the versions using two registers and
    // those with register and immediate, depending on the content of roc.
    // If the constant is not encodable as immediate, instructions to