19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 // Major contributions by AHa, AS, JL, ML.
27
28 #include "precompiled.hpp"
29 #include "asm/macroAssembler.inline.hpp"
30 #include "interp_masm_s390.hpp"
31 #include "interpreter/interpreter.hpp"
32 #include "interpreter/interpreterRuntime.hpp"
33 #include "oops/arrayOop.hpp"
34 #include "oops/markOop.hpp"
35 #include "prims/jvmtiExport.hpp"
36 #include "prims/jvmtiThreadState.hpp"
37 #include "runtime/basicLock.hpp"
38 #include "runtime/biasedLocking.hpp"
39 #include "runtime/sharedRuntime.hpp"
40 #include "runtime/thread.inline.hpp"
41
42 // Implementation of InterpreterMacroAssembler.
43 // This file specializes the assember with interpreter-specific macros.
44
45 #ifdef PRODUCT
46 #define BLOCK_COMMENT(str)
47 #define BIND(label) bind(label);
48 #else
49 #define BLOCK_COMMENT(str) block_comment(str)
50 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
51 #endif
52
53 void InterpreterMacroAssembler::jump_to_entry(address entry, Register Rscratch) {
54 assert(entry != NULL, "Entry must have been generated by now");
55 assert(Rscratch != Z_R0, "Can't use R0 for addressing");
56 branch_optimized(Assembler::bcondAlways, entry);
57 }
58
59 void InterpreterMacroAssembler::empty_expression_stack(void) {
60 get_monitors(Z_R1_scratch);
61 add2reg(Z_esp, -Interpreter::stackElementSize, Z_R1_scratch);
62 }
63
64 // Dispatch code executed in the prolog of a bytecode which does not do it's
65 // own dispatch.
66 void InterpreterMacroAssembler::dispatch_prolog(TosState state, int bcp_incr) {
67 // On z/Architecture we are short on registers, therefore we do not preload the
68 // dispatch address of the next bytecode.
69 }
70
71 // Dispatch code executed in the epilog of a bytecode which does not do it's
72 // own dispatch.
73 void InterpreterMacroAssembler::dispatch_epilog(TosState state, int step) {
74 dispatch_next(state, step);
75 }
76
77 void InterpreterMacroAssembler::dispatch_next(TosState state, int bcp_incr) {
78 z_llgc(Z_bytecode, bcp_incr, Z_R0, Z_bcp); // Load next bytecode.
79 add2reg(Z_bcp, bcp_incr); // Advance bcp. Add2reg produces optimal code.
80 dispatch_base(state, Interpreter::dispatch_table(state));
81 }
82
83 // Common code to dispatch and dispatch_only.
84 // Dispatch value in Lbyte_code and increment Lbcp.
85
86 void InterpreterMacroAssembler::dispatch_base(TosState state, address* table) {
87 verify_FPU(1, state);
88
89 #ifdef ASSERT
90 address reentry = NULL;
91 { Label OK;
92 // Check if the frame pointer in Z_fp is correct.
93 z_cg(Z_fp, 0, Z_SP);
94 z_bre(OK);
95 reentry = stop_chain_static(reentry, "invalid frame pointer Z_fp: " FILE_AND_LINE);
96 bind(OK);
97 }
98 { Label OK;
99 // check if the locals pointer in Z_locals is correct
100 z_cg(Z_locals, _z_ijava_state_neg(locals), Z_fp);
101 z_bre(OK);
102 reentry = stop_chain_static(reentry, "invalid locals pointer Z_locals: " FILE_AND_LINE);
103 bind(OK);
104 }
105 #endif
106
107 // TODO: Maybe implement +VerifyActivationFrameSize here.
108 // verify_thread(); // Too slow. We will just verify on method entry & exit.
109 verify_oop(Z_tos, state);
110
111 // Dispatch table to use.
112 load_absolute_address(Z_tmp_1, (address) table); // Z_tmp_1 = table;
113
114 // 0 <= Z_bytecode < 256 => Use a 32 bit shift, because it is shorter than sllg.
115 // Z_bytecode must have been loaded zero-extended for this approach to be correct.
116 z_sll(Z_bytecode, LogBytesPerWord, Z_R0); // Multiply by wordSize.
117 z_lg(Z_tmp_1, 0, Z_bytecode, Z_tmp_1); // Get entry addr.
118
119 z_br(Z_tmp_1);
120 }
121
122 void InterpreterMacroAssembler::dispatch_only(TosState state) {
123 dispatch_base(state, Interpreter::dispatch_table(state));
124 }
125
126 void InterpreterMacroAssembler::dispatch_only_normal(TosState state) {
127 dispatch_base(state, Interpreter::normal_table(state));
128 }
129
130 void InterpreterMacroAssembler::dispatch_via(TosState state, address *table) {
131 // Load current bytecode.
132 z_llgc(Z_bytecode, Address(Z_bcp, (intptr_t)0));
133 dispatch_base(state, table);
134 }
135
136 // The following call_VM*_base() methods overload and mask the respective
137 // declarations/definitions in class MacroAssembler. They are meant as a "detour"
138 // to perform additional, template interpreter specific tasks before actually
139 // calling their MacroAssembler counterparts.
140
141 void InterpreterMacroAssembler::call_VM_leaf_base(address entry_point) {
142 bool allow_relocation = true; // Fenerally valid variant. Assume code is relocated.
143 // interpreter specific
|
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 // Major contributions by AHa, AS, JL, ML.
27
28 #include "precompiled.hpp"
29 #include "asm/macroAssembler.inline.hpp"
30 #include "interp_masm_s390.hpp"
31 #include "interpreter/interpreter.hpp"
32 #include "interpreter/interpreterRuntime.hpp"
33 #include "oops/arrayOop.hpp"
34 #include "oops/markOop.hpp"
35 #include "prims/jvmtiExport.hpp"
36 #include "prims/jvmtiThreadState.hpp"
37 #include "runtime/basicLock.hpp"
38 #include "runtime/biasedLocking.hpp"
39 #include "runtime/safepointMechanism.hpp"
40 #include "runtime/sharedRuntime.hpp"
41 #include "runtime/thread.inline.hpp"
42
43 // Implementation of InterpreterMacroAssembler.
44 // This file specializes the assember with interpreter-specific macros.
45
46 #ifdef PRODUCT
47 #define BLOCK_COMMENT(str)
48 #define BIND(label) bind(label);
49 #else
50 #define BLOCK_COMMENT(str) block_comment(str)
51 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
52 #endif
53
54 void InterpreterMacroAssembler::jump_to_entry(address entry, Register Rscratch) {
55 assert(entry != NULL, "Entry must have been generated by now");
56 assert(Rscratch != Z_R0, "Can't use R0 for addressing");
57 branch_optimized(Assembler::bcondAlways, entry);
58 }
59
60 void InterpreterMacroAssembler::empty_expression_stack(void) {
61 get_monitors(Z_R1_scratch);
62 add2reg(Z_esp, -Interpreter::stackElementSize, Z_R1_scratch);
63 }
64
65 // Dispatch code executed in the prolog of a bytecode which does not do it's
66 // own dispatch.
67 void InterpreterMacroAssembler::dispatch_prolog(TosState state, int bcp_incr) {
68 // On z/Architecture we are short on registers, therefore we do not preload the
69 // dispatch address of the next bytecode.
70 }
71
72 // Dispatch code executed in the epilog of a bytecode which does not do it's
73 // own dispatch.
74 void InterpreterMacroAssembler::dispatch_epilog(TosState state, int step) {
75 dispatch_next(state, step);
76 }
77
78 void InterpreterMacroAssembler::dispatch_next(TosState state, int bcp_incr, bool generate_poll) {
79 z_llgc(Z_bytecode, bcp_incr, Z_R0, Z_bcp); // Load next bytecode.
80 add2reg(Z_bcp, bcp_incr); // Advance bcp. Add2reg produces optimal code.
81 dispatch_base(state, Interpreter::dispatch_table(state), generate_poll);
82 }
83
84 // Common code to dispatch and dispatch_only.
85 // Dispatch value in Lbyte_code and increment Lbcp.
86
87 void InterpreterMacroAssembler::dispatch_base(TosState state, address* table, bool generate_poll) {
88 verify_FPU(1, state);
89
90 #ifdef ASSERT
91 address reentry = NULL;
92 { Label OK;
93 // Check if the frame pointer in Z_fp is correct.
94 z_cg(Z_fp, 0, Z_SP);
95 z_bre(OK);
96 reentry = stop_chain_static(reentry, "invalid frame pointer Z_fp: " FILE_AND_LINE);
97 bind(OK);
98 }
99 { Label OK;
100 // check if the locals pointer in Z_locals is correct
101 z_cg(Z_locals, _z_ijava_state_neg(locals), Z_fp);
102 z_bre(OK);
103 reentry = stop_chain_static(reentry, "invalid locals pointer Z_locals: " FILE_AND_LINE);
104 bind(OK);
105 }
106 #endif
107
108 // TODO: Maybe implement +VerifyActivationFrameSize here.
109 // verify_thread(); // Too slow. We will just verify on method entry & exit.
110 verify_oop(Z_tos, state);
111
112 // Dispatch table to use.
113 load_absolute_address(Z_tmp_1, (address)table); // Z_tmp_1 = table;
114
115 if (SafepointMechanism::uses_thread_local_poll() && generate_poll) {
116 address *sfpt_tbl = Interpreter::safept_table(state);
117 if (table != sfpt_tbl) {
118 Label dispatch;
119 const Address poll_byte_addr(Z_thread, in_bytes(Thread::polling_page_offset()) + 7 /* Big Endian */);
120 // Armed page has poll_bit set, if poll bit is cleared just continue.
121 z_tm(poll_byte_addr, SafepointMechanism::poll_bit());
122 z_braz(dispatch);
123 load_absolute_address(Z_tmp_1, (address)sfpt_tbl); // Z_tmp_1 = table;
124 bind(dispatch);
125 }
126 }
127
128 // 0 <= Z_bytecode < 256 => Use a 32 bit shift, because it is shorter than sllg.
129 // Z_bytecode must have been loaded zero-extended for this approach to be correct.
130 z_sll(Z_bytecode, LogBytesPerWord, Z_R0); // Multiply by wordSize.
131 z_lg(Z_tmp_1, 0, Z_bytecode, Z_tmp_1); // Get entry addr.
132
133 z_br(Z_tmp_1);
134 }
135
136 void InterpreterMacroAssembler::dispatch_only(TosState state, bool generate_poll) {
137 dispatch_base(state, Interpreter::dispatch_table(state), generate_poll);
138 }
139
140 void InterpreterMacroAssembler::dispatch_only_normal(TosState state) {
141 dispatch_base(state, Interpreter::normal_table(state));
142 }
143
144 void InterpreterMacroAssembler::dispatch_via(TosState state, address *table) {
145 // Load current bytecode.
146 z_llgc(Z_bytecode, Address(Z_bcp, (intptr_t)0));
147 dispatch_base(state, table);
148 }
149
150 // The following call_VM*_base() methods overload and mask the respective
151 // declarations/definitions in class MacroAssembler. They are meant as a "detour"
152 // to perform additional, template interpreter specific tasks before actually
153 // calling their MacroAssembler counterparts.
154
155 void InterpreterMacroAssembler::call_VM_leaf_base(address entry_point) {
156 bool allow_relocation = true; // Fenerally valid variant. Assume code is relocated.
157 // interpreter specific
|