1 /*
2 * Copyright (c) 1997, 2016, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
5111 }
5112
5113 void MacroAssembler::vxorpd(XMMRegister dst, XMMRegister nds, AddressLiteral src, int vector_len) {
5114 if (reachable(src)) {
5115 vxorpd(dst, nds, as_Address(src), vector_len);
5116 } else {
5117 lea(rscratch1, src);
5118 vxorpd(dst, nds, Address(rscratch1, 0), vector_len);
5119 }
5120 }
5121
5122 void MacroAssembler::vxorps(XMMRegister dst, XMMRegister nds, AddressLiteral src, int vector_len) {
5123 if (reachable(src)) {
5124 vxorps(dst, nds, as_Address(src), vector_len);
5125 } else {
5126 lea(rscratch1, src);
5127 vxorps(dst, nds, Address(rscratch1, 0), vector_len);
5128 }
5129 }
5130
5131
5132 //////////////////////////////////////////////////////////////////////////////////
5133 #if INCLUDE_ALL_GCS
5134
5135 void MacroAssembler::g1_write_barrier_pre(Register obj,
5136 Register pre_val,
5137 Register thread,
5138 Register tmp,
5139 bool tosca_live,
5140 bool expand_call) {
5141
5142 // If expand_call is true then we expand the call_VM_leaf macro
5143 // directly to skip generating the check by
5144 // InterpreterMacroAssembler::call_VM_leaf_base that checks _last_sp.
5145
5146 #ifdef _LP64
5147 assert(thread == r15_thread, "must be");
5148 #endif // _LP64
5149
5150 Label done;
|
1 /*
2 * Copyright (c) 1997, 2017, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
5111 }
5112
5113 void MacroAssembler::vxorpd(XMMRegister dst, XMMRegister nds, AddressLiteral src, int vector_len) {
5114 if (reachable(src)) {
5115 vxorpd(dst, nds, as_Address(src), vector_len);
5116 } else {
5117 lea(rscratch1, src);
5118 vxorpd(dst, nds, Address(rscratch1, 0), vector_len);
5119 }
5120 }
5121
5122 void MacroAssembler::vxorps(XMMRegister dst, XMMRegister nds, AddressLiteral src, int vector_len) {
5123 if (reachable(src)) {
5124 vxorps(dst, nds, as_Address(src), vector_len);
5125 } else {
5126 lea(rscratch1, src);
5127 vxorps(dst, nds, Address(rscratch1, 0), vector_len);
5128 }
5129 }
5130
5131
5132 void MacroAssembler::resolve_jobject(Register value,
5133 Register thread,
5134 Register tmp) {
5135 assert_different_registers(value, thread, tmp);
5136 Label done, not_weak;
5137 testptr(value, value);
5138 jcc(Assembler::zero, done); // Use NULL as-is.
5139 testptr(value, JNIHandles::weak_tag_mask); // Test for jweak tag.
5140 jcc(Assembler::zero, not_weak);
5141 // Resolve jweak.
5142 movptr(value, Address(value, -JNIHandles::weak_tag_value));
5143 verify_oop(value);
5144 #if INCLUDE_ALL_GCS
5145 if (UseG1GC) {
5146 g1_write_barrier_pre(noreg /* obj */,
5147 value /* pre_val */,
5148 thread /* thread */,
5149 tmp /* tmp */,
5150 true /* tosca_live */,
5151 true /* expand_call */);
5152 }
5153 #endif // INCLUDE_ALL_GCS
5154 jmp(done);
5155 bind(not_weak);
5156 // Resolve (untagged) jobject.
5157 movptr(value, Address(value, 0));
5158 verify_oop(value);
5159 bind(done);
5160 }
5161
5162 //////////////////////////////////////////////////////////////////////////////////
5163 #if INCLUDE_ALL_GCS
5164
5165 void MacroAssembler::g1_write_barrier_pre(Register obj,
5166 Register pre_val,
5167 Register thread,
5168 Register tmp,
5169 bool tosca_live,
5170 bool expand_call) {
5171
5172 // If expand_call is true then we expand the call_VM_leaf macro
5173 // directly to skip generating the check by
5174 // InterpreterMacroAssembler::call_VM_leaf_base that checks _last_sp.
5175
5176 #ifdef _LP64
5177 assert(thread == r15_thread, "must be");
5178 #endif // _LP64
5179
5180 Label done;
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