504 STVX_OPCODE = (31u << OPCODE_SHIFT | 231u << 1),
505 STVXL_OPCODE = (31u << OPCODE_SHIFT | 487u << 1),
506 LVSL_OPCODE = (31u << OPCODE_SHIFT | 6u << 1),
507 LVSR_OPCODE = (31u << OPCODE_SHIFT | 38u << 1),
508
509 // Vector-Scalar (VSX) instruction support.
510 LXVD2X_OPCODE = (31u << OPCODE_SHIFT | 844u << 1),
511 STXVD2X_OPCODE = (31u << OPCODE_SHIFT | 972u << 1),
512 MTVSRD_OPCODE = (31u << OPCODE_SHIFT | 179u << 1),
513 MTVSRWZ_OPCODE = (31u << OPCODE_SHIFT | 243u << 1),
514 MFVSRD_OPCODE = (31u << OPCODE_SHIFT | 51u << 1),
515 MTVSRWA_OPCODE = (31u << OPCODE_SHIFT | 211u << 1),
516 MFVSRWZ_OPCODE = (31u << OPCODE_SHIFT | 115u << 1),
517 XXPERMDI_OPCODE= (60u << OPCODE_SHIFT | 10u << 3),
518 XXMRGHW_OPCODE = (60u << OPCODE_SHIFT | 18u << 3),
519 XXMRGLW_OPCODE = (60u << OPCODE_SHIFT | 50u << 3),
520 XXSPLTW_OPCODE = (60u << OPCODE_SHIFT | 164u << 2),
521 XXLOR_OPCODE = (60u << OPCODE_SHIFT | 146u << 3),
522 XXLXOR_OPCODE = (60u << OPCODE_SHIFT | 154u << 3),
523 XXLEQV_OPCODE = (60u << OPCODE_SHIFT | 186u << 3),
524
525 // Vector Permute and Formatting
526 VPKPX_OPCODE = (4u << OPCODE_SHIFT | 782u ),
527 VPKSHSS_OPCODE = (4u << OPCODE_SHIFT | 398u ),
528 VPKSWSS_OPCODE = (4u << OPCODE_SHIFT | 462u ),
529 VPKSHUS_OPCODE = (4u << OPCODE_SHIFT | 270u ),
530 VPKSWUS_OPCODE = (4u << OPCODE_SHIFT | 334u ),
531 VPKUHUM_OPCODE = (4u << OPCODE_SHIFT | 14u ),
532 VPKUWUM_OPCODE = (4u << OPCODE_SHIFT | 78u ),
533 VPKUHUS_OPCODE = (4u << OPCODE_SHIFT | 142u ),
534 VPKUWUS_OPCODE = (4u << OPCODE_SHIFT | 206u ),
535 VUPKHPX_OPCODE = (4u << OPCODE_SHIFT | 846u ),
536 VUPKHSB_OPCODE = (4u << OPCODE_SHIFT | 526u ),
537 VUPKHSH_OPCODE = (4u << OPCODE_SHIFT | 590u ),
538 VUPKLPX_OPCODE = (4u << OPCODE_SHIFT | 974u ),
539 VUPKLSB_OPCODE = (4u << OPCODE_SHIFT | 654u ),
540 VUPKLSH_OPCODE = (4u << OPCODE_SHIFT | 718u ),
541
542 VMRGHB_OPCODE = (4u << OPCODE_SHIFT | 12u ),
543 VMRGHW_OPCODE = (4u << OPCODE_SHIFT | 140u ),
557 VSEL_OPCODE = (4u << OPCODE_SHIFT | 42u ),
558
559 VSL_OPCODE = (4u << OPCODE_SHIFT | 452u ),
560 VSLDOI_OPCODE = (4u << OPCODE_SHIFT | 44u ),
561 VSLO_OPCODE = (4u << OPCODE_SHIFT | 1036u ),
562 VSR_OPCODE = (4u << OPCODE_SHIFT | 708u ),
563 VSRO_OPCODE = (4u << OPCODE_SHIFT | 1100u ),
564
565 // Vector Integer
566 VADDCUW_OPCODE = (4u << OPCODE_SHIFT | 384u ),
567 VADDSHS_OPCODE = (4u << OPCODE_SHIFT | 832u ),
568 VADDSBS_OPCODE = (4u << OPCODE_SHIFT | 768u ),
569 VADDSWS_OPCODE = (4u << OPCODE_SHIFT | 896u ),
570 VADDUBM_OPCODE = (4u << OPCODE_SHIFT | 0u ),
571 VADDUWM_OPCODE = (4u << OPCODE_SHIFT | 128u ),
572 VADDUHM_OPCODE = (4u << OPCODE_SHIFT | 64u ),
573 VADDUDM_OPCODE = (4u << OPCODE_SHIFT | 192u ),
574 VADDUBS_OPCODE = (4u << OPCODE_SHIFT | 512u ),
575 VADDUWS_OPCODE = (4u << OPCODE_SHIFT | 640u ),
576 VADDUHS_OPCODE = (4u << OPCODE_SHIFT | 576u ),
577 VSUBCUW_OPCODE = (4u << OPCODE_SHIFT | 1408u ),
578 VSUBSHS_OPCODE = (4u << OPCODE_SHIFT | 1856u ),
579 VSUBSBS_OPCODE = (4u << OPCODE_SHIFT | 1792u ),
580 VSUBSWS_OPCODE = (4u << OPCODE_SHIFT | 1920u ),
581 VSUBUBM_OPCODE = (4u << OPCODE_SHIFT | 1024u ),
582 VSUBUWM_OPCODE = (4u << OPCODE_SHIFT | 1152u ),
583 VSUBUHM_OPCODE = (4u << OPCODE_SHIFT | 1088u ),
584 VSUBUBS_OPCODE = (4u << OPCODE_SHIFT | 1536u ),
585 VSUBUWS_OPCODE = (4u << OPCODE_SHIFT | 1664u ),
586 VSUBUHS_OPCODE = (4u << OPCODE_SHIFT | 1600u ),
587
588 VMULESB_OPCODE = (4u << OPCODE_SHIFT | 776u ),
589 VMULEUB_OPCODE = (4u << OPCODE_SHIFT | 520u ),
590 VMULESH_OPCODE = (4u << OPCODE_SHIFT | 840u ),
591 VMULEUH_OPCODE = (4u << OPCODE_SHIFT | 584u ),
592 VMULOSB_OPCODE = (4u << OPCODE_SHIFT | 264u ),
593 VMULOUB_OPCODE = (4u << OPCODE_SHIFT | 8u ),
594 VMULOSH_OPCODE = (4u << OPCODE_SHIFT | 328u ),
595 VMULOUH_OPCODE = (4u << OPCODE_SHIFT | 72u ),
596 VMHADDSHS_OPCODE=(4u << OPCODE_SHIFT | 32u ),
597 VMHRADDSHS_OPCODE=(4u << OPCODE_SHIFT | 33u ),
598 VMLADDUHM_OPCODE=(4u << OPCODE_SHIFT | 34u ),
599 VMSUBUHM_OPCODE= (4u << OPCODE_SHIFT | 36u ),
600 VMSUMMBM_OPCODE= (4u << OPCODE_SHIFT | 37u ),
601 VMSUMSHM_OPCODE= (4u << OPCODE_SHIFT | 40u ),
602 VMSUMSHS_OPCODE= (4u << OPCODE_SHIFT | 41u ),
603 VMSUMUHM_OPCODE= (4u << OPCODE_SHIFT | 38u ),
604 VMSUMUHS_OPCODE= (4u << OPCODE_SHIFT | 39u ),
605
606 VSUMSWS_OPCODE = (4u << OPCODE_SHIFT | 1928u ),
607 VSUM2SWS_OPCODE= (4u << OPCODE_SHIFT | 1672u ),
608 VSUM4SBS_OPCODE= (4u << OPCODE_SHIFT | 1800u ),
609 VSUM4UBS_OPCODE= (4u << OPCODE_SHIFT | 1544u ),
610 VSUM4SHS_OPCODE= (4u << OPCODE_SHIFT | 1608u ),
611
612 VAVGSB_OPCODE = (4u << OPCODE_SHIFT | 1282u ),
613 VAVGSW_OPCODE = (4u << OPCODE_SHIFT | 1410u ),
614 VAVGSH_OPCODE = (4u << OPCODE_SHIFT | 1346u ),
615 VAVGUB_OPCODE = (4u << OPCODE_SHIFT | 1026u ),
616 VAVGUW_OPCODE = (4u << OPCODE_SHIFT | 1154u ),
617 VAVGUH_OPCODE = (4u << OPCODE_SHIFT | 1090u ),
618
619 VMAXSB_OPCODE = (4u << OPCODE_SHIFT | 258u ),
620 VMAXSW_OPCODE = (4u << OPCODE_SHIFT | 386u ),
621 VMAXSH_OPCODE = (4u << OPCODE_SHIFT | 322u ),
622 VMAXUB_OPCODE = (4u << OPCODE_SHIFT | 2u ),
623 VMAXUW_OPCODE = (4u << OPCODE_SHIFT | 130u ),
624 VMAXUH_OPCODE = (4u << OPCODE_SHIFT | 66u ),
640 VCMPGTUW_OPCODE= (4u << OPCODE_SHIFT | 646u ),
641
642 VAND_OPCODE = (4u << OPCODE_SHIFT | 1028u ),
643 VANDC_OPCODE = (4u << OPCODE_SHIFT | 1092u ),
644 VNOR_OPCODE = (4u << OPCODE_SHIFT | 1284u ),
645 VOR_OPCODE = (4u << OPCODE_SHIFT | 1156u ),
646 VXOR_OPCODE = (4u << OPCODE_SHIFT | 1220u ),
647 VRLD_OPCODE = (4u << OPCODE_SHIFT | 196u ),
648 VRLB_OPCODE = (4u << OPCODE_SHIFT | 4u ),
649 VRLW_OPCODE = (4u << OPCODE_SHIFT | 132u ),
650 VRLH_OPCODE = (4u << OPCODE_SHIFT | 68u ),
651 VSLB_OPCODE = (4u << OPCODE_SHIFT | 260u ),
652 VSKW_OPCODE = (4u << OPCODE_SHIFT | 388u ),
653 VSLH_OPCODE = (4u << OPCODE_SHIFT | 324u ),
654 VSRB_OPCODE = (4u << OPCODE_SHIFT | 516u ),
655 VSRW_OPCODE = (4u << OPCODE_SHIFT | 644u ),
656 VSRH_OPCODE = (4u << OPCODE_SHIFT | 580u ),
657 VSRAB_OPCODE = (4u << OPCODE_SHIFT | 772u ),
658 VSRAW_OPCODE = (4u << OPCODE_SHIFT | 900u ),
659 VSRAH_OPCODE = (4u << OPCODE_SHIFT | 836u ),
660
661 // Vector Floating-Point
662 // not implemented yet
663
664 // Vector Status and Control
665 MTVSCR_OPCODE = (4u << OPCODE_SHIFT | 1604u ),
666 MFVSCR_OPCODE = (4u << OPCODE_SHIFT | 1540u ),
667
668 // AES (introduced with Power 8)
669 VCIPHER_OPCODE = (4u << OPCODE_SHIFT | 1288u),
670 VCIPHERLAST_OPCODE = (4u << OPCODE_SHIFT | 1289u),
671 VNCIPHER_OPCODE = (4u << OPCODE_SHIFT | 1352u),
672 VNCIPHERLAST_OPCODE = (4u << OPCODE_SHIFT | 1353u),
673 VSBOX_OPCODE = (4u << OPCODE_SHIFT | 1480u),
674
675 // SHA (introduced with Power 8)
676 VSHASIGMAD_OPCODE = (4u << OPCODE_SHIFT | 1730u),
677 VSHASIGMAW_OPCODE = (4u << OPCODE_SHIFT | 1666u),
678
679 // Vector Binary Polynomial Multiplication (introduced with Power 8)
2042 inline void vspltish( VectorRegister d, int si5);
2043 inline void vspltisw( VectorRegister d, int si5);
2044 inline void vperm( VectorRegister d, VectorRegister a, VectorRegister b, VectorRegister c);
2045 inline void vsel( VectorRegister d, VectorRegister a, VectorRegister b, VectorRegister c);
2046 inline void vsl( VectorRegister d, VectorRegister a, VectorRegister b);
2047 inline void vsldoi( VectorRegister d, VectorRegister a, VectorRegister b, int ui4);
2048 inline void vslo( VectorRegister d, VectorRegister a, VectorRegister b);
2049 inline void vsr( VectorRegister d, VectorRegister a, VectorRegister b);
2050 inline void vsro( VectorRegister d, VectorRegister a, VectorRegister b);
2051 inline void vaddcuw( VectorRegister d, VectorRegister a, VectorRegister b);
2052 inline void vaddshs( VectorRegister d, VectorRegister a, VectorRegister b);
2053 inline void vaddsbs( VectorRegister d, VectorRegister a, VectorRegister b);
2054 inline void vaddsws( VectorRegister d, VectorRegister a, VectorRegister b);
2055 inline void vaddubm( VectorRegister d, VectorRegister a, VectorRegister b);
2056 inline void vadduwm( VectorRegister d, VectorRegister a, VectorRegister b);
2057 inline void vadduhm( VectorRegister d, VectorRegister a, VectorRegister b);
2058 inline void vaddudm( VectorRegister d, VectorRegister a, VectorRegister b);
2059 inline void vaddubs( VectorRegister d, VectorRegister a, VectorRegister b);
2060 inline void vadduws( VectorRegister d, VectorRegister a, VectorRegister b);
2061 inline void vadduhs( VectorRegister d, VectorRegister a, VectorRegister b);
2062 inline void vsubcuw( VectorRegister d, VectorRegister a, VectorRegister b);
2063 inline void vsubshs( VectorRegister d, VectorRegister a, VectorRegister b);
2064 inline void vsubsbs( VectorRegister d, VectorRegister a, VectorRegister b);
2065 inline void vsubsws( VectorRegister d, VectorRegister a, VectorRegister b);
2066 inline void vsububm( VectorRegister d, VectorRegister a, VectorRegister b);
2067 inline void vsubuwm( VectorRegister d, VectorRegister a, VectorRegister b);
2068 inline void vsubuhm( VectorRegister d, VectorRegister a, VectorRegister b);
2069 inline void vsububs( VectorRegister d, VectorRegister a, VectorRegister b);
2070 inline void vsubuws( VectorRegister d, VectorRegister a, VectorRegister b);
2071 inline void vsubuhs( VectorRegister d, VectorRegister a, VectorRegister b);
2072 inline void vmulesb( VectorRegister d, VectorRegister a, VectorRegister b);
2073 inline void vmuleub( VectorRegister d, VectorRegister a, VectorRegister b);
2074 inline void vmulesh( VectorRegister d, VectorRegister a, VectorRegister b);
2075 inline void vmuleuh( VectorRegister d, VectorRegister a, VectorRegister b);
2076 inline void vmulosb( VectorRegister d, VectorRegister a, VectorRegister b);
2077 inline void vmuloub( VectorRegister d, VectorRegister a, VectorRegister b);
2078 inline void vmulosh( VectorRegister d, VectorRegister a, VectorRegister b);
2079 inline void vmulouh( VectorRegister d, VectorRegister a, VectorRegister b);
2080 inline void vmhaddshs(VectorRegister d, VectorRegister a, VectorRegister b, VectorRegister c);
2081 inline void vmhraddshs(VectorRegister d,VectorRegister a, VectorRegister b, VectorRegister c);
2082 inline void vmladduhm(VectorRegister d, VectorRegister a, VectorRegister b, VectorRegister c);
2083 inline void vmsubuhm( VectorRegister d, VectorRegister a, VectorRegister b, VectorRegister c);
2084 inline void vmsummbm( VectorRegister d, VectorRegister a, VectorRegister b, VectorRegister c);
2085 inline void vmsumshm( VectorRegister d, VectorRegister a, VectorRegister b, VectorRegister c);
2086 inline void vmsumshs( VectorRegister d, VectorRegister a, VectorRegister b, VectorRegister c);
2087 inline void vmsumuhm( VectorRegister d, VectorRegister a, VectorRegister b, VectorRegister c);
2088 inline void vmsumuhs( VectorRegister d, VectorRegister a, VectorRegister b, VectorRegister c);
2089 inline void vsumsws( VectorRegister d, VectorRegister a, VectorRegister b);
2090 inline void vsum2sws( VectorRegister d, VectorRegister a, VectorRegister b);
2091 inline void vsum4sbs( VectorRegister d, VectorRegister a, VectorRegister b);
2092 inline void vsum4ubs( VectorRegister d, VectorRegister a, VectorRegister b);
2093 inline void vsum4shs( VectorRegister d, VectorRegister a, VectorRegister b);
2094 inline void vavgsb( VectorRegister d, VectorRegister a, VectorRegister b);
2095 inline void vavgsw( VectorRegister d, VectorRegister a, VectorRegister b);
2096 inline void vavgsh( VectorRegister d, VectorRegister a, VectorRegister b);
2097 inline void vavgub( VectorRegister d, VectorRegister a, VectorRegister b);
2098 inline void vavguw( VectorRegister d, VectorRegister a, VectorRegister b);
2099 inline void vavguh( VectorRegister d, VectorRegister a, VectorRegister b);
2100 inline void vmaxsb( VectorRegister d, VectorRegister a, VectorRegister b);
2101 inline void vmaxsw( VectorRegister d, VectorRegister a, VectorRegister b);
2102 inline void vmaxsh( VectorRegister d, VectorRegister a, VectorRegister b);
2103 inline void vmaxub( VectorRegister d, VectorRegister a, VectorRegister b);
2104 inline void vmaxuw( VectorRegister d, VectorRegister a, VectorRegister b);
2105 inline void vmaxuh( VectorRegister d, VectorRegister a, VectorRegister b);
2106 inline void vminsb( VectorRegister d, VectorRegister a, VectorRegister b);
2107 inline void vminsw( VectorRegister d, VectorRegister a, VectorRegister b);
2108 inline void vminsh( VectorRegister d, VectorRegister a, VectorRegister b);
2129 inline void vcmpgtuw_(VectorRegister d, VectorRegister a, VectorRegister b);
2130 inline void vand( VectorRegister d, VectorRegister a, VectorRegister b);
2131 inline void vandc( VectorRegister d, VectorRegister a, VectorRegister b);
2132 inline void vnor( VectorRegister d, VectorRegister a, VectorRegister b);
2133 inline void vor( VectorRegister d, VectorRegister a, VectorRegister b);
2134 inline void vmr( VectorRegister d, VectorRegister a);
2135 inline void vxor( VectorRegister d, VectorRegister a, VectorRegister b);
2136 inline void vrld( VectorRegister d, VectorRegister a, VectorRegister b);
2137 inline void vrlb( VectorRegister d, VectorRegister a, VectorRegister b);
2138 inline void vrlw( VectorRegister d, VectorRegister a, VectorRegister b);
2139 inline void vrlh( VectorRegister d, VectorRegister a, VectorRegister b);
2140 inline void vslb( VectorRegister d, VectorRegister a, VectorRegister b);
2141 inline void vskw( VectorRegister d, VectorRegister a, VectorRegister b);
2142 inline void vslh( VectorRegister d, VectorRegister a, VectorRegister b);
2143 inline void vsrb( VectorRegister d, VectorRegister a, VectorRegister b);
2144 inline void vsrw( VectorRegister d, VectorRegister a, VectorRegister b);
2145 inline void vsrh( VectorRegister d, VectorRegister a, VectorRegister b);
2146 inline void vsrab( VectorRegister d, VectorRegister a, VectorRegister b);
2147 inline void vsraw( VectorRegister d, VectorRegister a, VectorRegister b);
2148 inline void vsrah( VectorRegister d, VectorRegister a, VectorRegister b);
2149 // Vector Floating-Point not implemented yet
2150 inline void mtvscr( VectorRegister b);
2151 inline void mfvscr( VectorRegister d);
2152
2153 // Vector-Scalar (VSX) instructions.
2154 inline void lxvd2x( VectorSRegister d, Register a);
2155 inline void lxvd2x( VectorSRegister d, Register a, Register b);
2156 inline void stxvd2x( VectorSRegister d, Register a);
2157 inline void stxvd2x( VectorSRegister d, Register a, Register b);
2158 inline void mtvrwz( VectorRegister d, Register a);
2159 inline void mfvrwz( Register a, VectorRegister d);
2160 inline void mtvrd( VectorRegister d, Register a);
2161 inline void mfvrd( Register a, VectorRegister d);
2162 inline void xxpermdi( VectorSRegister d, VectorSRegister a, VectorSRegister b, int dm);
2163 inline void xxmrghw( VectorSRegister d, VectorSRegister a, VectorSRegister b);
2164 inline void xxmrglw( VectorSRegister d, VectorSRegister a, VectorSRegister b);
2165 inline void mtvsrd( VectorSRegister d, Register a);
2166 inline void mtvsrwz( VectorSRegister d, Register a);
2167 inline void xxspltw( VectorSRegister d, VectorSRegister b, int ui2);
2168 inline void xxlor( VectorSRegister d, VectorSRegister a, VectorSRegister b);
2169 inline void xxlxor( VectorSRegister d, VectorSRegister a, VectorSRegister b);
2170 inline void xxleqv( VectorSRegister d, VectorSRegister a, VectorSRegister b);
2171
2172 // VSX Extended Mnemonics
2173 inline void xxspltd( VectorSRegister d, VectorSRegister a, int x);
2174 inline void xxmrghd( VectorSRegister d, VectorSRegister a, VectorSRegister b);
2175 inline void xxmrgld( VectorSRegister d, VectorSRegister a, VectorSRegister b);
2176 inline void xxswapd( VectorSRegister d, VectorSRegister a);
2177
2178 // Vector-Scalar (VSX) instructions.
2179 inline void mtfprd( FloatRegister d, Register a);
2180 inline void mtfprwa( FloatRegister d, Register a);
2181 inline void mffprd( Register a, FloatRegister d);
2182
2183 // AES (introduced with Power 8)
2184 inline void vcipher( VectorRegister d, VectorRegister a, VectorRegister b);
2185 inline void vcipherlast( VectorRegister d, VectorRegister a, VectorRegister b);
2186 inline void vncipher( VectorRegister d, VectorRegister a, VectorRegister b);
2187 inline void vncipherlast(VectorRegister d, VectorRegister a, VectorRegister b);
2188 inline void vsbox( VectorRegister d, VectorRegister a);
2189
2190 // SHA (introduced with Power 8)
|
504 STVX_OPCODE = (31u << OPCODE_SHIFT | 231u << 1),
505 STVXL_OPCODE = (31u << OPCODE_SHIFT | 487u << 1),
506 LVSL_OPCODE = (31u << OPCODE_SHIFT | 6u << 1),
507 LVSR_OPCODE = (31u << OPCODE_SHIFT | 38u << 1),
508
509 // Vector-Scalar (VSX) instruction support.
510 LXVD2X_OPCODE = (31u << OPCODE_SHIFT | 844u << 1),
511 STXVD2X_OPCODE = (31u << OPCODE_SHIFT | 972u << 1),
512 MTVSRD_OPCODE = (31u << OPCODE_SHIFT | 179u << 1),
513 MTVSRWZ_OPCODE = (31u << OPCODE_SHIFT | 243u << 1),
514 MFVSRD_OPCODE = (31u << OPCODE_SHIFT | 51u << 1),
515 MTVSRWA_OPCODE = (31u << OPCODE_SHIFT | 211u << 1),
516 MFVSRWZ_OPCODE = (31u << OPCODE_SHIFT | 115u << 1),
517 XXPERMDI_OPCODE= (60u << OPCODE_SHIFT | 10u << 3),
518 XXMRGHW_OPCODE = (60u << OPCODE_SHIFT | 18u << 3),
519 XXMRGLW_OPCODE = (60u << OPCODE_SHIFT | 50u << 3),
520 XXSPLTW_OPCODE = (60u << OPCODE_SHIFT | 164u << 2),
521 XXLOR_OPCODE = (60u << OPCODE_SHIFT | 146u << 3),
522 XXLXOR_OPCODE = (60u << OPCODE_SHIFT | 154u << 3),
523 XXLEQV_OPCODE = (60u << OPCODE_SHIFT | 186u << 3),
524 XVDIVSP_OPCODE = (60u << OPCODE_SHIFT | 88u << 3),
525 XVDIVDP_OPCODE = (60u << OPCODE_SHIFT | 120u << 3),
526 XVABSSP_OPCODE = (60u << OPCODE_SHIFT | 409u << 2),
527 XVABSDP_OPCODE = (60u << OPCODE_SHIFT | 473u << 2),
528 XVNEGSP_OPCODE = (60u << OPCODE_SHIFT | 441u << 2),
529 XVNEGDP_OPCODE = (60u << OPCODE_SHIFT | 505u << 2),
530 XVSQRTSP_OPCODE= (60u << OPCODE_SHIFT | 139u << 2),
531 XVSQRTDP_OPCODE= (60u << OPCODE_SHIFT | 203u << 2),
532 XVADDDP_OPCODE = (60u << OPCODE_SHIFT | 96u << 3),
533 XVSUBDP_OPCODE = (60u << OPCODE_SHIFT | 104u << 3),
534 XVMULSP_OPCODE = (60u << OPCODE_SHIFT | 80u << 3),
535 XVMULDP_OPCODE = (60u << OPCODE_SHIFT | 112u << 3),
536
537 // Vector Permute and Formatting
538 VPKPX_OPCODE = (4u << OPCODE_SHIFT | 782u ),
539 VPKSHSS_OPCODE = (4u << OPCODE_SHIFT | 398u ),
540 VPKSWSS_OPCODE = (4u << OPCODE_SHIFT | 462u ),
541 VPKSHUS_OPCODE = (4u << OPCODE_SHIFT | 270u ),
542 VPKSWUS_OPCODE = (4u << OPCODE_SHIFT | 334u ),
543 VPKUHUM_OPCODE = (4u << OPCODE_SHIFT | 14u ),
544 VPKUWUM_OPCODE = (4u << OPCODE_SHIFT | 78u ),
545 VPKUHUS_OPCODE = (4u << OPCODE_SHIFT | 142u ),
546 VPKUWUS_OPCODE = (4u << OPCODE_SHIFT | 206u ),
547 VUPKHPX_OPCODE = (4u << OPCODE_SHIFT | 846u ),
548 VUPKHSB_OPCODE = (4u << OPCODE_SHIFT | 526u ),
549 VUPKHSH_OPCODE = (4u << OPCODE_SHIFT | 590u ),
550 VUPKLPX_OPCODE = (4u << OPCODE_SHIFT | 974u ),
551 VUPKLSB_OPCODE = (4u << OPCODE_SHIFT | 654u ),
552 VUPKLSH_OPCODE = (4u << OPCODE_SHIFT | 718u ),
553
554 VMRGHB_OPCODE = (4u << OPCODE_SHIFT | 12u ),
555 VMRGHW_OPCODE = (4u << OPCODE_SHIFT | 140u ),
569 VSEL_OPCODE = (4u << OPCODE_SHIFT | 42u ),
570
571 VSL_OPCODE = (4u << OPCODE_SHIFT | 452u ),
572 VSLDOI_OPCODE = (4u << OPCODE_SHIFT | 44u ),
573 VSLO_OPCODE = (4u << OPCODE_SHIFT | 1036u ),
574 VSR_OPCODE = (4u << OPCODE_SHIFT | 708u ),
575 VSRO_OPCODE = (4u << OPCODE_SHIFT | 1100u ),
576
577 // Vector Integer
578 VADDCUW_OPCODE = (4u << OPCODE_SHIFT | 384u ),
579 VADDSHS_OPCODE = (4u << OPCODE_SHIFT | 832u ),
580 VADDSBS_OPCODE = (4u << OPCODE_SHIFT | 768u ),
581 VADDSWS_OPCODE = (4u << OPCODE_SHIFT | 896u ),
582 VADDUBM_OPCODE = (4u << OPCODE_SHIFT | 0u ),
583 VADDUWM_OPCODE = (4u << OPCODE_SHIFT | 128u ),
584 VADDUHM_OPCODE = (4u << OPCODE_SHIFT | 64u ),
585 VADDUDM_OPCODE = (4u << OPCODE_SHIFT | 192u ),
586 VADDUBS_OPCODE = (4u << OPCODE_SHIFT | 512u ),
587 VADDUWS_OPCODE = (4u << OPCODE_SHIFT | 640u ),
588 VADDUHS_OPCODE = (4u << OPCODE_SHIFT | 576u ),
589 VADDFP_OPCODE = (4u << OPCODE_SHIFT | 10u ),
590 VSUBCUW_OPCODE = (4u << OPCODE_SHIFT | 1408u ),
591 VSUBSHS_OPCODE = (4u << OPCODE_SHIFT | 1856u ),
592 VSUBSBS_OPCODE = (4u << OPCODE_SHIFT | 1792u ),
593 VSUBSWS_OPCODE = (4u << OPCODE_SHIFT | 1920u ),
594 VSUBUBM_OPCODE = (4u << OPCODE_SHIFT | 1024u ),
595 VSUBUWM_OPCODE = (4u << OPCODE_SHIFT | 1152u ),
596 VSUBUHM_OPCODE = (4u << OPCODE_SHIFT | 1088u ),
597 VSUBUDM_OPCODE = (4u << OPCODE_SHIFT | 1216u ),
598 VSUBUBS_OPCODE = (4u << OPCODE_SHIFT | 1536u ),
599 VSUBUWS_OPCODE = (4u << OPCODE_SHIFT | 1664u ),
600 VSUBUHS_OPCODE = (4u << OPCODE_SHIFT | 1600u ),
601 VSUBFP_OPCODE = (4u << OPCODE_SHIFT | 74u ),
602
603 VMULESB_OPCODE = (4u << OPCODE_SHIFT | 776u ),
604 VMULEUB_OPCODE = (4u << OPCODE_SHIFT | 520u ),
605 VMULESH_OPCODE = (4u << OPCODE_SHIFT | 840u ),
606 VMULEUH_OPCODE = (4u << OPCODE_SHIFT | 584u ),
607 VMULOSB_OPCODE = (4u << OPCODE_SHIFT | 264u ),
608 VMULOUB_OPCODE = (4u << OPCODE_SHIFT | 8u ),
609 VMULOSH_OPCODE = (4u << OPCODE_SHIFT | 328u ),
610 VMULOSW_OPCODE = (4u << OPCODE_SHIFT | 392u ),
611 VMULOUH_OPCODE = (4u << OPCODE_SHIFT | 72u ),
612 VMULUWM_OPCODE = (4u << OPCODE_SHIFT | 137u ),
613 VMHADDSHS_OPCODE=(4u << OPCODE_SHIFT | 32u ),
614 VMHRADDSHS_OPCODE=(4u << OPCODE_SHIFT | 33u ),
615 VMLADDUHM_OPCODE=(4u << OPCODE_SHIFT | 34u ),
616 VMSUBUHM_OPCODE= (4u << OPCODE_SHIFT | 36u ),
617 VMSUMMBM_OPCODE= (4u << OPCODE_SHIFT | 37u ),
618 VMSUMSHM_OPCODE= (4u << OPCODE_SHIFT | 40u ),
619 VMSUMSHS_OPCODE= (4u << OPCODE_SHIFT | 41u ),
620 VMSUMUHM_OPCODE= (4u << OPCODE_SHIFT | 38u ),
621 VMSUMUHS_OPCODE= (4u << OPCODE_SHIFT | 39u ),
622 VMADDFP_OPCODE = (4u << OPCODE_SHIFT | 46u ),
623
624 VSUMSWS_OPCODE = (4u << OPCODE_SHIFT | 1928u ),
625 VSUM2SWS_OPCODE= (4u << OPCODE_SHIFT | 1672u ),
626 VSUM4SBS_OPCODE= (4u << OPCODE_SHIFT | 1800u ),
627 VSUM4UBS_OPCODE= (4u << OPCODE_SHIFT | 1544u ),
628 VSUM4SHS_OPCODE= (4u << OPCODE_SHIFT | 1608u ),
629
630 VAVGSB_OPCODE = (4u << OPCODE_SHIFT | 1282u ),
631 VAVGSW_OPCODE = (4u << OPCODE_SHIFT | 1410u ),
632 VAVGSH_OPCODE = (4u << OPCODE_SHIFT | 1346u ),
633 VAVGUB_OPCODE = (4u << OPCODE_SHIFT | 1026u ),
634 VAVGUW_OPCODE = (4u << OPCODE_SHIFT | 1154u ),
635 VAVGUH_OPCODE = (4u << OPCODE_SHIFT | 1090u ),
636
637 VMAXSB_OPCODE = (4u << OPCODE_SHIFT | 258u ),
638 VMAXSW_OPCODE = (4u << OPCODE_SHIFT | 386u ),
639 VMAXSH_OPCODE = (4u << OPCODE_SHIFT | 322u ),
640 VMAXUB_OPCODE = (4u << OPCODE_SHIFT | 2u ),
641 VMAXUW_OPCODE = (4u << OPCODE_SHIFT | 130u ),
642 VMAXUH_OPCODE = (4u << OPCODE_SHIFT | 66u ),
658 VCMPGTUW_OPCODE= (4u << OPCODE_SHIFT | 646u ),
659
660 VAND_OPCODE = (4u << OPCODE_SHIFT | 1028u ),
661 VANDC_OPCODE = (4u << OPCODE_SHIFT | 1092u ),
662 VNOR_OPCODE = (4u << OPCODE_SHIFT | 1284u ),
663 VOR_OPCODE = (4u << OPCODE_SHIFT | 1156u ),
664 VXOR_OPCODE = (4u << OPCODE_SHIFT | 1220u ),
665 VRLD_OPCODE = (4u << OPCODE_SHIFT | 196u ),
666 VRLB_OPCODE = (4u << OPCODE_SHIFT | 4u ),
667 VRLW_OPCODE = (4u << OPCODE_SHIFT | 132u ),
668 VRLH_OPCODE = (4u << OPCODE_SHIFT | 68u ),
669 VSLB_OPCODE = (4u << OPCODE_SHIFT | 260u ),
670 VSKW_OPCODE = (4u << OPCODE_SHIFT | 388u ),
671 VSLH_OPCODE = (4u << OPCODE_SHIFT | 324u ),
672 VSRB_OPCODE = (4u << OPCODE_SHIFT | 516u ),
673 VSRW_OPCODE = (4u << OPCODE_SHIFT | 644u ),
674 VSRH_OPCODE = (4u << OPCODE_SHIFT | 580u ),
675 VSRAB_OPCODE = (4u << OPCODE_SHIFT | 772u ),
676 VSRAW_OPCODE = (4u << OPCODE_SHIFT | 900u ),
677 VSRAH_OPCODE = (4u << OPCODE_SHIFT | 836u ),
678 VPOPCNTW_OPCODE= (4u << OPCODE_SHIFT | 1923u ),
679
680 // Vector Floating-Point
681 // not implemented yet
682
683 // Vector Status and Control
684 MTVSCR_OPCODE = (4u << OPCODE_SHIFT | 1604u ),
685 MFVSCR_OPCODE = (4u << OPCODE_SHIFT | 1540u ),
686
687 // AES (introduced with Power 8)
688 VCIPHER_OPCODE = (4u << OPCODE_SHIFT | 1288u),
689 VCIPHERLAST_OPCODE = (4u << OPCODE_SHIFT | 1289u),
690 VNCIPHER_OPCODE = (4u << OPCODE_SHIFT | 1352u),
691 VNCIPHERLAST_OPCODE = (4u << OPCODE_SHIFT | 1353u),
692 VSBOX_OPCODE = (4u << OPCODE_SHIFT | 1480u),
693
694 // SHA (introduced with Power 8)
695 VSHASIGMAD_OPCODE = (4u << OPCODE_SHIFT | 1730u),
696 VSHASIGMAW_OPCODE = (4u << OPCODE_SHIFT | 1666u),
697
698 // Vector Binary Polynomial Multiplication (introduced with Power 8)
2061 inline void vspltish( VectorRegister d, int si5);
2062 inline void vspltisw( VectorRegister d, int si5);
2063 inline void vperm( VectorRegister d, VectorRegister a, VectorRegister b, VectorRegister c);
2064 inline void vsel( VectorRegister d, VectorRegister a, VectorRegister b, VectorRegister c);
2065 inline void vsl( VectorRegister d, VectorRegister a, VectorRegister b);
2066 inline void vsldoi( VectorRegister d, VectorRegister a, VectorRegister b, int ui4);
2067 inline void vslo( VectorRegister d, VectorRegister a, VectorRegister b);
2068 inline void vsr( VectorRegister d, VectorRegister a, VectorRegister b);
2069 inline void vsro( VectorRegister d, VectorRegister a, VectorRegister b);
2070 inline void vaddcuw( VectorRegister d, VectorRegister a, VectorRegister b);
2071 inline void vaddshs( VectorRegister d, VectorRegister a, VectorRegister b);
2072 inline void vaddsbs( VectorRegister d, VectorRegister a, VectorRegister b);
2073 inline void vaddsws( VectorRegister d, VectorRegister a, VectorRegister b);
2074 inline void vaddubm( VectorRegister d, VectorRegister a, VectorRegister b);
2075 inline void vadduwm( VectorRegister d, VectorRegister a, VectorRegister b);
2076 inline void vadduhm( VectorRegister d, VectorRegister a, VectorRegister b);
2077 inline void vaddudm( VectorRegister d, VectorRegister a, VectorRegister b);
2078 inline void vaddubs( VectorRegister d, VectorRegister a, VectorRegister b);
2079 inline void vadduws( VectorRegister d, VectorRegister a, VectorRegister b);
2080 inline void vadduhs( VectorRegister d, VectorRegister a, VectorRegister b);
2081 inline void vaddfp( VectorRegister d, VectorRegister a, VectorRegister b);
2082 inline void vsubcuw( VectorRegister d, VectorRegister a, VectorRegister b);
2083 inline void vsubshs( VectorRegister d, VectorRegister a, VectorRegister b);
2084 inline void vsubsbs( VectorRegister d, VectorRegister a, VectorRegister b);
2085 inline void vsubsws( VectorRegister d, VectorRegister a, VectorRegister b);
2086 inline void vsububm( VectorRegister d, VectorRegister a, VectorRegister b);
2087 inline void vsubuwm( VectorRegister d, VectorRegister a, VectorRegister b);
2088 inline void vsubuhm( VectorRegister d, VectorRegister a, VectorRegister b);
2089 inline void vsubudm( VectorRegister d, VectorRegister a, VectorRegister b);
2090 inline void vsububs( VectorRegister d, VectorRegister a, VectorRegister b);
2091 inline void vsubuws( VectorRegister d, VectorRegister a, VectorRegister b);
2092 inline void vsubuhs( VectorRegister d, VectorRegister a, VectorRegister b);
2093 inline void vsubfp( VectorRegister d, VectorRegister a, VectorRegister b);
2094 inline void vmulesb( VectorRegister d, VectorRegister a, VectorRegister b);
2095 inline void vmuleub( VectorRegister d, VectorRegister a, VectorRegister b);
2096 inline void vmulesh( VectorRegister d, VectorRegister a, VectorRegister b);
2097 inline void vmuleuh( VectorRegister d, VectorRegister a, VectorRegister b);
2098 inline void vmulosb( VectorRegister d, VectorRegister a, VectorRegister b);
2099 inline void vmuloub( VectorRegister d, VectorRegister a, VectorRegister b);
2100 inline void vmulosh( VectorRegister d, VectorRegister a, VectorRegister b);
2101 inline void vmulosw( VectorRegister d, VectorRegister a, VectorRegister b);
2102 inline void vmulouh( VectorRegister d, VectorRegister a, VectorRegister b);
2103 inline void vmuluwm( VectorRegister d, VectorRegister a, VectorRegister b);
2104 inline void vmhaddshs(VectorRegister d, VectorRegister a, VectorRegister b, VectorRegister c);
2105 inline void vmhraddshs(VectorRegister d,VectorRegister a, VectorRegister b, VectorRegister c);
2106 inline void vmladduhm(VectorRegister d, VectorRegister a, VectorRegister b, VectorRegister c);
2107 inline void vmsubuhm( VectorRegister d, VectorRegister a, VectorRegister b, VectorRegister c);
2108 inline void vmsummbm( VectorRegister d, VectorRegister a, VectorRegister b, VectorRegister c);
2109 inline void vmsumshm( VectorRegister d, VectorRegister a, VectorRegister b, VectorRegister c);
2110 inline void vmsumshs( VectorRegister d, VectorRegister a, VectorRegister b, VectorRegister c);
2111 inline void vmsumuhm( VectorRegister d, VectorRegister a, VectorRegister b, VectorRegister c);
2112 inline void vmsumuhs( VectorRegister d, VectorRegister a, VectorRegister b, VectorRegister c);
2113 inline void vmaddfp( VectorRegister d, VectorRegister a, VectorRegister b, VectorRegister c);
2114 inline void vsumsws( VectorRegister d, VectorRegister a, VectorRegister b);
2115 inline void vsum2sws( VectorRegister d, VectorRegister a, VectorRegister b);
2116 inline void vsum4sbs( VectorRegister d, VectorRegister a, VectorRegister b);
2117 inline void vsum4ubs( VectorRegister d, VectorRegister a, VectorRegister b);
2118 inline void vsum4shs( VectorRegister d, VectorRegister a, VectorRegister b);
2119 inline void vavgsb( VectorRegister d, VectorRegister a, VectorRegister b);
2120 inline void vavgsw( VectorRegister d, VectorRegister a, VectorRegister b);
2121 inline void vavgsh( VectorRegister d, VectorRegister a, VectorRegister b);
2122 inline void vavgub( VectorRegister d, VectorRegister a, VectorRegister b);
2123 inline void vavguw( VectorRegister d, VectorRegister a, VectorRegister b);
2124 inline void vavguh( VectorRegister d, VectorRegister a, VectorRegister b);
2125 inline void vmaxsb( VectorRegister d, VectorRegister a, VectorRegister b);
2126 inline void vmaxsw( VectorRegister d, VectorRegister a, VectorRegister b);
2127 inline void vmaxsh( VectorRegister d, VectorRegister a, VectorRegister b);
2128 inline void vmaxub( VectorRegister d, VectorRegister a, VectorRegister b);
2129 inline void vmaxuw( VectorRegister d, VectorRegister a, VectorRegister b);
2130 inline void vmaxuh( VectorRegister d, VectorRegister a, VectorRegister b);
2131 inline void vminsb( VectorRegister d, VectorRegister a, VectorRegister b);
2132 inline void vminsw( VectorRegister d, VectorRegister a, VectorRegister b);
2133 inline void vminsh( VectorRegister d, VectorRegister a, VectorRegister b);
2154 inline void vcmpgtuw_(VectorRegister d, VectorRegister a, VectorRegister b);
2155 inline void vand( VectorRegister d, VectorRegister a, VectorRegister b);
2156 inline void vandc( VectorRegister d, VectorRegister a, VectorRegister b);
2157 inline void vnor( VectorRegister d, VectorRegister a, VectorRegister b);
2158 inline void vor( VectorRegister d, VectorRegister a, VectorRegister b);
2159 inline void vmr( VectorRegister d, VectorRegister a);
2160 inline void vxor( VectorRegister d, VectorRegister a, VectorRegister b);
2161 inline void vrld( VectorRegister d, VectorRegister a, VectorRegister b);
2162 inline void vrlb( VectorRegister d, VectorRegister a, VectorRegister b);
2163 inline void vrlw( VectorRegister d, VectorRegister a, VectorRegister b);
2164 inline void vrlh( VectorRegister d, VectorRegister a, VectorRegister b);
2165 inline void vslb( VectorRegister d, VectorRegister a, VectorRegister b);
2166 inline void vskw( VectorRegister d, VectorRegister a, VectorRegister b);
2167 inline void vslh( VectorRegister d, VectorRegister a, VectorRegister b);
2168 inline void vsrb( VectorRegister d, VectorRegister a, VectorRegister b);
2169 inline void vsrw( VectorRegister d, VectorRegister a, VectorRegister b);
2170 inline void vsrh( VectorRegister d, VectorRegister a, VectorRegister b);
2171 inline void vsrab( VectorRegister d, VectorRegister a, VectorRegister b);
2172 inline void vsraw( VectorRegister d, VectorRegister a, VectorRegister b);
2173 inline void vsrah( VectorRegister d, VectorRegister a, VectorRegister b);
2174 inline void vpopcntw( VectorRegister d, VectorRegister b);
2175 // Vector Floating-Point not implemented yet
2176 inline void mtvscr( VectorRegister b);
2177 inline void mfvscr( VectorRegister d);
2178
2179 // Vector-Scalar (VSX) instructions.
2180 inline void lxvd2x( VectorSRegister d, Register a);
2181 inline void lxvd2x( VectorSRegister d, Register a, Register b);
2182 inline void stxvd2x( VectorSRegister d, Register a);
2183 inline void stxvd2x( VectorSRegister d, Register a, Register b);
2184 inline void mtvrwz( VectorRegister d, Register a);
2185 inline void mfvrwz( Register a, VectorRegister d);
2186 inline void mtvrd( VectorRegister d, Register a);
2187 inline void mfvrd( Register a, VectorRegister d);
2188 inline void xxpermdi( VectorSRegister d, VectorSRegister a, VectorSRegister b, int dm);
2189 inline void xxmrghw( VectorSRegister d, VectorSRegister a, VectorSRegister b);
2190 inline void xxmrglw( VectorSRegister d, VectorSRegister a, VectorSRegister b);
2191 inline void mtvsrd( VectorSRegister d, Register a);
2192 inline void mtvsrwz( VectorSRegister d, Register a);
2193 inline void xxspltw( VectorSRegister d, VectorSRegister b, int ui2);
2194 inline void xxlor( VectorSRegister d, VectorSRegister a, VectorSRegister b);
2195 inline void xxlxor( VectorSRegister d, VectorSRegister a, VectorSRegister b);
2196 inline void xxleqv( VectorSRegister d, VectorSRegister a, VectorSRegister b);
2197 inline void xvdivsp( VectorSRegister d, VectorSRegister a, VectorSRegister b);
2198 inline void xvdivdp( VectorSRegister d, VectorSRegister a, VectorSRegister b);
2199 inline void xvabssp( VectorSRegister d, VectorSRegister b);
2200 inline void xvabsdp( VectorSRegister d, VectorSRegister b);
2201 inline void xvnegsp( VectorSRegister d, VectorSRegister b);
2202 inline void xvnegdp( VectorSRegister d, VectorSRegister b);
2203 inline void xvsqrtsp( VectorSRegister d, VectorSRegister b);
2204 inline void xvsqrtdp( VectorSRegister d, VectorSRegister b);
2205 inline void xvadddp( VectorSRegister d, VectorSRegister a, VectorSRegister b);
2206 inline void xvsubdp( VectorSRegister d, VectorSRegister a, VectorSRegister b);
2207 inline void xvmulsp( VectorSRegister d, VectorSRegister a, VectorSRegister b);
2208 inline void xvmuldp( VectorSRegister d, VectorSRegister a, VectorSRegister b);
2209
2210 // VSX Extended Mnemonics
2211 inline void xxspltd( VectorSRegister d, VectorSRegister a, int x);
2212 inline void xxmrghd( VectorSRegister d, VectorSRegister a, VectorSRegister b);
2213 inline void xxmrgld( VectorSRegister d, VectorSRegister a, VectorSRegister b);
2214 inline void xxswapd( VectorSRegister d, VectorSRegister a);
2215
2216 // Vector-Scalar (VSX) instructions.
2217 inline void mtfprd( FloatRegister d, Register a);
2218 inline void mtfprwa( FloatRegister d, Register a);
2219 inline void mffprd( Register a, FloatRegister d);
2220
2221 // AES (introduced with Power 8)
2222 inline void vcipher( VectorRegister d, VectorRegister a, VectorRegister b);
2223 inline void vcipherlast( VectorRegister d, VectorRegister a, VectorRegister b);
2224 inline void vncipher( VectorRegister d, VectorRegister a, VectorRegister b);
2225 inline void vncipherlast(VectorRegister d, VectorRegister a, VectorRegister b);
2226 inline void vsbox( VectorRegister d, VectorRegister a);
2227
2228 // SHA (introduced with Power 8)
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