src/hotspot/cpu/ppc/assembler_ppc.hpp

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@@ -519,10 +519,22 @@
     XXMRGLW_OPCODE = (60u << OPCODE_SHIFT |   50u << 3),
     XXSPLTW_OPCODE = (60u << OPCODE_SHIFT |  164u << 2),
     XXLOR_OPCODE   = (60u << OPCODE_SHIFT |  146u << 3),
     XXLXOR_OPCODE  = (60u << OPCODE_SHIFT |  154u << 3),
     XXLEQV_OPCODE  = (60u << OPCODE_SHIFT |  186u << 3),
+    XVDIVSP_OPCODE = (60u << OPCODE_SHIFT |   88u << 3),
+    XVDIVDP_OPCODE = (60u << OPCODE_SHIFT |  120u << 3),
+    XVABSSP_OPCODE = (60u << OPCODE_SHIFT |  409u << 2),
+    XVABSDP_OPCODE = (60u << OPCODE_SHIFT |  473u << 2),
+    XVNEGSP_OPCODE = (60u << OPCODE_SHIFT |  441u << 2),
+    XVNEGDP_OPCODE = (60u << OPCODE_SHIFT |  505u << 2),
+    XVSQRTSP_OPCODE= (60u << OPCODE_SHIFT |  139u << 2),
+    XVSQRTDP_OPCODE= (60u << OPCODE_SHIFT |  203u << 2),
+    XVADDDP_OPCODE = (60u << OPCODE_SHIFT |   96u << 3),
+    XVSUBDP_OPCODE = (60u << OPCODE_SHIFT |  104u << 3),
+    XVMULSP_OPCODE = (60u << OPCODE_SHIFT |   80u << 3),
+    XVMULDP_OPCODE = (60u << OPCODE_SHIFT |  112u << 3),
 
     // Vector Permute and Formatting
     VPKPX_OPCODE   = (4u  << OPCODE_SHIFT |  782u     ),
     VPKSHSS_OPCODE = (4u  << OPCODE_SHIFT |  398u     ),
     VPKSWSS_OPCODE = (4u  << OPCODE_SHIFT |  462u     ),

@@ -572,38 +584,44 @@
     VADDUHM_OPCODE = (4u  << OPCODE_SHIFT |   64u     ),
     VADDUDM_OPCODE = (4u  << OPCODE_SHIFT |  192u     ),
     VADDUBS_OPCODE = (4u  << OPCODE_SHIFT |  512u     ),
     VADDUWS_OPCODE = (4u  << OPCODE_SHIFT |  640u     ),
     VADDUHS_OPCODE = (4u  << OPCODE_SHIFT |  576u     ),
+    VADDFP_OPCODE  = (4u  << OPCODE_SHIFT |   10u     ),
     VSUBCUW_OPCODE = (4u  << OPCODE_SHIFT | 1408u     ),
     VSUBSHS_OPCODE = (4u  << OPCODE_SHIFT | 1856u     ),
     VSUBSBS_OPCODE = (4u  << OPCODE_SHIFT | 1792u     ),
     VSUBSWS_OPCODE = (4u  << OPCODE_SHIFT | 1920u     ),
     VSUBUBM_OPCODE = (4u  << OPCODE_SHIFT | 1024u     ),
     VSUBUWM_OPCODE = (4u  << OPCODE_SHIFT | 1152u     ),
     VSUBUHM_OPCODE = (4u  << OPCODE_SHIFT | 1088u     ),
+    VSUBUDM_OPCODE = (4u  << OPCODE_SHIFT | 1216u     ),
     VSUBUBS_OPCODE = (4u  << OPCODE_SHIFT | 1536u     ),
     VSUBUWS_OPCODE = (4u  << OPCODE_SHIFT | 1664u     ),
     VSUBUHS_OPCODE = (4u  << OPCODE_SHIFT | 1600u     ),
+    VSUBFP_OPCODE  = (4u  << OPCODE_SHIFT |   74u     ),
 
     VMULESB_OPCODE = (4u  << OPCODE_SHIFT |  776u     ),
     VMULEUB_OPCODE = (4u  << OPCODE_SHIFT |  520u     ),
     VMULESH_OPCODE = (4u  << OPCODE_SHIFT |  840u     ),
     VMULEUH_OPCODE = (4u  << OPCODE_SHIFT |  584u     ),
     VMULOSB_OPCODE = (4u  << OPCODE_SHIFT |  264u     ),
     VMULOUB_OPCODE = (4u  << OPCODE_SHIFT |    8u     ),
     VMULOSH_OPCODE = (4u  << OPCODE_SHIFT |  328u     ),
+    VMULOSW_OPCODE = (4u  << OPCODE_SHIFT |  392u     ),
     VMULOUH_OPCODE = (4u  << OPCODE_SHIFT |   72u     ),
+    VMULUWM_OPCODE = (4u  << OPCODE_SHIFT |  137u     ),
     VMHADDSHS_OPCODE=(4u  << OPCODE_SHIFT |   32u     ),
     VMHRADDSHS_OPCODE=(4u << OPCODE_SHIFT |   33u     ),
     VMLADDUHM_OPCODE=(4u  << OPCODE_SHIFT |   34u     ),
     VMSUBUHM_OPCODE= (4u  << OPCODE_SHIFT |   36u     ),
     VMSUMMBM_OPCODE= (4u  << OPCODE_SHIFT |   37u     ),
     VMSUMSHM_OPCODE= (4u  << OPCODE_SHIFT |   40u     ),
     VMSUMSHS_OPCODE= (4u  << OPCODE_SHIFT |   41u     ),
     VMSUMUHM_OPCODE= (4u  << OPCODE_SHIFT |   38u     ),
     VMSUMUHS_OPCODE= (4u  << OPCODE_SHIFT |   39u     ),
+    VMADDFP_OPCODE = (4u  << OPCODE_SHIFT |   46u     ),
 
     VSUMSWS_OPCODE = (4u  << OPCODE_SHIFT | 1928u     ),
     VSUM2SWS_OPCODE= (4u  << OPCODE_SHIFT | 1672u     ),
     VSUM4SBS_OPCODE= (4u  << OPCODE_SHIFT | 1800u     ),
     VSUM4UBS_OPCODE= (4u  << OPCODE_SHIFT | 1544u     ),

@@ -655,10 +673,11 @@
     VSRW_OPCODE    = (4u  << OPCODE_SHIFT |  644u     ),
     VSRH_OPCODE    = (4u  << OPCODE_SHIFT |  580u     ),
     VSRAB_OPCODE   = (4u  << OPCODE_SHIFT |  772u     ),
     VSRAW_OPCODE   = (4u  << OPCODE_SHIFT |  900u     ),
     VSRAH_OPCODE   = (4u  << OPCODE_SHIFT |  836u     ),
+    VPOPCNTW_OPCODE= (4u  << OPCODE_SHIFT | 1923u     ),
 
     // Vector Floating-Point
     // not implemented yet
 
     // Vector Status and Control

@@ -2057,37 +2076,43 @@
   inline void vadduhm(  VectorRegister d, VectorRegister a, VectorRegister b);
   inline void vaddudm(  VectorRegister d, VectorRegister a, VectorRegister b);
   inline void vaddubs(  VectorRegister d, VectorRegister a, VectorRegister b);
   inline void vadduws(  VectorRegister d, VectorRegister a, VectorRegister b);
   inline void vadduhs(  VectorRegister d, VectorRegister a, VectorRegister b);
+  inline void vaddfp(   VectorRegister d, VectorRegister a, VectorRegister b);
   inline void vsubcuw(  VectorRegister d, VectorRegister a, VectorRegister b);
   inline void vsubshs(  VectorRegister d, VectorRegister a, VectorRegister b);
   inline void vsubsbs(  VectorRegister d, VectorRegister a, VectorRegister b);
   inline void vsubsws(  VectorRegister d, VectorRegister a, VectorRegister b);
   inline void vsububm(  VectorRegister d, VectorRegister a, VectorRegister b);
   inline void vsubuwm(  VectorRegister d, VectorRegister a, VectorRegister b);
   inline void vsubuhm(  VectorRegister d, VectorRegister a, VectorRegister b);
+  inline void vsubudm(  VectorRegister d, VectorRegister a, VectorRegister b);
   inline void vsububs(  VectorRegister d, VectorRegister a, VectorRegister b);
   inline void vsubuws(  VectorRegister d, VectorRegister a, VectorRegister b);
   inline void vsubuhs(  VectorRegister d, VectorRegister a, VectorRegister b);
+  inline void vsubfp(   VectorRegister d, VectorRegister a, VectorRegister b);
   inline void vmulesb(  VectorRegister d, VectorRegister a, VectorRegister b);
   inline void vmuleub(  VectorRegister d, VectorRegister a, VectorRegister b);
   inline void vmulesh(  VectorRegister d, VectorRegister a, VectorRegister b);
   inline void vmuleuh(  VectorRegister d, VectorRegister a, VectorRegister b);
   inline void vmulosb(  VectorRegister d, VectorRegister a, VectorRegister b);
   inline void vmuloub(  VectorRegister d, VectorRegister a, VectorRegister b);
   inline void vmulosh(  VectorRegister d, VectorRegister a, VectorRegister b);
+  inline void vmulosw(  VectorRegister d, VectorRegister a, VectorRegister b);
   inline void vmulouh(  VectorRegister d, VectorRegister a, VectorRegister b);
+  inline void vmuluwm(  VectorRegister d, VectorRegister a, VectorRegister b);
   inline void vmhaddshs(VectorRegister d, VectorRegister a, VectorRegister b, VectorRegister c);
   inline void vmhraddshs(VectorRegister d,VectorRegister a, VectorRegister b, VectorRegister c);
   inline void vmladduhm(VectorRegister d, VectorRegister a, VectorRegister b, VectorRegister c);
   inline void vmsubuhm( VectorRegister d, VectorRegister a, VectorRegister b, VectorRegister c);
   inline void vmsummbm( VectorRegister d, VectorRegister a, VectorRegister b, VectorRegister c);
   inline void vmsumshm( VectorRegister d, VectorRegister a, VectorRegister b, VectorRegister c);
   inline void vmsumshs( VectorRegister d, VectorRegister a, VectorRegister b, VectorRegister c);
   inline void vmsumuhm( VectorRegister d, VectorRegister a, VectorRegister b, VectorRegister c);
   inline void vmsumuhs( VectorRegister d, VectorRegister a, VectorRegister b, VectorRegister c);
+  inline void vmaddfp(  VectorRegister d, VectorRegister a, VectorRegister b, VectorRegister c);
   inline void vsumsws(  VectorRegister d, VectorRegister a, VectorRegister b);
   inline void vsum2sws( VectorRegister d, VectorRegister a, VectorRegister b);
   inline void vsum4sbs( VectorRegister d, VectorRegister a, VectorRegister b);
   inline void vsum4ubs( VectorRegister d, VectorRegister a, VectorRegister b);
   inline void vsum4shs( VectorRegister d, VectorRegister a, VectorRegister b);

@@ -2144,10 +2169,11 @@
   inline void vsrw(     VectorRegister d, VectorRegister a, VectorRegister b);
   inline void vsrh(     VectorRegister d, VectorRegister a, VectorRegister b);
   inline void vsrab(    VectorRegister d, VectorRegister a, VectorRegister b);
   inline void vsraw(    VectorRegister d, VectorRegister a, VectorRegister b);
   inline void vsrah(    VectorRegister d, VectorRegister a, VectorRegister b);
+  inline void vpopcntw( VectorRegister d, VectorRegister b);
   // Vector Floating-Point not implemented yet
   inline void mtvscr(   VectorRegister b);
   inline void mfvscr(   VectorRegister d);
 
   // Vector-Scalar (VSX) instructions.

@@ -2166,10 +2192,22 @@
   inline void mtvsrwz(  VectorSRegister d, Register a);
   inline void xxspltw(  VectorSRegister d, VectorSRegister b, int ui2);
   inline void xxlor(    VectorSRegister d, VectorSRegister a, VectorSRegister b);
   inline void xxlxor(   VectorSRegister d, VectorSRegister a, VectorSRegister b);
   inline void xxleqv(   VectorSRegister d, VectorSRegister a, VectorSRegister b);
+  inline void xvdivsp(  VectorSRegister d, VectorSRegister a, VectorSRegister b);
+  inline void xvdivdp(  VectorSRegister d, VectorSRegister a, VectorSRegister b);
+  inline void xvabssp(  VectorSRegister d, VectorSRegister b);
+  inline void xvabsdp(  VectorSRegister d, VectorSRegister b);
+  inline void xvnegsp(  VectorSRegister d, VectorSRegister b);
+  inline void xvnegdp(  VectorSRegister d, VectorSRegister b);
+  inline void xvsqrtsp( VectorSRegister d, VectorSRegister b);
+  inline void xvsqrtdp( VectorSRegister d, VectorSRegister b);
+  inline void xvadddp(  VectorSRegister d, VectorSRegister a, VectorSRegister b);
+  inline void xvsubdp(  VectorSRegister d, VectorSRegister a, VectorSRegister b);
+  inline void xvmulsp(  VectorSRegister d, VectorSRegister a, VectorSRegister b);
+  inline void xvmuldp(  VectorSRegister d, VectorSRegister a, VectorSRegister b);
 
   // VSX Extended Mnemonics
   inline void xxspltd(  VectorSRegister d, VectorSRegister a, int x);
   inline void xxmrghd(  VectorSRegister d, VectorSRegister a, VectorSRegister b);
   inline void xxmrgld(  VectorSRegister d, VectorSRegister a, VectorSRegister b);